Texas Instruments [CI]が提供するINA381Axのデータシート

TEXAS INSTRUMENTS V'.‘ X 'WJW
VOUT
RESET
ALERT
IN+
IN±
VS+
GND
CMPIN
CMPREF
10 k:
RPULL-UP
+
±
0 V to 26 V
+
-
G = 20, 50,
100, 200
ADC
GPIO
GPIO
R1 R2
Microcontroller
5 V
2.7 V to 5.5 V
RSENSE
Load
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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
INA381
SBOS848B –DECEMBER 2017REVISED OCTOBER 2019
INA381 26-V, High-Speed, Current Sense Amplifier With Integrated Comparator
1
1 Features
1 Common-mode input range: –0.2 V to +26 V
High accuracy amplifier:
Offset voltage at TA= 25°C
500 µV (maximum) at VCM = 12 V
150 µV (maximum) at VCM =0V
Offset voltage drift: 1 µV/°C (maximum)
Gain error: 1% (maximum) at 25°C
Gain error drift: 20 ppm/°C (maximum)
Available amplifier gains:
INA381A1: 20 V/V
INA381A2: 50 V/V
INA381A3: 100 V/V
INA381A4: 200 V/V
Open-drain comparator:
Hysteresis: 50 mV
Propagation delay: 400 ns (typ)
Alert threshold set through external reference
voltage
Supports transparent and latching modes
Packages: VSSOP-10 and WSON-8
2 Applications
Merchant network and server PSU
Merchant DC/DC
DC-input BLDC motor drive
Cordless power tool
Headsets, headphones and earbuds
3 Description
The INA381 includes both a 26-V common-mode,
current-sensing amplifier and a high-speed
comparator. This device detects overcurrent
conditions by measuring the voltage developed
across a current-shunt resistor and comparing that
voltage to a user-defined threshold limit set by the
comparator reference pin. The current-shunt monitor
can measure differential voltage signals on common-
mode voltages that vary from –0.2 V up to 26 V,
independent of the supply voltage.
The open-drain alert output can be configured to
operate in two modes: transparent or latched. In
transparent mode, the output status follows the input
state. In latched mode, the alert output is cleared only
when the latch is reset. The standalone comparator
large-signal alert response time is less than 2 µs,
allowing for quick detection of overcurrent events.
The total system overcurrent protection response
time provided by the INA381 is less than 10 µs.
This device operates from a single 2.7-V to 5.5-V
supply, drawing a maximum supply current of 350 µA.
The device is specified over an operating temperature
range of –40°C to +125°C, and is available in 8-pin
WSON and 10-pin VSSOP packages.
Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
INA381 VSSOP (10) 3.00 mm × 3.00 mm
WSON (8) 2.00 mm × 2.00 mm
(1) For all available packages, see the package option addendum
at the end of the data sheet.
Typical Application
l TEXAS INSTRUMENTS
2
INA381
SBOS848B –DECEMBER 2017REVISED OCTOBER 2019
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Table of Contents
1 Features.................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 4
6.5 Electrical Characteristics........................................... 5
6.6 Typical Characteristics.............................................. 6
7 Detailed Description............................................ 13
7.1 Overview ................................................................. 13
7.2 Functional Block Diagram....................................... 13
7.3 Feature Description................................................. 14
7.4 Device Functional Modes........................................ 17
8 Applications and Implementation ...................... 19
8.1 Application Information............................................ 19
8.2 Typical Applications ................................................ 25
9 Power Supply Recommendations...................... 29
10 Layout................................................................... 30
10.1 Layout Guidelines ................................................. 30
10.2 Layout Example .................................................... 30
11 Device and Documentation Support ................. 31
11.1 Documentation Support ........................................ 31
11.2 Receiving Notification of Documentation Updates 31
11.3 Support Resources ............................................... 31
11.4 Trademarks........................................................... 31
11.5 Electrostatic Discharge Caution............................ 31
11.6 Glossary................................................................ 31
12 Mechanical, Packaging, and Orderable
Information ........................................................... 31
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (April 2018) to Revision B Page
Added DGS (VSSOP-8) package and associated content to data sheet ............................................................................. 1
Added specified temperature to offset voltage and gain error features bullets...................................................................... 1
Changed response time features bullet at 500 ns to propagation delay at 400 ns................................................................ 1
Changed applications bullets to new items ............................................................................................................................ 1
Added plus-minus symbol to TYP and MAX values of comparator offset voltage................................................................. 5
Changed Figure 54 to remove reset connection to supply................................................................................................... 30
Changes from Original (December 2017) to Revision A Page
Released to production .......................................................................................................................................................... 1
*9 TEXAS INSTRUMENTS
1IN+ 10 IN±
2VS+ 9 VOUT
3ALERT 8 CMPIN
4RESET 7 CMPREF
5GND 6 NC
Not to scale
1IN+ 8 IN±
2VS+ 7 VOUT
3ALERT 6 CMPIN
4RESET 5 CMPREF
Not to scale
Thermal Pad
3
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5 Pin Configuration and Functions
DGS Package
10-Pin VSSOP
Top View
DSG Package
8-Pin WSON
Top View
Pin Functions
PIN TYPE DESCRIPTION
NAME DGS DSG
ALERT 3 3 Digital output Overlimit alert, active low, open-drain output
CMPIN 8 6 Analog input Signal input to the comparator
CMPREF 7 5 Analog input Input reference to the comparator
GND 5 Ground Device ground. Connect the thermal pad to the system ground. See the layout
example in Figure 54.
IN– 10 8 Analog input Connect this pin to the load side of the shunt resistor
IN+ 1 1 Analog input Connect this pin to the supply side of the shunt resistor
NC 6 Not internal connection to device. This pin can be left floating, grounded, or
connected to the supply.
RESET 4 4 Digital input Transparent or latch mode selection input. See the Alert Modes section for a
detailed description on pin connections.
VOUT 9 7 Analog output Current-sense amplifier output voltage
VS+ 2 2 Supply Power supply: 2.7 V to 5.5 V
Thermal
Pad Thermal
Pad Ground reference for the device that is also the thermal pad used to conduct heat
from the device. Tie this pad externally to ground.
l TEXAS INSTRUMENTS
4
INA381
SBOS848B –DECEMBER 2017REVISED OCTOBER 2019
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(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) VIN+ and VIN– are the voltages at the IN+ and IN– pins, respectively.
(3) Input voltage may exceed the voltage shown without causing damage to the device if the current at that terminal is limited to 5 mA.
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VSSupply voltage 6 V
VIN+,VIN– Analog inputs (IN+, IN–) Differential (VIN+) – (VIN–)(2) –26 26 V
Common-mode (3) GND – 0.3 26
VIAnalog input CMPIN GND – 0.3 (VS) + 0.3 V
CMPREF GND – 0.3 (VS) + 0.3
VOAnalog output OUT GND – 0.3 (VS) + 0.3 V
Digital input RESET GND – 0.3 (VS) + 0.3 V
Digital output ALERT GND – 0.3 6 V
TJJunction temperature 150 °C
Tstg Storage temperature –65 150 °C
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.2 ESD Ratings
VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±3000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VCM Common-mode input voltage –0.2 12 26 V
VSOperating supply voltage 2.7 5 5.5 V
TAOperating free-air temperature –40 125 °C
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.4 Thermal Information
THERMAL METRIC(1)
INA381
UNITDGS (VSSOP) DSG (WSON)
10 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 188.6 77 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 78.1 96.5 °C/W
RθJB Junction-to-board thermal resistance 111.0 43.4 °C/W
ΨJT Junction-to-top characterization parameter 17.5 5.4 °C/W
ΨJB Junction-to-board characterization parameter 109.2 43.6 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A 18.8 °C/W
l TEXAS INSTRUMENTS
5
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(1) RTI = referred-to-input.
(2) Swing specifications are tested with an overdriven input condition.
6.5 Electrical Characteristics
at TA= 25°C, VSENSE = VIN+ – VIN– = 10 mV, VS= 5 V, VIN+ = 12 V, and CMPREF = 2 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT
CMRR Common-mode rejection ratio, RTI(1) VIN+ = 0 V to 26 V, TA= –40ºC to +125ºC 84 100 dB
VOS Offset voltage, RTI(1) VIN+ = 12 V, VIN– = 12 V ±100 ±500 μV
VIN+ = 0 V, VIN– = 0 V ±25 ±150
dVOS/dT Offset voltage drift, RTI(1) TA= –40ºC to +125ºC 0.1 1 μV/°C
PSRR Power-supply rejection ratio VS= 2.7 V to 5.5 V, TA= –40ºC to +125ºC ±8 ±40 μV/V
IBInput bias current VSENSE = 0 mV, IB+, IB80 μA
IOS Input offset current VSENSE = 0 mV ±0.05 μA
OUTPUT
G Gain
INA381A1 20
V/V
INA381A2 50
INA381A3 100
INA381A4 200
EGGain error VOUT = 0.5 V to VS– 0.5 V ±0.1% ±1%
Gain error drift TA= –40ºC to +125ºC 1.5 20 ppm/°C
Nonlinearity error VOUT= 0.5 V to VS– 0.5 V ±0.01%
Maximum capacitive load No sustained oscillation 1 nF
VOLTAGE OUTPUT
Swing to VSpower-supply rail RL= 10 kΩto GND, TA= –40ºC to +125ºC VS– 0.02 VS– 0.05 V
Swing to GND(2) RL= 10 kΩto GND, TA= –40ºC to +125ºC VGND +
0.0005 VGND +
0.005 V
FREQUENCY RESPONSE
BW Bandwidth
INA381A1 350
kHz
INA381A2 210
INA381A3 150
INA381A4 105
SR Slew rate 2 V/µs
NOISE
Voltage noise density 40 nV/Hz
COMPARATOR
tp
Propagation delay time, comparator only CMPIN Input overdrive = 20 mV 0.4 1
µs
Large-signal propagation
delay, comparator only CMPIN step = 0.5 V to 4.5, VCMPREF = 4 V 0.4 2
Small-signal total alert propogation delay,
comparator and amplifier Input overdrive = 1 mV 2 5
Slew rate limited total alert propagation
delay, comparator and amplifier VOUT = 0.5 V to 4.5, VCMPREF = 4 V 3 10
VOS Comparator offset voltage ±1 ±5 mV
HYS Hysteresis 50 mV
VIH High-level input voltage 1.4 6 V
VIL Low-level input voltage 0 0.4 V
VOL Alert low-level output voltage IOL = 3 mA 70 300 mV
ALERT pin leakage input current VOH = 3.3 V 0.1 1 μA
Digital leakage input current 0 VIN VS1μA
POWER SUPPLY
IQQuiescent current VSENSE = 10 mV, TA= +25ºC 250 350 μA
TA= –40ºC to +125ºC 450
*9 TEXAS INSTRUMENTS 5,533 5,535 5.22%: 100
Temperature (qC)
Offset Voltage (PV)
-50 -25 0 25 50 75 100 125 150
-100
-50
0
50
100
D005D005D005
A1
A2
A3
A4
Population
-80
-70
-60
-50
-40
-30
-20
-10
0
10
20
30
40
50
60
70
80
90
100
110
120
130
Input Offset Voltage (PV) D003
Population
-165
-150
-135
-120
-105
-90
-75
-60
-45
-30
-15
0
15
30
45
60
75
90
105
120
135
150
Input Offset Voltage (PV) D001
6
INA381
SBOS848B –DECEMBER 2017REVISED OCTOBER 2019
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6.6 Typical Characteristics
at TA= 25°C, VS= 5 V, VIN+ = 12 V, and alert pullup resistor = 10 kΩ(unless otherwise noted)
VIN+ = 0 V
Figure 1. Input Offset Voltage Production Distribution
(INA381A1)
VIN+ = 0 V
Figure 2. Input Offset Voltage Production Distribution
(INA381A2)
VIN+ = 0 V
Figure 3. Input Offset Voltage Production Distribution
(INA381A3)
VIN+ = 0 V
Figure 4. Input Offset Voltage Production Distribution
(INA381A4)
VIN+ = 0 V
Figure 5. Offset Voltage vs Temperature Figure 6. Common-Mode Rejection Production Distribution
(INA381A1)
*9 TEXAS INSTRUMENTS 5:233 E5335 5:233 .5533 :25;an
Population
-0.125
-0.115
-0.105
-0.095
-0.085
-0.075
-0.065
-0.055
-0.045
-0.035
-0.025
-0.015
-0.005
0.005
0.015
0.025
0.035
0.045
0.055
0.065
0.075
0.085
Gain Error (%)
D011
Population
-0.11
-0.1
-0.09
-0.08
-0.07
-0.06
-0.05
-0.04
-0.03
-0.02
-0.01
0
0.01
0.02
0.03
0.04
0.05
0.06
0.07
0.08
0.09
0.1
Gain Error (%) D012
Population
-10
-9
-8
-7
-6
-5
-4
-3
-2
-1
0
1
2
3
4
5
6
7
8
9
10
11
Common-Mode Rejection Ratio (PV/V) D009
Temperature (qC)
Common-Mode Rejection Ratio (PV/V)
-50 -25 0 25 50 75 100 125 150
-10
-8
-6
-4
-2
0
2
4
6
8
10
D010
A1
A2
A3
A4
7
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Typical Characteristics (continued)
at TA= 25°C, VS= 5 V, VIN+ = 12 V, and alert pullup resistor = 10 kΩ(unless otherwise noted)
Figure 7. Common-Mode Rejection Production Distribution
(INA381A2) Figure 8. Common-Mode Rejection Production Distribution
(INA381A3)
Figure 9. Common-Mode Rejection Production Distribution
(INA381A4) Figure 10. Common-Mode Rejection Ratio vs Temperature
Figure 11. Gain Error Production Distribution (INA381A1) Figure 12. Gain Error Production Distribution (INA381A2)
*9 TEXAS INSTRUMENTS 295335 14o 295335 120
Frequency (Hz)
Power-Supply Rejection Ratio (dB)
0
20
40
60
80
100
120
10 100 1k 10k 100k 1M
D017
Frequency (Hz)
Common-Mode Rejection Ratio (dB)
20
40
60
80
100
120
140
10 100 1k 10k 100k 1M
D018
A1
A2
A3
A4
Temperature (qC)
Gain Error (%)
-50 -25 0 25 50 75 100 125 150
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
D015
A1
A2
A3
A4
Frequency (Hz)
Gain (dB)
-10
0
10
20
30
40
50
10 100 1k 10k 100k 1M 10M
D016
A1
A2
A3
A4
Population
-0.12
-0.11
-0.1
-0.09
-0.08
-0.07
-0.06
-0.05
-0.04
-0.03
-0.02
-0.01
0
0.01
0.02
0.03
0.04
0.05
0.06
0.07
0.08
0.09
Gain Error (%) D013
Population
-0.23
-0.21
-0.19
-0.17
-0.15
-0.13
-0.11
-0.09
-0.07
-0.05
-0.03
-0.01
0.01
0.03
0.05
0.07
0.09
0.11
0.13
0.15
0.17
0.19
Gain Error (%) D014
8
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Typical Characteristics (continued)
at TA= 25°C, VS= 5 V, VIN+ = 12 V, and alert pullup resistor = 10 kΩ(unless otherwise noted)
Figure 13. Gain Error Production Distribution (INA381A3) Figure 14. Gain Error Production Distribution (INA381A4)
Figure 15. Gain Error vs Temperature Figure 16. Gain vs Frequency
Figure 17. Power-Supply Rejection Ratio vs Frequency Figure 18. Common-Mode Rejection Ratio vs Frequency
l TEXAS INSTRUMENTS 120 \\ 120 2w 450
Temperature (qC)
Quiescent Current (PA)
-75 -50 -25 0 25 50 75 100 125 150
235
240
245
250
255
260
D023
Common-Mode Voltage (V)
Quiescent Current (PA)
-5 0 5 10 15 20 25 30
200
250
300
350
400
450
D025
Common-Mode Voltage (V)
Input Bias Current (PA)
-5 0 5 10 15 20 25 30
-20
0
20
40
60
80
100
120
D021
Temperature (qC)
Input Bias Current (PA)
-50 -25 0 25 50 75 100 125 150
75
76
77
78
79
80
81
82
83
84
85
D022
Output Current (mA)
05 10 15 20 25 30 35 40 45 50 55 60
VS
V – 1
S
GND
GND + 1
GND + 2
Output Swing (V)
D019
125°C
25 C°
–40°C
V – 2
S
Common-Mode Voltage (V)
Input Bias Current (PA)
-5 0 5 10 15 20 25 30
-20
0
20
40
60
80
100
120
D020
9
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Typical Characteristics (continued)
at TA= 25°C, VS= 5 V, VIN+ = 12 V, and alert pullup resistor = 10 kΩ(unless otherwise noted)
Figure 19. Output Voltage Swing vs Output Current
Supply voltage = 5 V
Figure 20. Input Bias Current vs Common-Mode Voltage
Supply voltage = 0 V
Figure 21. Input Bias Current vs Common-Mode Voltage
(Both Inputs, Shutdown) Figure 22. Input Bias Current vs Temperature
Figure 23. Quiescent Current vs Temperature Figure 24. Quiescent Current vs Common-Mode Voltage
l TEXAS INSTRUMENTS mo Vow (mu mV'dw)
Time (250 Ps/div)
Voltage (2 V/div)
0 V
D028
Inverting Input
Output
Time (250 Ps/div)
Voltage (2 V/div)
0 V
D029
Noninverting Input
Output
Time (10 Ps/div)
Input Voltage
40 mV/div
Output Voltage
2 V/div
D026
Time (25 Ps/div)
Common-Mode Voltage (5 V/div)
VOUT (100 mV/div)
D027
VCM
VOUT
Frequency (Hz)
Input-Referred Voltage Noise (nV/Hz)
10
20
30
40
50
60
70
80
100
10 100 1k 10k 100k 1M
D024
Time (1 s/div)
Referred-to-Input
Voltage Noise (200 nV/div)
D025
10
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Typical Characteristics (continued)
at TA= 25°C, VS= 5 V, VIN+ = 12 V, and alert pullup resistor = 10 kΩ(unless otherwise noted)
Figure 25. Input-Referred Voltage Noise vs Frequency
(INA381A3 Devices)
Figure 26. 0.1-Hz to 10-Hz Voltage Noise (Referred-to-Input)
80-mVPP input step
Figure 27. Step Response Figure 28. Common-Mode Voltage Transient Response
Figure 29. Inverting Differential Input Overload Figure 30. Noninverting Differential Input Overload
‘5‘ TEXAS INSTRUMENTS :63 '8 may? #5; 22w
Temperature (qC)
Propagation Delay (ns)
-75 -50 -25 0 25 50 75 100 125 150
220
230
240
250
260
270
280
D038
Temperature (qC)
Propagation Delay (Ps)
-75 -50 -25 0 25 50 75 100 125 150
1.4
1.5
1.6
1.7
1.8
1.9
2
2.1
2.2
2.3
2.4
2.5
D039
A1
A2
A3
A4
Time (100 ns)
Voltage (1 V/div)
D036
CMPIN
ALERT
CMPREF
Time (1 Ps/div)
Voltage (1 V/div)
VSENSE Voltage (0.1 V/div)
D037
VSENSE
ALERT
CMPREF
VOUT
Time (5 Ps/div)
Voltage (1 V/div)
D033
VS
ALERT
VOUT
Time (100 Ps/div)
Voltage (1 V/div)
0 V
D032
Supply Voltage
Output Voltage
11
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Typical Characteristics (continued)
at TA= 25°C, VS= 5 V, VIN+ = 12 V, and alert pullup resistor = 10 kΩ(unless otherwise noted)
Figure 31. Start-Up Response Figure 32. Brownout Recovery
Figure 33. Comparator Propagation Delay Figure 34. VSENSE Voltage Response
Figure 35. Comparator Propagation Delay vs Temperature Figure 36. Total Propagation Delay vs Temperature
l TEXAS INSTRUMENTS my ASE
Time (5 Ps/div)
Voltage (1 V/div)
D042
RESET
ALERT
Low-Level Output Current (mA)
Low-Level Output Voltage (mV)
0 1 2 3 4 5 6 7 8 9 10
0
20
40
60
80
100
120
140
D040
Temperature (qC)
Hysteresis (mV)
-75 -50 -25 0 25 50 75 100 125 150
46.8
47.1
47.4
47.7
48
48.3
48.6
48.9
49.2
49.5
49.8
D041
12
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Typical Characteristics (continued)
at TA= 25°C, VS= 5 V, VIN+ = 12 V, and alert pullup resistor = 10 kΩ(unless otherwise noted)
Figure 37. Low-Level Output Voltage vs Low-Level Output
Current Figure 38. Hysteresis vs Temperature
Figure 39. Reset and Alert Voltage Response
l TEXAS INSTRUMENTS vs+
VOUT
RESET
ALERT
IN+
IN±
VS+
GND
CMPIN
CMPREF
10 k:
RPULL-UP
+
±
0 V to 26 V
+
±
G = 20, 50,
100, 200
ADC
GPIO
GPIO
R1 R2
Microcontroller
5 V
2.7 V to 5.5 V
RSENSE
Load
INA381
13
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7 Detailed Description
7.1 Overview
The INA381 is a zero-drift topology, current-sensing amplifier with an integrated comparator that can be used in
both low-side and high-side current-sensing and protection applications. This specially designed, current-sensing
amplifier accurately measures voltages developed across current-sensing resistors (also known as current-shunt
resistors) on common-mode voltages that far exceed the supply voltage powering the device. Current can be
measured on input voltage rails as high as 26 V, and the device can be powered from supply voltages as low as
2.7 V. The device can also withstand the full 26-V common-mode voltage at the input pins when the supply
voltage is removed without causing damage.
The zero-drift topology enables high-precision measurements with maximum input offset voltages as low as
150 µV, and a temperature contribution of only 1 µV/°C over the full temperature range of –40°C to +125°C. The
low total offset voltage of the INA381 enables the use of smaller current-sense resistor values, and allows for
more efficient system operation without sacrificing measurement accuracy due to the smaller input signal.
The device uses a reference input that simplifies setting the corresponding current threshold level to use for out-
of-range comparison. Combining the precision measurement of the current-sense amplifier and the onboard
comparator enables an all-in-one overcurrent detection device. This combination creates a highly-accurate
design that quickly detects out-of-range conditions, and allows the system to take corrective actions to prevent
potential component or system-wide damage.
7.2 Functional Block Diagram
l TEXAS INSTRUMENTS u2vm+25v V GND
IN+
IN±
±0.2 V to +26 V
Power Supply
IN+
IN±
High-side sensing
common-mode voltage (VCM)
is bus-voltage dependent.
Low-side sensing
common-mode voltage (VCM)
is always near ground and is
isolated from bus-voltage spikes.
Load
GND
RSENSE
RSENSE
14
INA381
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7.3 Feature Description
7.3.1 Wide Input Common-Mode Voltage Range
The INA381 supports input common-mode voltages from –0.2 V to +26 V. As a result of the internal topology, the
common-mode range is not restricted by the power-supply voltage (VS) as long as VSstays within the operational
range of 2.7 V to 5.5 V. As Figure 40 shows, the ability to operate with common-mode voltages greater or less
than VSallows the INA381 to be used in high-side, as well as low-side, current-sensing applications.
Figure 40. High-Side and Low-Side Current Sensing
7.3.2 Precise Low-Side Current Sensing
When used in low-side current-sensing applications, the offset voltage of the INA381 is less than 150 µV. The
low offset performance of the device has several benefits. First, the low offset allows the device to be used in
applications that must measure current over a wide dynamic range. In this case, the low offset voltage improves
accuracy when the sense currents are on the low end of the measurement range. Another advantage of low
offset voltage is the ability to sense lower voltage drops across the sense resistor accurately, thus allowing for a
lower-value shunt resistor. Lower-value shunt resistors reduce power loss in the current-sense circuit, and help
improve the power efficiency of the end application.
The gain error of the INA381 is specified to be within 1% of the actual value. As the sensed voltage becomes
much larger than the offset voltage, this gain error becomes the dominant source of error in the current-sense
measurement.
7.3.3 High Bandwidth and Slew Rate
The INA381 supports small-signal bandwidths as high as 350 kHz, and large-signal slew rates of 2 V/µs. The
ability to detect rapid changes in the sensed current, as well as the ability to quickly slew the output, makes the
INA381 a good choice for applications that require a quick response to input current changes. One application
that requires high bandwidth and slew rate is low-side motor control, where the ability to follow rapid changing
current in the motor allows for more accurate control over a wider operating range. Another application that
requires higher bandwidth and slew rates is system fault detection. The integrated comparator within the INA381
is designed to quickly detect when the sense current is out-of-range, and provide a digital output on the ALERT
pin for quicker and faster responses.
GPIO
GPIO
Microcontroller
ADC
VOUT
RESET
ALERT
VS+
GND
CMPIN
CMPREF
10 k:
RPULL-UP
+
±
+
±
G = 20, 50,
100, 200
R1 R2 5 V
2.7 V to 5.5 V
INA381
VOUT
ALERT
CMPREF
-1
0
1
2
3
4
5
6
Time (2ms/div)
Voltage (V)
15
INA381
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Feature Description (continued)
7.3.4 Alert Output
The ALERT pin is an active-low, open-drain output pulls low when the input conditions are out-of-range. This
open-drain output pin is recommended to include a 10-kΩpullup resistor to the supply voltage. This open-drain
pin can be pulled up to a voltage beyond the supply voltage, VS, but must not exceed 5.5 V.
Figure 41 shows the alert output response of the internal comparator. When the output voltage of the amplifier is
less than the reference voltage set on CMPREF, the comparator output is in the default high state. When the
amplifier output voltage exceeds the reference voltage set at the CMPREF pin, the comparator output becomes
active and pulls low. This active low output indicates that the measured signal at the amplifier input has
exceeded the programmed threshold level, indicating an overcurrent or out-of-range condition has occurred. See
the Alert Modes section for more information about how to set the alert output behavior.
Figure 41. Overcurrent Alert Response
7.3.5 Adjustable Overcurrent Threshold
The VOUT voltage is the amplified voltage developed across the current-sensing resistor. The signal developed
at the VOUT pin is the input voltage across the IN+ and IN– pins multiplied by the gain of the amplifier. The
INA381 has four gain options, as shown in Figure 42: 20 V/V, 50 V/V, 100 V/V, and 200 V/V. If additional
hysteresis is not required, directly connect the VOUT pin to the CMPIN pin.
Figure 42. Resistor Divider Voltage
l TEXAS INSTRUMENTS 7m
VCMPREF ± 50 mV VCMPREF
VCMPIN
ALERT
Alert
Output
ALERT
CMPREF
CMPIN, VOUT
4 V
Vs
4 V
VOUT
RESET
ALERT
VS+
GND
CMPIN
CMPREF
10 k:
RPULL-UP
+
±
+
±
G = 20, 50,
100, 200
5 V
2.7 V to 5.5 V
INA381
REF3140
4 V
0.2% , 15ppm/°C
VS+
16
INA381
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Feature Description (continued)
The device determines if an overcurrent event is present by comparing the voltage on the CMPIN pin to the
corresponding signal developed at the CMPREF pin. The threshold voltage for the CMPREF pin can be set with
a resistive divider, or by connecting an external voltage source (such as a reference generator device). Figure 43
depicts the REF3140 used as an external reference source.
Figure 43. External Reference Voltage
7.3.6 Comparator Hysteresis
The onboard comparator in the INA381 is designed to reduce the possibility of oscillations in the alert output
when the measured signal level is near the overlimit threshold level as a result of noise. When the voltage
(VCMPIN) exceeds the voltage developed at the CMPREF pin, the ALERT pin asserts and pulls low. The output
voltage must drop to less than the CMPREF pin threshold voltage, as shown in Figure 44, by the hysteresis level
of 50 mV so that the ALERT pin deasserts and returns to the nominal high state. The INA381 is designed with a
hysteresis of 50 mV.
Figure 44. Typical Comparator Hysteresis
l TEXAS INSTRUMENTS
17
INA381
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7.4 Device Functional Modes
7.4.1 Alert Modes
The device has two output operating modes, transparent and latched, that are selected based on the RESET pin
setting. These modes change how the ALERT pin responds after an alert when the overcurrent condition is
removed.
7.4.1.1 Transparent Output Mode
The device is set to transparent mode when the RESET pin is pulled low, allowing the output alert state to
change and follow the input signal with respect to the programmed alert threshold. For example, when the
differential input signal exceeds the alert threshold, the alert output pin is pulled low. When the differential input
signal drops to less than the alert threshold, the output returns to the default high-output state. A common
implementation using the device in transparent mode is to connect the ALERT pin to a hardware interrupt input
on a microcontroller. When an overcurrent condition is detected and the ALERT pin is pulled low, the controller
interrupt pin detects the output state change and begins making changes to the system operation required to
address the overcurrent condition. Under this configuration, the ALERT pin high-to-low transition is captured by
the microcontroller, and the output returns to the default high state when the overcurrent event is removed.
7.4.1.2 Latch Output Mode
Some applications cannot continuously monitor the state of the output ALERT pin to detect an overcurrent
condition, as described in the Transparent Output Mode section. A typical example of this type of application is a
system that only periodically polls the ALERT pin state to determine if the system is functioning correctly. If the
device is set to transparent mode in this type of application, the state change of the ALERT pin can be missed
when ALERT is pulled low if the out-of-range condition does not appear during one of these periodic polling
events. Latch output mode is specifically intended to accommodate these applications.
As shown in Table 1, the device is placed into the corresponding output mode based on the signal connected to
RESET. The difference between latch mode and transparent mode is how the alert output responds when an
overcurrent event ends. In transparent mode (RESET = low), when the differential input signal drops below the
limit threshold level after the ALERT pin asserts because of an overcurrent event, the state of the ALERT pin
returns to the default high setting to indicate that the overcurrent event is complete.
Table 1. Output Mode Settings
OUTPUT MODE RESET PIN SETTING
Transparent RESET = low
Latch RESET = high
In latch mode (RESET = high), when an overlimit condition is detected and the ALERT pin is pulled low, the
ALERT pin does not return to the default high state when the differential input signal drops to less than the alert
threshold level. To clear the alert, the RESET pin must be pulled low for at least 100 ns. If the differential input
signal is less than the alert threshold, pull the RESET pin low to return ALERT to the default high level. If the
input signal exceeds the threshold limit when the RESET pin is pulled low, the ALERT pin remains low. When the
alert condition is detected by the system controller, set the RESET pin back to high to place the device back in
latch mode.
l TEXAS INSTRUMENTS
VOUT
(VIN+ ± VIN±) × GAIN
VCPMPREF
0 V
ALERT1
RESET Latch Mode
Transparent Mode
Alert Does Not Clear
Alert Clears
18
INA381
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Figure 45 shows the latch and transparent modes. In Figure 45, when VIN drops to less than the VLIMIT threshold
for the first time, the RESET pin pulls high. With the RESET pin pulled high, the device is set to latch mode so
that the alert output state does not return high when the input signal drops to less than the VLIMIT threshold. Only
when the RESET pin is pulled low does the ALERT pin return to the default high level, thus indicating that the
input signal is below the limit threshold. When the input signal drops to less than the limit threshold for the
second time, the RESET pin is already pulled low. The device is set to transparent mode at this point, and the
ALERT pin is pulled back high when the input signal drops below the alert threshold.
Figure 45. Transparent Mode Versus Latch Mode
l TEXAS INSTRUMENTS
19
INA381
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8 Applications and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TIs customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The INA381 is designed to enable easy configuration for detecting overcurrent conditions in an application. This
device is individually targeted towards unidirectional overcurrent detection of a single threshold. However, this
device can also be paired with additional devices and circuitry to create more complex monitoring functional
blocks.
8.1.1 Select a Current-Sensing Resistor
The device measures the differential voltage developed across a resistor when current flows through the
component to determine if the current being monitored exceeds a defined limit. This resistor is commonly
referred to as a current-sensing resistor or a current-shunt resistor, with each term commonly used
interchangeably. The flexible design of the device allows for measuring a wide differential input signal range
across this current-sensing resistor.
Selecting the value of this current-sensing resistor is based primarily on two factors: the required accuracy of the
current measurement and the allowable power dissipation across the current-sensing resistor. Larger voltages
developed across this resistor allow for more accurate measurements to be made. Amplifiers have fixed internal
errors that are largely dominated by the inherent input offset voltage. When the input signal decreases, these
fixed internal amplifier errors become a larger portion of the measurement and increase the uncertainty in the
measurement accuracy. When the input signal increases, the measurement uncertainty is reduced because the
fixed errors are a smaller percentage of the signal being measured. Therefore, the use of larger-value, current-
sensing resistors inherently improves measurement accuracy.
However, a system design trade-off must be evaluated through use of larger input signals for improving the
measurement accuracy. Increasing the current-sense resistor value results in increased power dissipation across
the current-sensing resistor. Increasing the value of the current-shunt resistor increases the differential voltage
developed across the resistor when current passes through the component. This increase in voltage across the
resistor increases the power that the resistor must be able to dissipate. Decreasing the value of the current-shunt
resistor value reduces the power dissipation requirements of the resistor, but increases the measurement errors
resulting from the decreased input signal. Selecting the optimal value for the shunt resistor requires factoring
both the accuracy requirement for the specific application and the allowable power dissipation of this component.
An increasing number of very low ohmic-value resistors are becoming more widely available with values reaching
down as low as 1 mΩor lower with power dissipations of up to 5 W that enable large currents to be accurately
monitored with sensing resistors.
l TEXAS INSTRUMENTS
20
INA381
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Application Information (continued)
8.1.1.1 Select a Current-Sensing Resistor: Example
In this example, the trade-offs involved in selecting a current-sensing resistor are discussed. This example
requires 5% accuracy for detecting a 10-A overcurrent event under 20 µs where only 250 mW is allowable for the
dissipation across the current-sensing resistor at the full-scale current level. Although the maximum power
dissipation is defined as 250 mW, a lower dissipation is preferred to improve system efficiency. Given the total
error budget of 5%, the INA381 total error is less than 1%. The INA381 is well suited for this application because
up to 1% of error is available to be attributed to the measurement error of the device under these conditions.
As shown in Table 2, the maximum value calculated for the current-sensing resistor with these requirements is
2.5 mΩ. Although this value satisfies the maximum power dissipation requirement of 250 mW, headroom is
available from the 2.5% maximum total overcurrent detection error to reduce the value of the current-sensing
resistor and reduce the power dissipation further. Selecting a 1.5-mΩ, current-sensing resistor value offers a
good tradeoff for reducing the power dissipation in this scenario by approximately 40% and still remaining within
the accuracy region.
Table 2. Calculating the Current-Sensing Resistor (RSENSE)
PARAMETER EQUATION VALUE UNIT
IMAX Maximum current 10 A
PD_MAX Maximum allowable power dissipation 250 mW
RSENSE_MAX Maximum allowable RSENSE PD_MAX / IMAX22.5 mΩ
VOS Offset voltage, VCM = 12 V 500 µV
VOS_ERROR Initial offset voltage error (VOS / (RSENSE_MAX × IMAX ) × 100 2%
EGGain error 1%
ERRORTOTAL Total measurement error (VOS_ERROR2+ EG2) 2.23%
Allowable current threshold accuracy 5%
tpTotal system overcurrent response time 10 µs
Allowable overcurrent response 20 µs
l TEXAS INSTRUMENTS
 
HYS
HYS
V 4 A 12500
R
4 A
P u :
P
Internal
Hysteresis
Control
VOUT
RESET
ALERT
IN+
IN±
VS+
GND
CMPIN
CMPREF
10 k:
RPULL-UP
+
±
0 V to 26 V
+
±
G = 20, 50,
100, 200
R1 R2
5 V
2.7 V to 5.5 V
RSENSE
Load
INA381
12.5 k
RHYS
4 µA
VS+
21
INA381
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8.1.2 Increase Comparator Hysteresis
The onboard comparator of the device is designed with a hysteresis of 50 mV. The INA381 is designed for the
user to change the hysteresis from a preset value of 50 mV by connecting an external resistor between VOUT
and CMPIN. Figure 46 shows a detailed block diagram of adding additional hysteresis.
Figure 46. Increase Hysteresis to the Comparator
The default hysteresis is 50 mV. Internal to the comparator, the INA381 has a current source of 4 µA in series
with 12.5 kΩ. The internal current source and hysteresis of the comparator is set by the internal hysteresis
control circuit that is enabled only after ALERT is asserted low. ALERT is asserted low during an overcurrent
condition when the voltage on VOUT exceeds the threshold set on the CMPREF pin. The internal 4-µA
hysteresis circuits are triggered only after ALERT is asserted low.
To increase hysteresis to greater than the default 50 mV, the RHYS resistor must be connected between the
VOUT and CMPIN pins. Equation 1 describes the internal configuration to set the external hysteresis resistor.
where
• VHYS is the desired hysteresis voltage
• RHYS is the external resistor on the input of the CMPIN pin (1)
Table 3 lists the external resistors required at the input of the CMPIN pin to set the hysteresis.
Table 3. Hysteresis Resistor Selection
HYSTERESIS VOLTAGE EXTERNAL RESISTOR AT THE CMPIN PIN
50 mV 0 Ω
75 mV 6.25 kΩ
100 mV 12.5 kΩ
125 mV 18.75 kΩ
150 mV 25 kΩ
200 mV 37.5 kΩ
250 mV 50 kΩ
300 mV 62.5 kΩ
ALERT
IN+
IN±
GND
CMPIN
10 k:
RPULL-UP
+
±
±0.2 V to 26 V
+
±
G = 20, 50,
100, 200
2.7 V to 5.5 V
RSENSE
Load
INA381
< 10
< 10
VOUT
VS+
RESET
CMPREF
R1 R25 V
RESET
ALERT
IN+
IN±
GND
CMPIN
CMPREF
10 k:
RPULL-UP
+
±
0 V to 26 V
+
±
G = 20, 50,
100, 200
R1 R25 V
2.7 V to 5.5 V
RSENSE
Load
INA381
< 10
< 10
VOUT
VS+
22
INA381
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8.1.3 Operation With Common-Mode Transients Greater Than 26 V
With a small amount of additional circuitry, the INA381 can be used in circuits subject to transients greater than
26 V. Use only Zener diodes or Zener-type transient absorbers (sometimes referred to as transorbs)—any other
type of transient absorber has an unacceptable time delay. Start by adding a pair of resistors as shown in
Figure 47 as a working impedance for the Zener diode. Keep these resistors as small as possible; most often
approximately 10 . Larger values can be used with an effect on gain that is discussed in the Input Filtering
section. This circuit limits only short-term transients and, therefore, many applications are satisfied with a 10-
resistor along with conventional Zener diodes of the lowest acceptable power rating. This combination uses the
least amount of board space. These diodes can be found in packages as small as SOT-523 or SOD-523.
Figure 47. Transient Protection
In the event that low-power Zener diodes do not have sufficient transient absorption capability, use a higher-
power transorb. Figure 47 shows that the most package-efficient solution involves using a single transorb and
back-to-back diodes between the device inputs. The most space-efficient solutions are dual, series-connected
diodes in a single SOT-523 or SOD-523 package. In either of the examples provided in Figure 47 and Figure 48,
the total board area required by the INA381 with all protective components is less than that of an SOIC-8
package, and only slightly greater than that of a VSSOP-8 package.
Figure 48. Transient Protection Using a Single Transorb and Input Clamps
l TEXAS INSTRUMENTS AP
VOUT
RESET
ALERT
IN+
IN±
VS+
GND
CMPIN
CMPREF
10 k:
RPULL-UP
+
±
0 V to 26 V
+
±
G = 20, 50,
100, 200
R1 R2 5 V
2.7 V ± 5.5 V
RSENSE
Load
INA381
< 10
< 10
CFILTER
23
INA381
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8.1.4 Input Filtering
If the INA381 output is connected to a high-impedance input, the device output is the best location to filter, using
a simple RC network from VOUT to GND. Filtering at the output attenuates high-frequency disturbances in the
common-mode voltage, differential input signal, and INA381 power-supply voltage. If filtering at the output is not
possible, or if only the differential input signal needs filtering, a filter can be applied at the input pins of the
device.
External filtering helps reduce the amount of noise that reaches the comparator, and thereby reduces the
likelihood of a false alert. The tradeoff to adding this noise filter is that the alert response time is increased
because both the input signal and noise are filtered. Figure 49 shows the implementation of an input filter for the
device.
Figure 49. Input Filter
The addition of external series resistance creates an additional error in the measurement; therefore, the value of
these series resistors must be kept to 10 Ω(or less, if possible) to reduce impact to accuracy. As shown in
Figure 49, the internal bias network present at the input pins creates a mismatch in input bias currents when a
differential voltage is applied between the input pins. If additional external series filter resistors are added to the
circuit, the mismatch in bias currents results in a mismatch of voltage drops across the filter resistors. This
mismatch creates a differential error voltage that subtracts from the voltage developed across the shunt resistor.
This error results in a voltage at the device input pins that is different than the voltage developed across the
shunt resistor. Without the additional series resistance, the mismatch in input bias currents has negligible effect
on device operation. Equation 2 is used to calculate the gain error factor that is used with Equation 3 to calculate
the percentage gain error when using external filter resistors.
l TEXAS INSTRUMENTS 1250 R. XF+ X‘NT+FXINT 25000 x F + 10000 x F + 1000 2500 x F + Gain Error (0/0) = 100 , (100 x Gain Error Factor)
Gain Error (%) = 100 (100 Gain Error Factor)- ´
F
2500
(3 R ) 2500u
F
1000
R 1000
F
10000
(9 R ) 10000u
F
25000
(21 R ) 25000u
INT
F INT F INT
1250 R
Gain Error Factor (1250 R ) (1250 R ) (R R )
u
u u u
24
INA381
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Equation 2 shows that the amount of variance in the differential voltage present at the device input relative to the
voltage developed at the shunt resistor is based both on the external series resistance (RF) value as well as
internal input resistor RINT. The reduction of the shunt voltage reaching the device input pins appears as a gain
error when comparing the output voltage relative to the voltage across the shunt resistor. Use Equation 2 to
calculate the expected deviation from the shunt voltage to what is measured at the device input pins:
where:
• RINT is the internal input resistor
• RFis the external series resistance (2)
The adjustment factor from Equation 2 including the device internal input resistance shown in Table 4 varies with
each gain version. Table 5 lists each individual device gain error factor.
Table 4. Input Resistance
PRODUCT GAIN RINT (kΩ)
INA381A1 20 25
INA381A2 50 10
INA381A3 100 5
INA381A4 200 2.5
Table 5. Device Gain Error Factor
PRODUCT SIMPLIFIED GAIN ERROR FACTOR
INA381A1
INA381A2
INA381A3
INA381A4
Use Equation 3 to then calculate the gain error that can be expected from the addition of the external series
resistors:
(3)
For example, using an INA381A2 and the corresponding gain error equation from Table 5, a series resistance of
10 Ωresults in a gain error factor of 0.991. The corresponding gain error is then calculated using Equation 3,
resulting in an additional gain error of approximately 0.89% solely because of the external 10-Ωseries resistors.
l TEXAS INSTRUMENTS
±0.2 V to +26 V
Load
VS
IN+
IN±
2.7 V to 5.5 V
IN+
IN±
2.7 V to 5.5 V
10 k:
RPULL-UP
VOUT
ALERT
ALERT
10 k:
RPULL-UP
CMPIN
CMPIN
VOUT
G = 20, 50,
100, 200
G = 20, 50,
100, 200
INA381
INA381
5 V
5 V
R1 R2
R3 R4 CMPREF
CMPREF
VS+
VS+
+
±
+
±
RSENSE
+
±
+
±
RESET
RESET
25
INA381
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8.2 Typical Applications
8.2.1 Bidirectional Window Comparator
Figure 50. Bidirectional Window Comparator
8.2.1.1 Design Requirements
Table 6 lists the parameters for a design example of a high-side INA381 measuring in the forward direction, and
one low-side INA381 measuring in the reverse direction. This example designs for maximum accuracy and also
uses the alert function of both devices.
Table 6. Design Parameters
DESIGN PARAMETER EXAMPLE VALUE
RSENSE 12 mΩ
Power-supply voltage 5 V
Common-mode voltage 20 V
Maximum sense current 20 A
Small-signal bandwidth > 120 kHz
Alert current threshold 19 A
l TEXAS INSTRUMENTS Input
Alert Output
(1 V/div)
Time (5 ms/div)
Input
(5 mV/div)
Positive Limit
Negtive Limit
0V
26
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8.2.1.2 Detailed Design Procedure
Although the device is only able to measure current through a current-sensing resistor flowing in one direction, a
second INA381 can be used to create a bidirectional monitor. With the input pins of a second device reversed
across the same current-sensing resistor, the second device is now able to detect current flowing in the other
direction relative to the first device; see Figure 50. The outputs of each device connect to an AND gate to detect
if either of the limit threshold levels are exceeded. As shown in Table 7, the output of the AND gate is high if
neither overcurrent limit thresholds are exceeded. A low output state of the AND gate indicates that the positive
overcurrent limit or the negative overcurrent limit has been exceeded.
Table 7. Bidirectional Overcurrent Output Status
OCP STATUS OUTPUT
OCP+ 0
OCP– 0
No OCP 1
In this scenario, the maximum current expected through the shunt resistor is 20 A in either the forward or reverse
direction. Maximum accuracy is desired; therefore, the shunt resistor is maximized by taking the maximum output
swing divided by the smallest gain and divided by the maximum current. The design parameters used in Table 6
yield a shunt value of 12.3 m. The closest standard 1% and 0.1% device is 12 m, and this value is used by
both INA381 devices.
Because corrective action must be taken when the current exceeds ±19 A, the comparators require a value of
4.56 V (19 A × 0.012 × 20 V/V). In this instance, a voltage divider consisting of two 4.53-kresistors (R1 and
R3) and two 5-kresistors (R2 and R4) off the 5-V rail supply a voltage close to this value. To be certain that
both device alert functions can trigger a single GPIO pin on a microcontroller, both comparator outputs feed into
an AND gate.
8.2.1.3 Application Curve
Figure 51. Bidirectional Operation
‘5‘ TEXAS INSTRUMENTS
VOUT
RESET
ALERT
IN+
IN±
VS+
GND
CMPIN
CMPREF
10 NŸ
RPULL-UP
+
±
+
-
G = 200
2.5 NŸ
5 V
5 V
INA381
Boost
Converter
12 V 90 V
Gate
Driver
10 NŸ
5 V
R1 R2
Enable, Disable
5 m
27
INA381
www.ti.com
SBOS848B –DECEMBER 2017REVISED OCTOBER 2019
Product Folder Links: INA381
Submit Documentation FeedbackCopyright © 2017–2019, Texas Instruments Incorporated
8.2.2 Solenoid Low-Side Current Sensing
Figure 52. Solenoid Low-Side Current-Sensing
8.2.2.1 Design Requirements
Table 8 lists the parameters of an application design using the INA381 and ALERT functionality to create a low-
side current-sense amplifier with less than a 20-µs system shutdown.
Table 8. Design Parameters
DESIGN PARAMETERS EXAMPLE VALUE
Power-supply voltage 5 V
Low-side current sensing VCM = 0 V
Mode of operation Unidirectional
Maximum current sense threshold 4.0 A
ALERT response time < 20 µs
ALERT pin mode Transparent
RSENSE resistor 5 mΩ
Gain option 200 V/V
l TEXAS INSTRUMENTS
28
INA381
SBOS848B –DECEMBER 2017REVISED OCTOBER 2019
www.ti.com
Product Folder Links: INA381
Submit Documentation Feedback Copyright © 2017–2019, Texas Instruments Incorporated
8.2.2.2 Detailed Design Procedure
The INA381 can measure current across a shunt resistor with common-mode voltage ranges from –0.3 V to
+26 V. The INA381 is capable of measuring low-side current sensing allowing enough margin below ground to
accurately measure current through the load. One common application for low-side current sensing is a solenoid
control application. As described in Figure 52, a typical high-voltage solenoid application consists of a high-
voltage NMOS transistor, a low-ohmic shunt resistor connected to the source of the NMOS transistor, and a
solenoid. A solenoid is often used for applications that control a relay that triggers an on-off state. As current
flows through the solenoid, the current flowing through the copper windings generate a magnetic field around the
iron that can be used to open or close a relay. Industrial valves, electromechanical relays, and PLC control relays
are often built of solenoids, and the driver circuitry for solenoids are designed discretely, as shown in Figure 52.
A microcontroller unit is often used to control the duty cycle of the NMOS switch to control the position of the
solenoid. By controlling the duty cycle of the solenoid driver, the current flowing through the solenoid can be
controlled, which in turn can be used to perform position control. However, for applications that need two states,
on and off, a microcontroller can be expensive and overkill. If a solenoid is located remotely in specific
application, the routing of the current-sense amplifier signal back to the microcontroller can create additional
overhead and often increase the cost of the application. The INA381 has a built-in comparator that can be
programmed to assert an ALERT when the CMPIN signal exceeds the CMPREF threshold signal. The ALERT
signal can be used to feed the ALERT signal back to the gate driver circuitry of the NMOS, which can disable the
NMOS switch to turn the circuit off to protect from damage. Effective impedance of a solenoid is an inductor in
series with a resistance. If the solenoid is prone to damage, the inductor can lose inductance and behave as a
shorted resistor. If not protected, high current can flow through the solenoid and damage the system, causing
permanent failure. The INA381, with an ALERT pin that responds in as fast as 10 µs, can be directly connected
to the NMOS driver to remove power from the solenoid in the event of an overcurrent condition. When the load
current decreases to less than the safe operating limit, the ALERT clears and enables safe operation of the
solenoid. This design example can be used as a guideline to implement the INA381 for a solenoid application.
Based on Equation 4, the design example for the CMPREF voltage is 4 V. The threshold voltage is set using
simple resistor dividers R1 and R2. R1 is set with 2.5 kΩ, and R2 is set with 10 kΩ. This 4-V threshold is set at
the CMPREF pin. When the current exceeds 4 A, voltage on VOUT exceeds 4 V, and the ALERT pin asserts a
low signal indicating a fault detection. The device is configured in transparent mode by connecting the RESET
pin to ground. Because of this configuration, when the current signal falls below 4 A of current, the ALERT pin is
pulled high and resets the fault detection, maintaining safe operation of the solenoid. This example explains a
methodology where a solenoid can be self-protected and triggered based on a set, safe-operating, current
threshold.
In this application, 4 A and higher are considered overcurrent conditions and some corrective action must be
taken to prevent the current from destroying the system. The INA381 offers corrective action through an ALERT
pin that can be tailored for a specific overcurrent condition through the CMPREF pin. To set the proper CMPREF
value, a gain option and an RSENSE value must first be determined. This design example uses a gain of 200 V/V
and an RSENSE value of 5 mΩ. CMPREF is calculated according to Equation 4 in this particular case. This value
is calculated to be approximately 4 V. This value can be achieved through either a voltage divider or LDO. In this
particular instance, the voltage divider was chosen.
CMPREF (V) = [Alert Threshold (A) × Shunt Resistor (Ω)+VOS (V)] × Gain (4)
I\/ H~
-1
0
1
2
3
4
5
6
Time (2ms/div)
Voltage (V)
VOUTALERT CMPREF
29
INA381
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8.2.2.3 Application Curve
Figure 53. Low-Side Sensing Application Curve
9 Power Supply Recommendations
The device input circuitry accurately measures signals on common-mode voltages beyond the power-supply
voltage, VS. For example, the voltage applied to the VS+ power-supply pin can be 5 V, whereas the load power-
supply voltage being monitored (VCM) can be as high as 26 V. The device can withstand the full –0.2-V to +26-V
range at the input pins, regardless of whether the device has power applied or not.
Power-supply bypass capacitors are required for stability and must be placed as closely as possible to the supply
and ground pins of the device. A typical value for this supply bypass capacitor is 0.1 µF. Applications with noisy
or high-impedance power supplies can require additional decoupling capacitors to reject power-supply noise.
I TFJms INSTRUMENTS Pmne
RSHUNT
CBYPASS
Load
Power Supply
1
2
3
10
9
8
7
6
4
5
VIA to
Ground
Plane
IN+
VS+
ALERT
RESET
IN±
VOUT
CMPIN
CMPREF
INA381DGS
VIA to
Power
Supply
VIA to Ground
Plane
N.C.GND
RSHUNT
CBYPASS
Load
Power Supply
VIA to
Ground
Plane
IN+
VS+
ALERT
RESET
IN±
VOUT
CMPIN
CMPREF
VIA to
Power
Supply
VIA to
Ground
Plane
1
2
3
10
9
8
7
4
30
INA381
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Product Folder Links: INA381
Submit Documentation Feedback Copyright © 2017–2019, Texas Instruments Incorporated
10 Layout
10.1 Layout Guidelines
Place the power-supply bypass capacitor as closely as possible to the supply and ground pins. The
recommended value of this bypass capacitor is 0.1 µF. Add decoupling capacitance to compensate for noisy
or high-impedance power supplies.
Make sure that the thermal pad and GND are connected to a solid ground plane of the PCB.
Pull up the open-drain output pin to the supply voltage rail through a 10-kΩpullup resistor.
10.2 Layout Example
Figure 54. Recommended Layout for DSG Package
Figure 55. Recommended Layout for DGS Package
l TEXAS INSTRUMENTS
31
INA381
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Product Folder Links: INA381
Submit Documentation FeedbackCopyright © 2017–2019, Texas Instruments Incorporated
11 Device and Documentation Support
11.1 Documentation Support
11.1.1 Related Documentation
For related documentation see the following:
Texas Instruments, REF31xx 15-ppm/°C Maximum, 100-μA, SOT-23 Series Voltage Reference data sheet
Texas Instruments, INA381EVM user's guide
11.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
11.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
11.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
11.6 Glossary
SLYZ022 TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
I TEXAS INSTRUMENTS Samples Samples Samples Samples Samples Samples Samples Sample: Sample: Samples Samples Samples Samples Samples Samples Samples
PACKAGE OPTION ADDENDUM
www.ti.com 28-Sep-2021
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
INA381A1IDGSR ACTIVE VSSOP DGS 10 2500 RoHS & Green NIPDAUAG Level-2-260C-1 YEAR -40 to 125 1XM6
INA381A1IDGST ACTIVE VSSOP DGS 10 250 RoHS & Green NIPDAUAG Level-2-260C-1 YEAR -40 to 125 1XM6
INA381A1IDSGR ACTIVE WSON DSG 8 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 1HWY
INA381A1IDSGT ACTIVE WSON DSG 8 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 1HWY
INA381A2IDGSR ACTIVE VSSOP DGS 10 2500 RoHS & Green NIPDAUAG Level-2-260C-1 YEAR -40 to 125 1XN6
INA381A2IDGST ACTIVE VSSOP DGS 10 250 RoHS & Green NIPDAUAG Level-2-260C-1 YEAR -40 to 125 1XN6
INA381A2IDSGR ACTIVE WSON DSG 8 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 1HXY
INA381A2IDSGT ACTIVE WSON DSG 8 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 1HXY
INA381A3IDGSR ACTIVE VSSOP DGS 10 2500 RoHS & Green NIPDAUAG Level-2-260C-1 YEAR -40 to 125 1XO6
INA381A3IDGST ACTIVE VSSOP DGS 10 250 RoHS & Green NIPDAUAG Level-2-260C-1 YEAR -40 to 125 1XO6
INA381A3IDSGR ACTIVE WSON DSG 8 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 1HZY
INA381A3IDSGT ACTIVE WSON DSG 8 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 1HZY
INA381A4IDGSR ACTIVE VSSOP DGS 10 2500 RoHS & Green NIPDAUAG Level-2-260C-1 YEAR -40 to 125 1XP6
INA381A4IDGST ACTIVE VSSOP DGS 10 250 RoHS & Green NIPDAUAG Level-2-260C-1 YEAR -40 to 125 1XP6
INA381A4IDSGR ACTIVE WSON DSG 8 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 1I1Y
INA381A4IDSGT ACTIVE WSON DSG 8 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 1I1Y
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
I TEXAS INSTRUMENTS
PACKAGE OPTION ADDENDUM
www.ti.com 28-Sep-2021
Addendum-Page 2
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF INA381 :
Automotive : INA381-Q1
NOTE: Qualified Version Definitions:
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
I TEXAS INSTRUMENTS REEL DIMENSIONS TAPE DIMENSIONS ’ I+K0 '«Pt» Reel Dlameter AD Dimension destgned to accommodate the component wmth at) Dimension destgned to accommodate the component Iength K0 Dtmenston destgned to accommodate the component thickness 7 w Ovevau with at the earner tape i Pt PIlCh between successtve cavtty centers f T Reel Width (wt) QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE C) O O D C) O D O iSDrockeIHuIes —> User DtreCIIDn OI Feed \I/ Pockel Quadrams
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
INA381A1IDGSR VSSOP DGS 10 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
INA381A1IDGST VSSOP DGS 10 250 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
INA381A1IDSGR WSON DSG 8 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
INA381A1IDSGT WSON DSG 8 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
INA381A2IDGSR VSSOP DGS 10 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
INA381A2IDGST VSSOP DGS 10 250 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
INA381A2IDSGR WSON DSG 8 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
INA381A2IDSGT WSON DSG 8 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
INA381A3IDGSR VSSOP DGS 10 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
INA381A3IDGST VSSOP DGS 10 250 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
INA381A3IDSGR WSON DSG 8 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
INA381A3IDSGT WSON DSG 8 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
INA381A4IDGSR VSSOP DGS 10 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
INA381A4IDGST VSSOP DGS 10 250 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
INA381A4IDSGR WSON DSG 8 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
INA381A4IDSGT WSON DSG 8 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
PACKAGE MATERIALS INFORMATION
www.ti.com 17-Jul-2020
Pack Materials-Page 1
I TEXAS INSTRUMENTS TAPE AND REEL BOX DIMENSIONS
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
INA381A1IDGSR VSSOP DGS 10 2500 366.0 364.0 50.0
INA381A1IDGST VSSOP DGS 10 250 366.0 364.0 50.0
INA381A1IDSGR WSON DSG 8 3000 210.0 185.0 35.0
INA381A1IDSGT WSON DSG 8 250 210.0 185.0 35.0
INA381A2IDGSR VSSOP DGS 10 2500 366.0 364.0 50.0
INA381A2IDGST VSSOP DGS 10 250 366.0 364.0 50.0
INA381A2IDSGR WSON DSG 8 3000 210.0 185.0 35.0
INA381A2IDSGT WSON DSG 8 250 210.0 185.0 35.0
INA381A3IDGSR VSSOP DGS 10 2500 366.0 364.0 50.0
INA381A3IDGST VSSOP DGS 10 250 366.0 364.0 50.0
INA381A3IDSGR WSON DSG 8 3000 210.0 185.0 35.0
INA381A3IDSGT WSON DSG 8 250 210.0 185.0 35.0
INA381A4IDGSR VSSOP DGS 10 2500 366.0 364.0 50.0
INA381A4IDGST VSSOP DGS 10 250 366.0 364.0 50.0
INA381A4IDSGR WSON DSG 8 3000 210.0 185.0 35.0
INA381A4IDSGT WSON DSG 8 250 210.0 185.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 17-Jul-2020
Pack Materials-Page 2
DGSOO10A I
www.ti.com
PACKAGE OUTLINE
C
TYP
5.05
4.75
1.1 MAX
8X 0.5
10X 0.27
0.17
2X
2
0.15
0.05
TYP
0.23
0.13
0 - 8
0.25
GAGE PLANE
0.7
0.4
A
NOTE 3
3.1
2.9
B
NOTE 4
3.1
2.9
4221984/A 05/2015
VSSOP - 1.1 mm max heightDGS0010A
SMALL OUTLINE PACKAGE
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-187, variation BA.
110
0.1 C A B
6
5
PIN 1 ID
AREA
SEATING PLANE
0.1 C
SEE DETAIL A
DETAIL A
TYPICAL
SCALE 3.200
DGSOO10A
www.ti.com
EXAMPLE BOARD LAYOUT
(4.4)
0.05 MAX
ALL AROUND 0.05 MIN
ALL AROUND
10X (1.45)
10X (0.3)
8X (0.5)
(R )
TYP
0.05
4221984/A 05/2015
VSSOP - 1.1 mm max heightDGS0010A
SMALL OUTLINE PACKAGE
SYMM
SYMM
LAND PATTERN EXAMPLE
SCALE:10X
1
56
10
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
NOT TO SCALE
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
DGSOO10A
www.ti.com
EXAMPLE STENCIL DESIGN
(4.4)
8X (0.5)
10X (0.3)
10X (1.45)
(R ) TYP0.05
4221984/A 05/2015
VSSOP - 1.1 mm max heightDGS0010A
SMALL OUTLINE PACKAGE
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
SYMM
SYMM
1
56
10
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:10X
www.ti.com
GENERIC PACKAGE VIEW
This image is a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
WSON - 0.8 mm max heightDSG 8
PLASTIC SMALL OUTLINE - NO LEAD
2 x 2, 0.5 mm pitch
4224783/A
,Cl, LII, 7|:|
www.ti.com
PACKAGE OUTLINE
C
8X 0.32
0.18
1.6 0.1
2X
1.5
0.9 0.1
6X 0.5
8X 0.4
0.2
0.05
0.00
0.8 MAX
A2.1
1.9 B
2.1
1.9
0.32
0.18
0.4
0.2
(0.2) TYP
WSON - 0.8 mm max heightDSG0008A
PLASTIC SMALL OUTLINE - NO LEAD
4218900/D 04/2020
PIN 1 INDEX AREA
SEATING PLANE
0.08 C
1
45
8
PIN 1 ID 0.1 C A B
0.05 C
THERMAL PAD
EXPOSED
9
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
SCALE 5.500
ALTERNATIVE TERMINAL SHAPE
TYPICAL
www.ti.com
EXAMPLE BOARD LAYOUT
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
8X (0.25)
(1.6)
(1.9)
6X (0.5)
(0.9) ( 0.2) VIA
TYP
(0.55)
8X (0.5)
(R0.05) TYP
WSON - 0.8 mm max heightDSG0008A
PLASTIC SMALL OUTLINE - NO LEAD
4218900/D 04/2020
SYMM
1
45
8
LAND PATTERN EXAMPLE
SCALE:20X
SYMM 9
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
SOLDER MASK
OPENING
SOLDER MASK
METAL UNDER
SOLDER MASK
DEFINED
METAL
SOLDER MASK
OPENING
SOLDER MASK DETAILS
NON SOLDER MASK
DEFINED
(PREFERRED)
www.ti.com
EXAMPLE STENCIL DESIGN
(R0.05) TYP
8X (0.25)
8X (0.5)
(0.9)
(0.7)
(1.9)
(0.45)
6X (0.5)
WSON - 0.8 mm max heightDSG0008A
PLASTIC SMALL OUTLINE - NO LEAD
4218900/D 04/2020
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD 9:
87% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
SCALE:25X
SYMM
1
45
8
METAL
SYMM 9
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