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Quick Start Procedure
DESCRIPTION
The EPC9003 development board is a 200 V maximum device volt-
age, 5 A maximum output current, half bridge with onboard gate
drives, featuring the EPC2010 enhancement mode (eGaN®) field
effect transistor (FET). The purpose of this development board is
to simplify the evaluation process of the EPC2010 eGaN FET by in-
cluding all the critical components on a single board that can be
easily connected into any existing converter.
The EPC9003 development board is 2” x 1.5” and contains not
only two EPC2010 eGaN FET in a half bridge configuration
Development board EPC9003 is easy to set up to evaluate the performance of the EPC2010 eGaN FET. Refer to Figure 2 for proper connect
and measurement setup and follow the procedure below:
1. With power off, connect the input power supply bus to +VIN (J5, J6) and ground / return to –VIN (J7, J8).
2. With power off, connect the switch node of the half bridge OUT (J3, J4) to your circuit as required.
3. With power off, connect the gate drive input to +VDD (J1, Pin-1) and ground return to –VDD (J1, Pin-2).
4. With power off, connect the input PWM control signal to PWM (J2, Pin-1) and ground return to any of the remaining J2 pins.
5. Turn on the gate drive supply – make sure the supply is between 7 V and 12 V range.
6. Turn on the bus voltage to the required value (do not exceed the absolute maximum voltage of 200 V on VOUT).
7. Turn on the controller / PWM input source and probe switching node to see switching operation.
8. Once operational, adjust the bus voltage and load PWM control within the operating range and observe the output switching behavior,
efficiency and other parameters.
9. For shutdown, please follow steps in reverse.
NOTE. When measuring the high frequency content switch node (OUT), care must be taken to avoid long ground leads. Measure the switch node (OUT) by placing the
oscilloscope probe tip through the large via on the switch node (designed for this purpose) and grounding the probe directly across the GND terminals provided. See
Figure 3 for proper scope probe technique.
THERMAL CONSIDERATIONS
The EPC9003 development board showcases the EPC2010 eGaN FET. Although the electrical performance surpasses that for traditional Silicon
devices, their relatively smaller size does magnify the thermal management requirements. The EPC9003 is intended for bench evaluation with low
ambient temperature and convection cooling. The addition of heat-sinking and forced air cooling can significantly increase the current rating of
these devices, but care must be taken to not exceed the absolute maximum die temperature of 125°C.
NOTE. The EPC9003 development board does not have any current or thermal protection on board. Figure 4: Waveforms for VIN = 170 V to 5 V/5 A (100kHz) Buck converter
CH1: VPWM Input voltage – CH4: (VOUT) Switch node voltage
Figure 1: Block Diagram of EPC9003 Development Board
Figure 2: Proper Connection and Measurement Setup
Figure 3: Proper Measurement of Switch Node – OUT
VDD
VIN
PWM
Input OUT
Gate Drive
Regulator
Level Shift,
Dead-time Adjust
and Gate Drive
Gate Drive
Supply
Enable
Half-Bridge with Bypass
7 V – 12 V
VDD Supply
PWM Input
External Circuit
VIN Supply
<170 V
VIN
++
+
––
–
IIN
V
A
Gate Drive Supply
(Note Polarity)
(For Efficiency
Measurement)
Switch Node
EPC
EFFICIENT POWER CONVERSION
EPC9003 – 200V DEVELOPMENT BOARD
EPC
EFFICIENT POWER CONVERSION
Do not use probe ground lead
Place probe in large via at OUTMinimize loop
Ground probe
against TP3
EPC9003 – 200V DEVELOPMENT BOARD
with gate drivers, but also an on board gate drive supply and
bypass capacitors. The board contains all critical components
and layout for optimal switching performance. There are also
various probe points to facilitate simple waveform measure-
ment and efficiency calculation. A complete block diagram of
the circuit is given in Figure 1.
For more information on the EPC2010s eGaN FET please refer to
the datasheet available from EPC at www.epc-co.com. The data-
sheet should be read in conjunction with this quick start guide.
Development Board EPC9003
Quick Start Guide
200 V Half-Bridge with Gate Drive, Using EPC2010
www.epc-co.com
Table 1: Performance Summary (TA = 25°C)
SYMBOL PARAMETER CONDITIONS MIN MAX UNITS
V
DD
Gate Drive Input Supply Range 7 12 V
V
IN
Bus Input Voltage Range 170 V
V
OUT
Switch Node Output Voltage 200 V
I
OUT
Switch Node Output Current 5* A
V
PWM
PWM Logic Input Voltage Threshold Input ‘High’ 3.5 6 V
Input ‘Low’ 0 1.5 V
Minimum ‘High’ State Input Pulse Width VPWM rise and fall time < 10ns 60 ns
Minimum ‘Low’ State Input Pulse Width VPWM rise and fall time < 10ns 500#ns
* Assumes inductive load, maximum current depends on die temperature – actual maximum current with be subject to switching frequency, bus voltage and thermals.
# Dependent on time needed to ‘refresh’ high side bootstrap supply voltage.
EPC Products are distributed through Digi-Key.
www.digikey.com
Development Board / Demonstration Board Notification
The EPC9003C board is intended for product evaluation purposes only and is not intended for commercial use. As an evaluation tool, it is
not designed for compliance with the European Union directive on electromagnetic compatibility or any other such directives or regulations.
As board builds are at times subject to product availability, it is possible that boards may contain components or assembly materials that are
not RoHS compliant. Efficient Power Conversion Corporation (EPC) makes no guarantee that the purchased board is 100% RoHS compliant.
No Licenses are implied or granted under any patent right or other intellectual property whatsoever. EPC assumes no liability for applications
assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind.
EPC reserves the right at any time, without notice, to change said circuitry and specifications.
For More Information:
Please contact info@epc-co.com
or your local sales representative
Visit our website:
www.epc-co.com
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bit.ly/EPCupdates
or text “EPC” to 22828