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OP27 Datasheet

Analog Devices Inc.

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Datasheet

Low Noise, Precision
Operational Amplifier
Data Sheet
OP27
Rev. H Document Feedback
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©1981–2015 Analog Devices, Inc. All rights reserved.
Technical Support www.analog.com
FEATURES
Low noise: 80 nV p-p (0.1 Hz to 10 Hz), 3 nV/√Hz
Low drift: 0.2 µV/°C
High speed: 2.8 V/µs slew rate, 8 MHz gain bandwidth
Low VOS: 10 µV
CMRR: 126 dB at VCM of ±11 V
High open-loop gain: 1.8 million
Available in die form
GENERAL DESCRIPTION
The OP27 precision operational amplifier combines the low
offset and drift of the OP07 with both high speed and low noise.
Offsets down to 25 µV and maximum drift of 0.6 µV/°C make
the OP27 ideal for precision instrumentation applications. Low
noise, en = 3.5 nV/√Hz, at 10 Hz, a low 1/f noise corner
frequency of 2.7 Hz, and high gain (1.8 million), allow accurate
high-gain amplification of low-level signals. A gain bandwidth
product of 8 MHz and a 2.8 V/µs slew rate provide excellent
dynamic accuracy in high speed, data-acquisition systems.
A low input bias current of ±10 nA is achieved by use of a bias
current cancellation circuit. Over the military temperature
range, this circuit typically holds IB and IOS to ±20 nA and 15 nA,
respectively.
The output stage has good load driving capability. A guaranteed
swing of ±10 V into 600 Ω and low output distortion make the
OP27 an excellent choice for professional audio applications.
(Continued on Page 3)
PIN CONFIGURATIONS
V+
OUT
NC
4V– (CASE)
BAL
BAL 1
IN 2
+IN 3
OP27
NC = NO CONNECT
00317-001
Figure 1. 8-Lead TO-99 (J-Suffix)
8
7
6
5
1
2
3
4
NC = NO CONNECT
V
OS
TRIM
–IN
+IN
V
OS
TRIM
V+
OUT
NCV–
OP27
00317-002
Figure 2. 8-Lead CERDIP – Glass Hermetic Seal (Z-Suffix),
8-Lead PDIP (P-Suffix), and 8-Lead SOIC (S-Suffix)
FUNCTIONAL BLOCK DIAGRAM
V
OS
ADJ.
NONINVERTING
INPUT (+)
INVERTING
INPUT (–)
V–
V+
Q2B
R2
1
Q3
Q2A
Q1A Q1B
R4
R1
1
R3 1 8
.
R1 AND R2 ARE PERMANENTLY
ADJUSTED AT WAFER TEST FOR
MINIMUM OFFSET VOLTAGE
1
Q6
Q21
C2
R23 R24
Q23 Q24
Q22
R5
Q11 Q12
Q27 Q28
C1
R9
R12
C3 C4
Q26
Q20 Q19
Q46
Q45
OUTPUT
00317-003
Figure 3.
OP27 Data Sheet
Rev. H | Page 2 of 21
TABLE OF CONTENTS
Features .............................................................................................. 1
General Description ......................................................................... 1
Pin Configurations ........................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 4
Electrical Characteristics ............................................................. 4
Typical Electrical Characteristics ............................................... 6
Absolute Maximum Ratings ............................................................ 7
Thermal Resistance ...................................................................... 7
ESD Caution .................................................................................. 7
Typical Performance Characteristics ..............................................8
Applications Information .............................................................. 14
Offset Voltage Adjustment ........................................................ 14
Noise Measurements .................................................................. 14
Unity-Gain Buffer Applications ............................................... 14
Comments On Noise ................................................................. 15
Audio Applications .................................................................... 16
References .................................................................................... 18
Outline Dimensions ....................................................................... 19
Ordering Guide .......................................................................... 21
REVISION HISTORY
10/15—Rev. G to Rev. H
Changes to Features Section and General Description Section ..... 1
Changes to Note 1, Ordering Guide ................................................. 21
3/15—Rev. F to Rev. G
Changes to General Description Section ...................................... 3
Changes to Figure 31 ...................................................................... 12
Changes to Applications Information Section and Output
Voltage Adjustment Section .......................................................... 14
Updated Outline Dimensions ....................................................... 19
Changes to Ordering Guide .......................................................... 21
5/06—Rev. E to Rev. F
Removed References to 745 .............................................. Universal
Updated 741 to AD741 ...................................................... Universal
Changes to Ordering Guide .......................................................... 20
12/05—Rev. D to Rev. E
Edits to Figure 2 ................................................................................ 1
9/05—Rev. C to Rev. D
Updated Format .................................................................. Universal
Changes to Table 1 ............................................................................ 4
Removed Die Characteristics Figure ............................................. 5
Removed Wafer Test Limits Table .................................................. 5
Changes to Table 5 ............................................................................ 7
Changes to Comments on Noise Section .................................... 15
Changes to Ordering Guide .......................................................... 24
1/03—Rev. B to Rev. C
Edits to Pin Connections .................................................................. 1
Edits to General Description ........................................................... 1
Edits to Die Characteristics .............................................................. 5
Edits to Absolute Maximum Ratings .............................................. 7
Updated Outline Dimensions ....................................................... 16
Edits to Figure 8 .............................................................................. 14
Edits to Outline Dimensions......................................................... 16
9/01—Rev. 0 to Rev. A
Edits to Ordering Information ........................................................ 1
Edits to Pin Connections .................................................................. 1
Edits to Absolute Maximum Ratings .............................................. 2
Edits to Package Type ....................................................................... 2
Edits to Electrical Characteristics .............................................. 2, 3
Edits to Wafer Test Limits ................................................................ 4
Deleted Typical Electrical Characteristics...................................... 4
Edits to Burn-In Circuit Figure ....................................................... 7
Edits to Application Information .................................................... 8
Data Sheet OP27
Rev. H | Page 3 of 21
GENERAL DESCRIPTION
(Continued from Page 1)
PSRR and CMRR exceed 120 dB. These characteristics, coupled
with long-term drift of 0.2 µV/month, allow the circuit designer
to achieve performance levels previously attained only by discrete
designs.
Low cost, high volume production of OP27 is achieved by
using an on-chip Zener zap-trimming network. This reliable
and stable offset trimming scheme has proven its effectiveness
over many years of production history.
The OP27 provides excellent performance in low noise,
high accuracy amplification of low level signals. Applications
include stable integrators, precision summing amplifiers,
precision voltage threshold detectors, comparators, and
professional audio circuits such as tape heads and microphone
preamplifiers.
OP27 Data Sheet
Rev. H | Page 4 of 21
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
VS = ±15 V, TA = 25°C, unless otherwise noted.
Table 1.
OP27A/OP27E OP27G
Parameter
Test Conditions
Min
Typ
Max
Min
Typ
Max
Unit
INPUT OFFSET VOLTAGE
1
OS
10
25
30
100
µV
LONG-TERM VOS STABILITY2, 3 VOS/Time 0.2 1.0 0.4 2.0 µV/MO
INPUT OFFSET CURRENT IOS 7 35 12 75 nA
INPUT BIAS CURRENT IB ±10 ±40 ±15 ±80 nA
INPUT NOISE VOLTAGE3, 4 en p-p 0.1 Hz to 10 Hz 0.08 0.18 0.09 0.25 µV p-p
INPUT NOISE en fO = 10 Hz 3.5 5.5 3.8 8.0 nV/√Hz
Voltage Density3 fO = 30 Hz 3.1 4.5 3.3 5.6 nV/√Hz
fO = 1000 Hz 3.0 3.8 3.2 4.5 nV/√Hz
INPUT NOISE in fO = 10 Hz 1.7 4.0 1.7 pA/√Hz
Current Density3 fO = 30 Hz 1.0 2.3 1.0 pA/√Hz
fO = 1000 Hz 0.4 0.6 0.4 0.6 pA/√Hz
INPUT RESISTANCE
Differential Mode5 RIN 1.3 6 0.7 4 MΩ
Common Mode RINCM 3 2 GΩ
INPUT VOLTAGE RANGE IVR ±11.0 ±12.3 ±11.0 ±12.3 V
COMMON-MODE REJECTION RATIO CMRR VCM = ±11 V 114 126 100 120 dB
POWER SUPPLY REJECTION RATIO PSRR VS = ±4 V to ±18 V 1 10 2 20 µV/V
LARGE SIGNAL VOLTAGE GAIN AVO RL ≥ 2 kΩ, VO = ±10 V 1000 1800 700 1500 V/mV
RL ≥ 600 Ω, VO = ±10 V 800 1500 600 1500 V/mV
OUTPUT VOLTAGE SWING VO RL ≥ 2 kΩ ±12.0 ±13.8 ±11.5 ±13.5 V
RL ≥ 600 Ω ±10.0 ±11.5 ±10.0 ±11.5 V
SLEW RATE6 SR RL ≥ 2 kΩ 1.7 2.8 1.7 2.8 V/µs
GAIN BANDWIDTH PRODUCT6 GBW 5.0 8.0 5.0 8.0 MHz
OPEN-LOOP OUTPUT RESISTANCE RO VO = 0, IO = 0 70 70
POWER CONSUMPTION Pd VO 90 140 100 170 mW
OFFSET ADJUSTMENT RANGE RP = 10 kΩ ±4.0 ±4.0 mV
1 Input offset voltage measurements are performed approximately 0.5 seconds after application of power. A/E grades guaranteed fully warmed up.
2 Long-term input offset voltage stability refers to the average trend line of VOS vs. time over extended periods after the first 30 days of operation. Excluding the initial
hour of operation, changes in VOS during the first 30 days are typically 2.5 µV. Refer to the Typical Performance Characteristics section.
3 Sample tested.
4 See voltage noise test circuit (Figure 31).
5 Guaranteed by input bias current.
6 Guaranteed by design.
Data Sheet OP27
Rev. H | Page 5 of 21
VS = ±15 V, −55°C ≤ TA ≤ 125°C, unless otherwise noted.
Table 2.
OP27A
Parameter Symbol Test Conditions Min Typ Max Unit
INPUT OFFSET VOLTAGE1 VOS 30 60 µV
AVERAGE INPUT OFFSET DRIFT TCVOS2
TCVOSn3 0.2 0.6 µV/°C
INPUT OFFSET CURRENT IOS 15 50 nA
INPUT BIAS CURRENT IB ±20 ±60 nA
INPUT VOLTAGE RANGE IVR ±10.3 ±11.5 V
COMMON-MODE REJECTION RATIO CMRR VCM = ±10 V 108 122 dB
POWER SUPPLY REJECTION RATIO PSRR VS = ±4.5 V to ±18 V 2 16 µV/V
LARGE SIGNAL VOLTAGE GAIN AVO RL ≥ 2 kΩ, VO = ±10 V 600 1200 V/mV
OUTPUT VOLTAGE SWING VO RL ≥ 2 kΩ ±11.5 ±13.5 V
1 Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of power. A/E grades guaranteed fully
warmed up.
2 The TCVOS performance is within the specifications unnulled or when nulled with RP = 8 kΩ to 20 kΩ. TCVOS is 100% tested for A/E grades, sample tested for G grades.
3 Guaranteed by design.
VS = ±15 V, −25°C ≤ TA ≤ 85°C for OP27J and OP27Z and −40°C ≤ TA ≤ 85°C for OP27GS, unless otherwise noted.
Table 3.
OP27E OP27G
Parameter Symbol Test Conditions Min Typ Max Min Typ Max Unit
INPUT ONSET VOLTAGE VOS 20 50 55 220 µV
AVERAGE INPUT OFFSET DRIFT TCVOS1 0.2 0.6 0 4 1.8 µV/°C
TCVOSn2 0.2 0.6 0 4 1.8 µV/°C
INPUT OFFSET CURRENT IOS 10 50 20 135 nA
INPUT BIAS CURRENT IB ±14 ±60 ±25 ±150 nA
INPUT VOLTAGE RANGE IVR ±10.5 ±11.8 ±10.5 ±11.8 V
COMMON-MODE REJECTION RATIO
CMRR
V
CM
= ±10 V
110
124
96
118
dB
POWER SUPPLY REJECTION RATIO PSRR VS = ±4.5 V to ±18 V 2 15 2 32 µV/V
LARGE SIGNAL VOLTAGE GAIN AVO RL ≥ 2 kΩ, VO = ±10 V
750 1500 450 1000 V/mV
OUTPUT VOLTAGE SWING
V
O
R
L
≥ 2 kΩ
±11.7
±13.6
±11.0
±13.3
V
1 The TCVOS performance is within the specifications unnulled or when nulled with RP = 8 kΩ to 20 kΩ. TCVOS is 100% tested for A/E grades, sample tested for C/G grades.
2 Guaranteed by design.
OP27 Data Sheet
Rev. H | Page 6 of 21
TYPICAL ELECTRICAL CHARACTERISTICS
VS = ±15 V, TA = 25°C unless otherwise noted.
Table 4.
Parameter Symbol Test Conditions OP27N Typical Unit
AVERAGE INPUT OFFSET VOLTAGE DRIFT1 TCVOS or TCVOSn Nulled or unnulled, RP = 8 kΩ to 20 kΩ 0.2 µV/°C
AVERAGE INPUT OFFSET CURRENT DRIFT TCIOS 80 pA/°C
AVERAGE INPUT BIAS CURRENT DRIFT TCIB 100 pA/°C
INPUT NOISE VOLTAGE DENSITY en fO = 10 Hz 3.5 nV/√Hz
fO = 30 Hz 3.1 nV/√Hz
fO = 1000 Hz 3.0 nV/√Hz
INPUT NOISE CURRENT DENSITY in fO = 10 Hz 1.7 pA/√Hz
fO = 30 Hz 1.0 pA/√Hz
fO = 1000 Hz 0.4 pA/√Hz
INPUT NOISE VOLTAGE SLEW RATE enp-p 0.1 Hz to 10 Hz 0.08 µV p-p
SR RL ≥ 2 kΩ 2.8 V/µs
GAIN BANDWIDTH PRODUCT GBW 8 MHz
1 Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of power.
Data Sheet OP27
Rev. H | Page 7 of 21
ABSOLUTE MAXIMUM RATINGS
Table 5.
Parameter Rating
Supply Voltage ±22 V
Input Voltage1±22 V
Output Short-Circuit Duration Indefinite
Differential Input Voltage2 ±0.7 V
Differential Input Current2 ±25 mA
Storage Temperature Range −65°C to +150°C
Operating Temperature Range
OP27A (J, Z)
−55°C to +125°C
OP27E (Z) −25°C to +85°C
OP27E (P) 0°C to 70°C
OP27G (P, S, J, Z) −40°C to +85°C
Lead Temperature Range (Soldering, 60 sec) 300°C
Junction Temperature
−65°C to +150°C
1 For supply voltages less than ±22 V, the absolute maximum input voltage is
equal to the supply voltage.
2 The inputs of the OP27 are protected by back-to-back diodes. Current
limiting resistors are not used in order to achieve low noise. If differential
input voltage exceeds ±0.7 V, the input current should be limited to 25 mA.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, θJA is
specified for device in socket for TO-99, CERDIP, and PDIP
packages; θJA is specified for device soldered to printed circuit
board for SOIC package.
Absolute maximum ratings apply to both dice and packaged
parts, unless otherwise noted.
Table 6.
Package Type θJA θJC Unit
8-Lead Metal Can (TO-99) (J) 150 18 °C/W
8-Lead CERDIP (Z) 148 16 °C/W
8-Lead PDIP (P) 103 43 °C/W
8-Lead SOIC_N (S) 158 43 °C/W
ESD CAUTION
OP27 Data Sheet
Rev. H | Page 8 of 21
TYPICAL PERFORMANCE CHARACTERISTICS
100
90
80
70
60
50
40
30
0.01 0.1 1 10 100
FREQUENCY (Hz)
GAIN (dB)
TEST TIME OF 10sec FURTHER
LIMITS LOW FREQUENCY
(<0.1Hz) GAIN
00317-004
Figure 4. 0.1 Hz to 10 Hz p-p Noise Tester Frequency Response
10
9
8
7
6
5
4
3
2
1
1 10 100 1k
FREQUENCY (Hz)
VOLTAGE NOISE (nV/Hz)
I/F CORNER = 2.7Hz
T
A
= 25qC
V
S
= r15V
00317-005
Figure 5. Voltage Noise Density vs. Frequency
INSTRUMENTATION
RANGE TO DC
AUDIO RANGE
TO 20kHz
741
OP27 I/F CORNER
I/F CORNER = 2.7Hz
I/F CORNER
LOW NOISE
AUDIO OP AMP
100
10
1
1 10 100 1k
FREQUENCY (Hz)
VOLTAGE NOISE (nV/Hz)
00317-006
Figure 6. A Comparison of Op Amp Voltage Noise Spectra
10
1
0.1
0.01
100 1k 10k 100k
BANDWIDTH (Hz)
RMS VOLTAGE NOISE (PV)
T
A
= 25qC
V
S
= r15V
00317-007
Figure 7. Input Wideband Voltage Noise vs. Bandwidth (0.1 Hz to Frequency
Indicated)
100
10
1
100 1k 10k
SOURCE RESISTANCE (:)
TOTAL NOISE (nV/Hz)
TA = 25qC
VS = r15V
R2
R1
R
S
– 2R1
RESISTOR NOISE ONLY
AT 1kHz
AT 10Hz
00317-008
Figure 8. Total Noise vs. Sourced Resistance
5
4
3
2
1
–50 0–25 100755025 125
TEMPERATURE (qC)
VOLTAGE NOISE (nV/Hz)
AT 10Hz
AT 1kHz
V
S
= r15V
00317-009
Figure 9. Voltage Noise Density vs. Temperature
Data Sheet OP27
Rev. H | Page 9 of 21
5
4
3
2
1
040
TOTAL SUPPLY VOLTAGE, V+ – V–, (V)
VOLTAGE NOISE (nV/Hz)
TA = 25qC
10 20 30
AT 10Hz
AT 1kHz
00317-010
Figure 10. Voltage Noise Density vs. Supply Voltage
10.0
0.1
10 10k
FREQUENCY (Hz)
CURRENT NOISE (pA/Hz)
I/F CORNER = 140Hz
1.0
100 1k
00317-011
Figure 11. Current Noise Density vs. Frequency
5.0
1.0
545
TOTAL SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
T
A
= –55qC
T
A
= +125qC
4.0
3.0
2.0
15 25 35
T
A
= +25qC
00317-012
Figure 12. Supply Current vs. Supply Voltage
60
–70
–75 175
TEMPERATURE (qC)
OFFSET VOLTAGE (PV)
50
40
30
20
10
0
–10
–20
–30
–40
–50
–60
–50 –25 0 25 50 75 100 125 150
OP27C
OP27C
OP27A
OP27A
OP27A
TRIMMING WITH
10k: POT DOES
NOT CHANGE
TCV
OS
00317-013
Figure 13. Offset Voltage Drift of Five Representative Units vs. Temperature
6
–6
07
TIME (Months)
CHANGE IN OFFSET VOLTAGE (PV)
4
2
0
–2
–4
6
6
4
2
0
–2
–4
1 2 3 4 5 6
00317-014
Figure 14. Long-Term Offset Voltage Drift of Six Representative Units
1
05
TIME AFTER POWER ON (Min)
CHANGE IN INPUT OFFSET VOLTAGE (PV)
T
A
= 25qC
V
S
= 15V
10
5
1 2 3 4
OP27 A/E
OP27 F
OP27 C/G
00317-015
Figure 15. Warm-Up Offset Voltage Drift
OP27 Data Sheet
Rev. H | Page 10 of 21
30
0
–20 100
TIME (Sec)
OPEN-LOOP GAIN (dB)
25
20
15
10
5
0 20 40 60 80
THERMAL
SHOCK
RESPONSE
BAND
DEVICE IMMERSED
IN 70qC OIL BATH
T
A
=
25qC
T
A
= 70qC
V
S
= r15V
00317-016
Figure 16. Offset Voltage Change Due to Thermal Shock
0
150
TEMPERATURE (qC)
INPUT BIAS CURRENT (nA)
40
20
30
50
10
–50 –25 0 25 50 75 100 125
V
S
=r15V
OP27C
OP27A
00317-017
Figure 17. Input Bias Current vs. Temperature
0
125
TEMPERATURE (qC)
INPUT OFFSET CURRENT (nA)
40
20
30
50
10
–50 –25–75 0 25 50 75 100
OP27C
OP27A
V
S
=r15V
00317-018
Figure 18. Input Offset Current vs. Temperature
–10
100M
FREQUENCY (Hz)
VOLTAGE GAIN (dB)
130
10 1001 1k 10k 100k 1M 10M
110
90
70
50
30
10
00317-019
Figure 19. Open-Loop Gain vs. Frequency
125
TEMPERATURE (qC)
SLEW RATE (V/PS) PHASE MARGIN (Degrees)
–50 –25–75 0 25 50 75 100
V
S
=r15V
70
60
50
4
3
2
GAIN BANDWIDTH PRODUCT (MHz)
10
9
8
7
6
SLEW
GBW
)M
00317-020
Figure 20. Slew Rate, Gain Bandwidth Product, Phase Margin vs.
Temperature
100M
FREQUENCY (Hz)
1M
–10
25
PHASE SHIFT (Degrees)
GAIN (dB)
80
220
20
15
10
5
0
–5
100
120
140
160
180
200
10M
TA = 25qC
V
S
= r15V
GAIN
PHASE
MARGIN
= 70q
00317-021
Figure 21. Gain, Phase Shift vs. Frequency
Data Sheet OP27
Rev. H | Page 11 of 21
0
050
TOTAL SUPPLY VOLTAGE (V)
OPEN-LOOP GAIN (V/PV)
T
A
= 25qC
2.5
2.0
1.5
1.0
0.5
10 20 30 40
R
L
= 2k:
R
L
= 1k:
00317-022
Figure 22. Open-Loop Voltage Gain vs. Supply Voltage
0
1k 10M
FREQUENCY (Hz)
MAXIMUM OUTPUT SWING
TA= 25°C
VS= ±15V
28
24
20
16
12
8
4
10k 100k 1M
00317-023
Figure 23. Maximum Output Swing vs. Frequency
–2
100 10k
LOAD RESISTANCE (:)
MAXIMUM OUTPUT (V)
18
16
14
12
10
8
6
4
2
0
1k
T
A
= 25qC
V
S
=r15V
POSITIVE
SWING
NEGATIVE
SWING
00317-024
Figure 24. Maximum Output Voltage vs. Load Resistance
0
02500
CAPACITIVE LOAD (pF)
% OVERSHOOT
100
80
60
40
20
500 1000 1500 2000
VS=r15V
VIN = 100mV
AV= +1
00317-025
Figure 25. Small-Signal Overshoot vs. Capacitive Load
50mV
50mV
0V
A
VCL
= +1
C
L
= 15pF
V
S
= r15V
T
A
= 25qC
20mV 500ns
00317-026
Figure 26. Small-Signal Transient Response
+5V
–5V
0V
AVCL = +1
VS = r15V
TA = 25qC
2V 2Ps
00317-027
Figure 27. Large Signal Transient Response
OP27 Data Sheet
Rev. H | Page 12 of 21
10
05
TIME FROM OUTPUT SHORTED TO GROUND (Min)
SHORT-CIRCUIT CURRENT (mA)
60
50
40
30
20
1 2 3 4
T
A
= 25qC
V
S
= 15V
I
SC
(–)
I
SC
(+)
00317-028
Figure 28. Short-Circuit Current vs. Time
60
100 1M
FREQUENCY (Hz)
CMRR (dB)
140
120
100
80
1k 10k 100k
V
S
=r15V
T
A
= 25qC
V
CM
=r10V
00317-029
Figure 29. CMRR vs. Frequency
16
–16
0r20
SUPPLY VOLTAGE (V)
COMMON-MODE RANGE (V)
T
A
= –55qC
T
A
= +125qC
T
A
= –55qC
T
A
= +125qC
T
A
= +25qC
T
A
= +25qC
12
8
4
0
–4
–8
–12
r5r10 r15
00317-030
Figure 30. Common-Mode Input Range vs. Supply Voltage
AD8677
OP27
D.U.T.
N
N
4.7mF
N
N
VOLTAGE
GAIN
= 50,000
2.2mF
22mF
N
SCOPE ´ 1
R
IN
 0
0.1mF

N
0.1mF
00317-031
Figure 31. Voltage Noise Test Circuit (0.1 Hz to 10 Hz)
2.4
0.4
100 1k 10k 100k
LOAD RESISTANCE (:)
OPEN-LOOP VOLTAGE GAIN (V/PV)
T
A
= 25qC
V
S
= r15V
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
00317-032
Figure 32. Open-Loop Voltage Gain vs. Load Resistance
–90
–120
VOLTAGE NOISE (nV)
1 SEC/DIV
120
80
0
40
–40
0.1Hz TO 10Hz p-p NOISE
00317-033
Figure 33. Low Frequency Noise
Data Sheet OP27
Rev. H | Page 13 of 21
160
0
1100M
FREQUENCY (Hz)
POWER SUPPLY REJECTION RATIO (dB)
T
A
= 25qC
140
120
100
80
60
40
20
10 100 1k 10k 100k 1M 10M
NEGATIVE
SWING
POSITIVE
SWING
00317-034
Figure 34. PSRR vs. Frequency
OP27 Data Sheet
Rev. H | Page 14 of 21
APPLICATIONS INFORMATION
OP27 series units can be inserted directly into OP07 sockets
with or without removal of external compensation or nulling
components. OP27 offset voltage can be nulled to 0 (or another
desired setting) using a potentiometer (see Figure 35).
The OP27 provides stable operation with load capacitances of
up to 2000 pF and ±10 V swings; larger capacitances should be
decoupled with a 50 Ω resistor inside the feedback loop. The
OP27 is unity-gain stable.
Thermoelectric voltages generated by dissimilar metals at the
input terminal contacts can degrade the drift performance.
Best operation is obtained when both input contacts are
maintained at the same temperature.
+
–-
OP27
V–
V+
OUTPUT
R
P
10k:
1
7
6
4
8
3
2
00317-035
Figure 35. Offset Nulling Circuit
OFFSET VOLTAGE ADJUSTMENT
The input offset voltage of the OP27 is trimmed at wafer level.
However, if further adjustment of VOS is necessary, a 10 kΩ trim
potentiometer can be used. TCVOS is not degraded (see Figure 35).
Other potentiometer values from 1 kΩ to 1 MΩ can be used
with a slight degradation (0.1 µV/°C to 0.2 µV/°C) of TCVOS.
Trimming to a value other than zero creates a drift of approxi-
mately (VOS/300) µVC. For example, the change in TCVOS is
0.33 µV/°C if VOS is adjusted to 100 µV. The offset voltage
adjustment range with a 10 kpotentiometer is ±4 mV. If smaller
adjustment range is required, the nulling sensitivity can be
reduced by using a smaller potentiometer in conjunction with
fixed resistors. For example, Figure 36 shows a network that has
a ±280 µV adjustment range.
184.7k:4.7k:1k: POTT
V+
00317-036
Figure 36. Offset Voltage Adjustment
NOISE MEASUREMENTS
To measure the 80 nV p-p noise specification of the OP27 in
the 0.1 Hz to 10 Hz range, the following precautions must be
observed:
xThe device must be warmed up for at least five minutes.
As shown in the warm-up drift curve, the offset voltage
typically changes 4 µV due to increasing chip temperature
after power-up. In the 10-second measurement interval,
these temperature-induced effects can exceed tens-of-
nanovolts.
xFor similar reasons, the device has to be well-shielded
from air currents. Shielding minimizes thermocouple effects.
xSudden motion in the vicinity of the device can also
feedthrough to increase the observed noise.
xThe test time to measure 0.1 Hz to 10 Hz noise should not
exceed 10 seconds. As shown in the noise-tester frequency
response curve, the 0.1 Hz corner is defined by only one
zero. The test time of 10 seconds acts as an additional zero
to eliminate noise contributions from the frequency band
below 0.1 Hz.
xA noise voltage density test is recommended when
measuring noise on a large number of units. A 10 Hz noise
voltage density measurement correlates well with a 0.1 Hz to
10 Hz p-p noise reading, since both results are determined
by the white noise and the location of the 1/f corner
frequency.
UNITY-GAIN BUFFER APPLICATIONS
When Rf ≤ 100 Ω and the input is driven with a fast, large
signal pulse (>1 V), the output waveform looks as shown in the
pulsed operation diagram (see Figure 37).
During the fast feedthrough-like portion of the output, the
input protection diodes effectively short the output to the input,
and a current, limited only by the output short-circuit protect-
ion, is drawn by the signal generator. With Rf 500 Ω, the output is
capable of handling the current requirements (IL 20 mA at 10 V);
the amplifier stays in its active mode and a smooth transition
occurs.
When Rf > 2 kΩ, a pole is created with Rf and the amplifier’s
input capacitance (8 pF) that creates additional phase shift and
reduces phase margin. A small capacitor (20 pF to 50 pF) in
parallel with Rf eliminates this problem.
+
OP27
R
f
2.8V/Ps
00317-037
Figure 37. Pulsed Operation
Data Sheet OP27
Rev. H | Page 15 of 21
COMMENTS ON NOISE
The OP27 is a very low noise, monolithic op amp. The out-
standing input voltage noise characteristics of the OP27
are achieved mainly by operating the input stage at a high
quiescent current. The input bias and offset currents, which
would normally increase, are held to reasonable values by the
input bias current cancellation circuit. The OP27A/OP27E has
IB and IOS of only ±40 nA and 35 nA at 25°C respectively. This
is particularly important when the input has a high source
resistance. In addition, many audio amplifier designers prefer
to use direct coupling. The high IB, VOS, and TCVOS of previous
designs have made direct coupling difficult, if not impossible,
to use.
Voltage noise is inversely proportional to the square root of bias
current, but current noise is proportional to the square root of
bias current. The noise advantage of the OP27 disappears when
high source resistors are used. Figure 38, Figure 39, Figure 40
compare the observed total noise of the OP27 with the noise
performance of other devices in different circuit applications.
2/1
2
2
2
)(
)(
)
(
»
»
»
»
¼
º
«
«
«
«
¬
ª
u
NoiseResistor
RNoiseCurrent
NoiseVoltage
NoiseTotal S
Figure 38 shows noise vs. source resistance at 1000 Hz. The
same plot applies to wideband noise. To use this plot, multiply
the vertical scale by the square root of the bandwidth.
R
S
—SOURCE RESISTANCE (
:
)
10
50 10k
5
500 1k 5k
1
100
50
100 50k
R
S1
R
S2
OP07
5534
OP27/37
REGISTER
NOISE ONLY
OP08/108
1
2
1 R
S
UNMATCHED
e.g. R
S
= R
S1
= 10k
:
, R
S2
= 0
2 R
S
MATCHED
e.g. R
S
= 10k
:
, R
S1
= R
S2
= 5k
:
00317-038
TOTAL NOIS
E (nV/
Hz)
Figure 38. Noise vs. Source Resistance (Including Resistor Noise) at 1000 Hz
At RS < 1 kΩ, the low voltage noise of the OP27 is maintained.
With RS < 1 kΩ, total noise increases but is dominated by the
resistor noise rather than current or voltage noise. lt is only
beyond RS of 20 kΩ that current noise starts to dominate. The
argument can be made that current noise is not important for
applications with low-to-moderate source resistances. The
crossover between the OP27 and OP07 noise occurs in the 15 kΩ
to 40 kΩ region.
Figure 39 shows the 0.1 Hz to 10 Hz p-p noise. Here the picture
is less favorable; resistor noise is negligible and current noise
becomes important because it is inversely proportional to the
square root of frequency. The crossover with the OP07 occurs
in the 3 kΩ to 5 kΩ range depending on whether balanced or
unbalanced source resistors are used (at 3 kΩ the IB and IOS
error also can be 3× the VOS spec).
R
S
—SOURCE RESISTANCE (
:
)
100
50 10k
p-p NOISE (nV)
50
500 1k 5k
10
1k
500
100 50k
R
S1
R
S2
1 R
S
UNMATCHED
e.g. R
S
= R
S1
= 10k
:
, R
S2
= 0
2 R
S
MATCHED
e.g. R
S
= 10k
:
, R S1 = RS2 = 5k
:
OP07
5534
OP27/37
REGISTER
NOISE ONLY
OP08/108
1
2
00317-039
Figure 39. Peak-to-Peak Noise (0.1 Hz to 10 Hz) as Source Resistance
(Includes Resistor Noise)
For low frequency applications, the OP07 is better than the
OP27/OP37 when RS > 3 kΩ. The only exception is when gain
error is important.
Figure 40 illustrates the 10 Hz noise. As expected, the results are
between the previous two figures.
10
50 10k
5
500 1k 5k
1
100
50
100 50k
OP07
5534
OP27/37
REGISTER
NOISE ONLY
OP08/108
R
S1
R
S2
1 R
S
UNMATCHED
e.g. R
S
= R
S1
= 10k
:
, R
S2
= 0
2 R
S
MA
TCHED
e.g. R
S
= 10k
:
, R
S1
= R
S2
= 5k
:
1
2
00317-040
R
S
—SOURCE RESISTANCE (
:
)
TOTAL NOISE (nV/
Hz)
Figure 40. 10 Hz Noise vs. Source Resistance (Includes Resistor Noise)
Audio Applications
OP27 Data Sheet
Rev. H | Page 16 of 21
For reference, typical source resistances of some signal sources
are listed in Table 7.
Table 7.
Device
Source
Impedance Comments
Strain Gauge <500 Ω Typically used in low frequency
applications.
Magnetic
Tape Head
<1500 Ω Low is very important to reduce
self-magnetization problems
when direct coupling is used.
OP27 IB can be neglected.
Magnetic
Phonograph
Cartridges
<1500 Ω
Similar need for low I
B
in direct
coupled applications. OP27 does
not introduce any self-
magnetization problems.
Linear
Variable
Differential
Transformer
<1500 Ω Used in rugged servo-feedback
applications. Bandwidth of
interest is 400 Hz to 5 kHz.
Table 8. Open-Loop Gain
Frequency OP07 OP27 OP37
At 3 Hz 100 dB 124 dB 125 dB
At 10 Hz 100 dB 120 dB 125 dB
At 30 Hz 90 dB 110 dB 124 dB
AUDIO APPLICATIONS
Figure 41 is an example of a phono pre-amplifier circuit using the
OP27 for A1; R1-R2-C1-C2 form a very accurate RIAA network
with standard component values. The popular method to
accomplish RIAA phono equalization is to employ frequency
dependent feedback around a high quality gain block. Properly
chosen, an RC network can provide the three necessary time
constants of 3180 µs, 318 µs, and 75 µs.
For initial equalization accuracy and stability, precision metal
film resistors and film capacitors of polystyrene or polypro-
pylene are recommended because they have low voltage
coefficients, dissipation factors, and dielectric absorption.
(High-k ceramic capacitors should be avoided here, though
low-k ceramics, such as NPO types that have excellent
dissipation factors and somewhat lower dielectric absorption,
can be considered for small values.)
CA
150pF
A1
OP27
RA
N
MOVING MAGNET
CARTRIDGE INPUT
+ +
C4 (2)
220µF
C1
0.03µF
C2
0.01µF
C3
0.47µF
LF ROLLOFF
OUT IN
OUTPUT
R5
N
R4
N
R1
N
R2
N
R3

G = 1kHz GAIN
= 0.101 ( 1 + )
R1
R3
= 98.677 (39.9dB) AS SHOWN
2
6
3
00317-041
Figure 41. Phono Preamplifier Circuit
The OP27 brings a 3.2 nV/√Hz voltage noise and 0.45 pA/Hz
current noise to this circuit. To minimize noise from other
sources, R3 is set to a value of 100 Ω, generating a voltage noise
of 1.3 nV/√Hz. The noise increases the 3.2 nV/√Hz of the
amplifier by only 0.7 dB. With a 1 kΩ source, the circuit noise
measures 63 dB below a 1 mV reference level, unweighted, in a
20 kHz noise bandwidth.
Gain (G) of the circuit at 1 kHz can be calculated by the
expression:
¸
¹
·
¨
©
§ R3
R1
G1101.0
For the values shown, the gain is just under 100 (or 40 dB).
Lower gains can be accommodated by increasing R3, but gains
higher than 40 dB show more equalization errors because of the
8 MHz gain bandwidth of the OP27.
This circuit is capable of very low distortion over its entire
range, generally below 0.01% at levels up to 7 V rms. At 3 V
output levels, it produces less than 0.03% total harmonic
distortion at frequencies up to 20 kHz.
Capacitor C3 and Resistor R4 form a simple −6 dB per octave
rumble filter, with a corner at 22 Hz. As an option, the switch
selected Shunt Capacitor C4, a nonpolarized electrolytic,
bypasses the low frequency roll-off. Placing the rumble filter’s
high-pass action after the preamplifier has the desirable result
of discriminating against the RIAA-amplified low frequency
noise components and pickup produced low frequency
disturbances.
A preamplifier for NAB tape playback is similar to an RIAA
phono preamplifier, though more gain is typically demanded,
along with equalization requiring a heavy low frequency boost.
The circuit in Figure 41 can be readily modified for tape use, as
shown by Figure 42.
Data Sheet OP27
Rev. H | Page 17 of 21
C
A
R
A
R1
N
R2
N
TAPE
HEAD
0.47µF
0.01µF

N
T1 = 3180µs
T2 = 50µs
OP27
+
00317-042
Figure 42. Tape Head Preamplifier
While the tape equalization requirement has a flat high
frequency gain above 3 kHz (T2 = 50 µs), the amplifier need
not be stabilized for unity gain. The decompensated OP37
provides a greater bandwidth and slew rate. For many applica-
tions, the idealized time constants shown can require trimming
of R1 and R2 to optimize frequency response for nonideal tape
head performance and other factors (see the References section).
The network values of the configuration yield a 50 dB gain at
1 kHz, and the dc gain is greater than 70 dB. Thus, the worst-
case output offset is just over 500 mV. A single 0.47 µF output
capacitor can block this level without affecting the dynamic
range.
The tape head can be coupled directly to the amplifier input,
because the worst-case bias current of 80 nA with a 400 mH,
100 µ inch head (such as the PRB2H7K) is not troublesome.
Amplifier bias-current transients that can magnetize a head
present one potential tape head problem. The OP27 and OP37
are free of bias current transients upon power-up or power-
down. It is always advantageous to control the speed of power
supply rise and fall to eliminate transients.
In addition, the dc resistance of the head should be carefully
controlled and preferably below 1 kΩ. For this configuration,
the bias current induced offset voltage can be greater than the
100 pV maximum offset if the head resistance is not sufficiently
controlled.
A simple, but effective, fixed gain transformerless microphone
preamp (Figure 43) amplifies differential signals from low
impedance microphones by 50 dB and has an input impedance
of 2 kΩ. Because of the high working gain of the circuit, an
OP37 helps to preserve bandwidth, which is 110 kHz. As the
OP37 is a decompensated device (minimum stable gain of 5), a
dummy resistor, Rp, may be necessary if the microphone is to be
unplugged. Otherwise, the 100% feedback from the open input
can cause the amplifier to oscillate.
Common-mode input noise rejection will depend upon the
match of the bridge-resistor ratios. Either close tolerance (0.1%)
types should be used, or R4 should be trimmed for best CMRR.
All resistors should be metal film types for best stability and low
noise.
Noise performance of this circuit is limited more by the Input
Resistors R1 and R2 than by the op amp, as R1 and R2 each
generate a 4 nV/√Hz noise, while the op amp generates a
3.2 nV/√Hz noise. The rms sum of these predominant noise
sources is about 6 nV/√Hz, equivalent to 0.9 µV in a 20 kHz
noise bandwidth, or nearly 61 dB below a 1 mV input signal.
Measurements confirm this predicted performance.
LOW IMPEDANCE
MICROPHONE INPUT
=  T2
C1
5mF
R1
N
R3
N
R6

R4
N
R2
N
RP
N
OUTPUT
R3
R1
R4
R2
=
OP27/
OP37
+
R7
N
00317-043
Figure 43. Fixed Gain Transformerless Microphone Preamplifier
For applications demanding appreciably lower noise, a high
quality microphone transformer coupled preamplifier (Figure 44)
incorporates the internally compensated OP27. T1 is a JE-
115K-E 150 Ω/15 kΩ transformer that provides an optimum
source resistance for the OP27 device. The circuit has an overall
gain of 40 dB, the product of the transformer’s voltage setup and
the op amps voltage gain.
JENSEN TRANSFORMERS
A1
OP27
R3

R1
R2
1
C2
1800pF
OUTPUT

SOURCE
T1
1
T1 – JENSEN JE – 115K – E
1
3
6
2
00317-044
Figure 44. High Quality Microphone Transformer Coupled Preamplifier
Gain can be trimmed to other levels, if desired, by adjusting R2
or R1. Because of the low offset voltage of the OP27, the output
offset of this circuit is very low, 1.7 mV or less, for a 40 dB gain.
The typical output blocking capacitor can be eliminated in such
cases, but it is desirable for higher gains to eliminate switching
transients.
OP27
–18V
+18V
8
7
6
4
3
2
00317-045
Figure 45. Burn-In Circuit
Capacitor C2 and Resistor R2 form a 2 µs time constant in this
circuit, as recommended for optimum transient response by the
transformer manufacturer. With C2 in use, A1 must have unity-
gain stability. For situations where the 2 µs time constant is not
necessary, C2 can be deleted, allowing the faster OP37 to be
employed.
OP27 Data Sheet
Rev. H | Page 18 of 21
A 150 Ω resistor and R1 and R2 gain resistors connected to a
noiseless amplifier generate 220 nV of noise in a 20 kHz
bandwidth, or 73 dB below a 1 mV reference level. Any practical
amplifier can only approach this noise level; it can never exceed
it. With the OP27 and T1 specified, the additional noise
degradation is close to 3.6 dB (or −69.5 referenced to 1 mV).
REFERENCES
1. Lipshitz, S. R, “On RIAA Equalization Networks,” JAES,
Vol. 27, June 1979, p. 458–481.
2. Jung, W. G., IC Op Amp Cookbook, 2nd. Ed., H. W. Sams
and Company, 1980.
3. Jung, W. G., Audio IC Op Amp Applications, 2nd. Ed., H. W.
Sams and Company, 1978.
4. Jung, W. G., and Marsh, R. M., “Picking Capacitors,Audio,
February and March, 1980.
5. Otala, M., “Feedback-Generated Phase Nonlinearity in
Audio Amplifiers,” London AES Convention, March 1980,
preprint 1976.
6. Stout, D. F., and Kaufman, M., Handbook of Operational
Amplifier Circuit Design, New York, McGraw-Hill, 1976.
Data Sheet OP27
Rev. H | Page 19 of 21
OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MS-001
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
070606-A
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
SEATING
PLANE
0.015
(0.38)
MIN
0.210 (5.33)
MAX
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
8
14
5
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.100 (2.54)
BSC
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
0.060 (1.52)
MAX
0.430 (10.92)
MAX
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
PLANE
0.005 (0.13)
MIN
Figure 46. 8-Lead Plastic Dual-in-Line Package [PDIP]
(N-8)
P-Suffix
Dimensions shown in inches and (millimeters)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
0.310 (7.87)
0.220 (5.59)
0.005 (0.13)
MIN 0.055 (1.40)
MAX
0.100 (2.54) BSC
15°
0.320 (8.13)
0.290 (7.37)
0.015 (0.38)
0.008 (0.20)
SEATING
PLANE
0.200 (5.08)
MAX
0.405 (10.29) MAX
0.150 (3.81)
MIN
0.200 (5.08)
0.125 (3.18)
0.023 (0.58)
0.014 (0.36)
0.070 (1.78)
0.030 (0.76)
0.060 (1.52)
0.015 (0.38)
14
5
8
Figure 47. 8-Lead Ceramic DIP – Glass Hermetic Seal [CERDIP]
(Q-8)
Z-Suffix
Dimensions shown in inches and (millimeters)
OP27 Data Sheet
Rev. H | Page 20 of 21
CONTROLLING DIMENSIONS ARE I
N MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AA
012407-A
0.25 (0.0098)
0.17 (
0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099) 45°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
8 5
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BS
C
6.20 (0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
Figure 48. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
S-Suffix
Dimensions shown in millimeters and (inches)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MO-002-AK
01-15-2015-B
0.250 (6.35) MIN
0.185 (4.70)
0.165 (4.19) 0.050 (1.27) MAX
0.019 (0.48)
0.016 (0.41)
0.040 (1.02)
0.010 (0.25)
0.040 (1.02) MAX
0.160 (4.06)
0.140 (3.56)
0.100 (2.54)
BSC
6
28
7
5
4
3
1
0.200 (5.08)
BSC
0.100 (2.54)
BSC
45° BSC
BASE & SEATING PLANE
REFERENCE PLANE
0.370 (9.40)
0.335 (8.51)
0.335 (8.51)
0.305 (7.75)
BOTTOM VIEW
SIDE VIEW
0.021 (0.53)
0.016 (0.40)
0.50 (12.70)
MIN
0.034 (0.86)
0.028 (0.71)
0.045 (1.14)
0.027 (0.69)
Figure 49. 8-Lead Metal Can [TO-99]
(H-08)
J-Suffix
Dimensions shown in inches and (millimeters)
Data Sheet OP27
Rev. H | Page 21 of 21
ORDERING GUIDE
Model
1
Temperature Range
Package Description
Package Option
OP27AJ/883C −55°C to +125°C 8-Lead Metal Can (TO-99) J-Suffix (H-08)
OP27GJZ −40°C to +85°C 8-Lead Metal Can (TO-99) J-Suffix (H-08)
OP27AZ −55°C to +125°C 8-Lead CERDIP Z-Suffix (Q-8)
OP27AZ/883C −55°C to +125°C 8-Lead CERDIP Z-Suffix (Q-8)
OP27EZ −25°C to +85°C 8-Lead CERDIP Z-Suffix (Q-8)
OP27GZ −40°C to +85°C 8-Lead CERDIP Z-Suffix (Q-8)
OP27EPZ 0°C to +70°C 8-Lead PDIP P-Suffix (N-8)
OP27GPZ −40°C to +85°C 8-Lead PDIP P-Suffix (N-8)
OP27GS −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8)
OP27GS-REEL7 −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8)
OP27GSZ 40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8)
OP27GSZ-REEL −40°C to +85°C 8-Lead SOIC_N S-Suffix (R-8)
OP27GSZ-REEL7
−40°C to +85°C
8-Lead SOIC_N
S-Suffix (R-8)
OP27NBC Die
1 The OP27GJZ, OP27EPZ, OP27GPZ, OP27GSZ, OP27GSZ-REEL, and OP27GSZ-REEL7 are RoHS compliant parts.
©1981–2015 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00317-0-10/15(H)

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単価602
IC OPAMP GP 1 CIRCUIT TO99-8
入手可能な数量140
単価2474
IC OPAMP GP 1 CIRCUIT 8CERDIP
入手可能な数量330
単価2899
IC OPAMP GP 1 CIRCUIT TO99
入手可能な数量291
単価5882
IC OPAMP GP 1 CIRCUIT 8DIP
入手可能な数量103
単価1788
IC OPAMP GP 1 CIRCUIT 8CERDIP
入手可能な数量35
単価5966
IC OPAMP GP 1 CIRCUIT 8CERDIP
入手可能な数量59
単価6484
IC OPAMP GP 1 CIRCUIT 8DIP
入手可能な数量0
単価1056
IC OPAMP GP 1 CIRCUIT 8DIP
入手可能な数量0
単価0
IC OPAMP GP 1 CIRCUIT 8DIP
入手可能な数量0
単価0
IC OPAMP GP 1 CIRCUIT 8SOIC
入手可能な数量0
単価0
IC OPAMP GP 1 CIRCUIT 8SOIC
入手可能な数量0
単価0
IC OPAMP GP 1 CIRCUIT 8SOIC
入手可能な数量0
単価0