74AVC4TD245 Datasheet by Nexperia USA Inc.

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74AVC4TD245
4-bit dual supply translating transceiver with configurable
voltage translation; 3-state
Rev. 3 — 9 June 2017 Product data sheet
1 General description
The 74AVC4TD245 is a 4-bit, dual supply transceiver that enables bidirectional level
translation. It features eight 1-bit input-output ports (An and Bn), four direction control
inputs (DIR1, DIR2, DIR3 and DIR4), an output enable input (OE) and dual supply pins
(VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between
0.8 V and 3.6 V making the device suitable for translating between any of the low voltage
nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins An, OE and DIRn are referenced
to VCC(A) and pins Bn are referenced to VCC(B). A HIGH on DIRn allows transmission from
An to Bn and a LOW on DIRn allows transmission from Bn to An. The output enable input
(OE) can be used to disable the outputs so the buses are effectively isolated.
The device is fully specified for partial power-down applications using IOFF. The IOFF
circuitry disables the output, preventing any damaging backflow current through the
device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at
GND level, both An and Bn are in the high-impedance OFF-state.
2 Features and benefits
Wide supply voltage range:
VCC(A): 0.8 V to 3.6 V
VCC(B): 0.8 V to 3.6 V
Complies with JEDEC standards:
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114E Class 3B exceeds 8000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101C exceeds 1000 V
Maximum data rates:
380 Mbit/s (≥ 1.8 V to 3.3 V translation)
200 Mbit/s (≥ 1.1 V to 3.3 V translation)
200 Mbit/s (≥ 1.1 V to 2.5 V translation)
200 Mbit/s (≥ 1.1 V to 1.8 V translation)
150 Mbit/s (≥ 1.1 V to 1.5 V translation)
100 Mbit/s (≥ 1.1 V to 1.2 V translation)
Suspend mode
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
74AVC4TD245 Table 1. Ordering information Table 2. Marking codes
Nexperia 74AVC4TD245
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
74AVC4TD245 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 9 June 2017
2 / 24
IOFF circuitry provides partial Power-down mode operation
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C
3 Ordering information
Table 1. Ordering information
PackageType number
Temperature
range
Name Description Version
74AVC4TD245BQ -40 °C to +125 °C DHVQFN16 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads;
16 terminals; body 2.5 x 3.5 x 0.85 mm
SOT763-1
74AVC4TD245GU -40 °C to +125 °C XQFN16 plastic, extremely thin quad flat package; no leads;
16 terminals; body 1.80 x 2.60 x 0.50 mm
SOT1161-1
4 Marking
Table 2. Marking codes
Type number Marking code
74AVC4TD245BQ 4TD245
74AVC4TD245GU BD4
5 Functional diagram
001aao069
B1
A1
OE DIR1
B2 B3 B4
VCC(B)
A2 DIR2 A3 DIR3 A4 DIR4
VCC(A)
Figure 1. Logic symbol
74AVC4TD245 mnexnransoewer 901350970 74AVCATD245 6 UH wwwwww @Q@@@@ @@ I3 Transparent mp mew 74AVCATD245 Transparent mp wew
Nexperia 74AVC4TD245
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
74AVC4TD245 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 9 June 2017
3 / 24
001aao070
VCC(A) VCC(B)
Bn
to next transceiver
OE
An
DIRn
Figure 2. Logic diagram (one 1-bit transceiver)
6 Pinning information
6.1 Pinning
001aao071
GND(1)
74AVC4TD245
DIR4 DIR3
A4 B4
A3 B3
A2 B2
A1 B1
DIR1 DIR2
GND
OE
V
C
C
(
A)
V
C
C
(
B)
Transparent top view
7 10
6 11
5 12
4 13
3 14
2 15
8
9
1
16
terminal 1
index area
(1) This is not a supply pin, the substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad
however if it is soldered the solder land should remain
floating or be connected to GND.
Figure 3. Pin configuration SOT763-1 (DHVQFN16)
74AVC4TD245
terminal 1
index area
001aao073
Transparent top view
8A4
7A3
6A2
5A1
B
41
3
B
31
4
B
21
5
B
11
6
DIR312
OE11
GND10
DIR49
1DIR2
2VCC(B)
3VCC(A)
4DIR1
Figure 4. Pin configuration SOT1161-1 (XQFN16)
74AVC4TD245
Nexperia 74AVC4TD245
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
74AVC4TD245 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 9 June 2017
4 / 24
6.2 Pin description
Table 3. Pin description
PinSymbol
SOT763-1 SOT1161-1
Description
VCC(A) 1 3 supply voltage A (An, OE and DIRn inputs are
referenced to VCC(A))
DIR1, DIR2, DIR3, DIR4 2, 15, 10, 7 4, 1, 12, 9 direction control input
A1, A2, A3, A4 3, 4, 5, 6 5, 6, 7, 8 data input or output
GND 8 10 ground (0 V)
B1, B2, B3, B4 14, 13, 12, 11 16, 15, 14, 13 data input or output
OE 9 11 output enable input (active LOW)
VCC(B) 16 2 supply voltage B (Bn pins are referenced to VCC(B))
7 Functional description
Table 4. Function table [1] [2]
Supply voltage Input Input/output
VCC(A), VCC(B) OE DIR1 DIR2 DIR3 DIR4 An Bn
0.8 V to 3.6 V L L X X X A1 = B1 input B1
0.8 V to 3.6 V L H X X X input A1 B1 = A1
0.8 V to 3.6 V L X L X X A2 = B2 input B2
0.8 V to 3.6 V L X H X X input A2 B2 = A2
0.8 V to 3.6 V L X X L X A3 = B3 input B3
0.8 V to 3.6 V L X X H X input A3 B3 = A3
0.8 V to 3.6 V L X X X L A4 = B4 input B4
0.8 V to 3.6 V L X X X H input A4 B4 = A4
0.8 V to 3.6 V H X X X X Z Z
GND [3] XXXXXZ Z
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
[2] The An, DIRn and OE input circuit is referenced to VCC(A); The Bn input circuit is referenced to VCC(B).
[3] If at least one of VCC(A) or VCC(B) is at GND level, the device goes into suspend mode.
74AVC4TD245 Table 6. Recommended operating conditions
Nexperia 74AVC4TD245
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
74AVC4TD245 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 9 June 2017
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8 Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC(A) supply voltage A -0.5 +4.6 V
VCC(B) supply voltage B -0.5 +4.6 V
IIK input clamping current VI < 0 V -50 - mA
VIinput voltage [1] -0.5 +4.6 V
IOK output clamping current VO < 0 V -50 - mA
Active mode [1] [2] [3] -0.5 VCCO + 0.5 VVOoutput voltage
Suspend or 3-state mode [1] -0.5 +4.6 V
IOoutput current VO = 0 V to VCCO
[2] - ±50 mA
ICC supply current ICC(A) or ICC(B) - 100 mA
IGND ground current -100 - mA
Tstg storage temperature -65 +150 °C
Tamb = -40 °C to +125 °C
DHVQFN16 [4] - 500 mW
Ptot total power dissipation
XQFN16 - 250 mW
[1] The minimum input voltage ratings and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] VCCO is the supply voltage associated with the output port.
[3] VCCO + 0.5 V should not exceed 4.6 V.
[4] For DHVQFN16 package: above 60 °C the value of Ptot derates linearly at 4.5 mW/K.
9 Recommended operating conditions
Table 6. Recommended operating conditions
Symbol Parameter Conditions Min Max Unit
VCC(A) supply voltage A 0.8 3.6 V
VCC(B) supply voltage B 0.8 3.6 V
VIinput voltage 0 3.6 V
Active mode [1] 0 VCCO VVOoutput voltage
Suspend or 3-state mode 0 3.6 V
Tamb ambient temperature -40 +125 °C
Δt/Δ V input transition rise and fall rate VCCI =0.8 V to 3.6 V [2] - 10 ns/V
[1] VCCO is the supply voltage associated with the output port.
[2] VCCI is the supply voltage associated with the input port.
74AVC4TD245
Nexperia 74AVC4TD245
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
74AVC4TD245 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 9 June 2017
6 / 24
10 Static characteristics
Table 7. Typical static characteristics at Tamb = 25 °C [1]
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ Max Unit
VI = VIH or VIL
VOH HIGH-level output voltage
IO = -1.5 mA; VCC(A) = VCC(B) = 0.8 V - 0.69 - V
VI = VIH or VIL
VOL LOW-level output voltage
IO = 1.5 mA; VCC(A) = VCC(B) = 0.8 V - 0.07 - V
IIinput leakage current DIRn, OE input; VI = 0 V or 3.6 V;
VCC(A) = VCC(B) = 0.8 V to 3.6 V
- ±0.025 ±0.25 μA
A or B port; VO = 0 V or VCCO;
VCC(A) = VCC(B) = 3.6 V
[2] - ±0.5 ±2.5 μA
suspend mode A port; VO = 0 V or VCCO;
VCC(A) = 3.6 V; VCC(B) = 0 V
[2] - ±0.5 ±2.5 μA
IOZ OFF-state output current
suspend mode B port; VO = 0 V or VCCO;
VCC(A) = 0 V; VCC(B) = 3.6 V
[2] - ±0.5 ±2.5 μA
A port; VI or VO = 0 V to 3.6 V; VCC(A) = 0 V;
VCC(B) = 0.8 V to 3.6 V
- ±0.1 ±1 μAIOFF power-off leakage current
B port; VI or VO = 0 V to 3.6 V; VCC(B) = 0 V;
VCC(A) = 0.8 V to 3.6 V
- ±0.1 ±1 μA
CIinput capacitance DIRn, OE input; VI = 0 V or 3.3 V;
VCC(A) = VCC(B) = 3.3 V
- 2.0 - pF
CI/O input/output capacitance A and B port; VO = 3.3 V or 0 V;
VCC(A) = VCC(B) = 3.3 V
- 4.0 - pF
[1] VCCO is the supply voltage associated with the output port.
[2] For I/O ports, the parameter IOZ includes the input leakage current.
Table 8. Static characteristics [1] [2]
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
-40 °C to +85 °C -40 °C to +125 °CSymbol Parameter Conditions
Min Max Min Max
Unit
data input
VCCI = 0.8 V 0.70VCCI - 0.70VCCI - V
VCCI = 1.1 V to 1.95 V 0.65VCCI - 0.65VCCI - V
VCCI = 2.3 V to 2.7 V 1.6 - 1.6 - V
VCCI = 3.0 V to 3.6 V 2 - 2 - V
DIRn, OE input
VCC(A) = 0.8 V 0.70VCC(A) - 0.70VCC(A) - V
VCC(A) = 1.1 V to 1.95 V 0.65VCC(A) - 0.65VCC(A) - V
VIH HIGH-level
input voltage
VCC(A) = 2.3 V to 2.7 V 1.6 - 1.6 - V
74AVC4TD245
Nexperia 74AVC4TD245
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
74AVC4TD245 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 9 June 2017
7 / 24
-40 °C to +85 °C -40 °C to +125 °CSymbol Parameter Conditions
Min Max Min Max
Unit
VCC(A) = 3.0 V to 3.6 V 2 - 2 - V
data input
VCCI = 0.8 V - 0.30VCCI - 0.30VCCI V
VCCI = 1.1 V to 1.95 V - 0.35VCCI - 0.35VCCI V
VCCI = 2.3 V to 2.7 V - 0.7 - 0.7 V
VCCI = 3.0 V to 3.6 V - 0.8 - 0.8 V
DIRn, OE input
VCC(A) = 0.8 V - 0.30VCC(A) - 0.30VCC(A) V
VCC(A) = 1.1 V to 1.95 V - 0.35VCC(A) - 0.35VCC(A) V
VCC(A) = 2.3 V to 2.7 V - 0.7 - 0.7 V
VIL LOW-level
input voltage
VCC(A) = 3.0 V to 3.6 V - 0.8 - 0.8 V
VI = VIH or VIL
IO = -100 μA;
VCC(A) = VCC(B) = 0.8 V to 3.6 V
VCCO - 0.1 - VCCO - 0.1 - V
IO = -3 mA;
VCC(A) = VCC(B) = 1.1 V
0.85 - 0.85 - V
IO = -6 mA;
VCC(A) = VCC(B) = 1.4 V
1.05 - 1.05 - V
IO = -8 mA;
VCC(A) = VCC(B) = 1.65 V
1.2 - 1.2 - V
IO = -9 mA;
VCC(A) = VCC(B) = 2.3 V
1.75 - 1.75 - V
VOH HIGH-level
output voltage
IO = -12 mA;
VCC(A) = VCC(B) = 3.0 V
2.3 - 2.3 - V
VI = VIH or VIL
IO = 100 μA;
VCC(A) = VCC(B) = 0.8 V to 3.6 V
- 0.1 - 0.1 V
IO = 3 mA;
VCC(A) = VCC(B) = 1.1 V
- 0.25 - 0.25 V
IO = 6 mA;
VCC(A) = VCC(B) = 1.4 V
- 0.35 - 0.35 V
IO = 8 mA;
VCC(A) = VCC(B) = 1.65 V
- 0.45 - 0.45 V
IO = 9 mA;
VCC(A) = VCC(B) = 2.3 V
- 0.55 - 0.55 V
VOL LOW-level
output voltage
IO = 12 mA;
VCC(A) = VCC(B) = 3.0 V
- 0.7 - 0.7 V
IIinput leakage
current
DIRn, OE input; VI = 0 V or 3.6 V;
VCC(A) = VCC(B) = 0.8 V to 3.6 V
- ±1 - ±5 μA
74AVC4TD245
Nexperia 74AVC4TD245
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
74AVC4TD245 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 9 June 2017
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-40 °C to +85 °C -40 °C to +125 °CSymbol Parameter Conditions
Min Max Min Max
Unit
A or B port; VO = 0 V or VCCO;
VCC(A) = VCC(B) = 3.6 V
[3] - ±5 - ±30 μA
suspend mode A port;
VO = 0 V or VCCO;
VCC(A) = 3.6 V; VCC(B) = 0 V
[3] - ±5 - ±30 μA
IOZ OFF-state
output current
suspend mode B port;
VO = 0 V or VCCO;
VCC(A) = 0 V; VCC(B) = 3.6 V
[3] - ±5 - ±30 μA
A port; VI or VO = 0 V to 3.6 V;
VCC(A) = 0 V; VCC(B) = 0.8 V to 3.6 V
- ±5 - ±30 μAIOFF power-off
leakage
current B port; VI or VO = 0 V to 3.6 V;
VCC(B) = 0 V; VCC(A) = 0.8 V to 3.6 V
- ±5 - ±30 μA
A port; VI = 0 V or VCCI; IO = 0 A
VCC(A) = 0.8 V to 3.6 V;
VCC(B) = 0.8 V to 3.6 V
- 10 - 55 μA
VCC(A) = 1.1 V to 3.6 V;
VCC(B) = 1.1 V to 3.6 V
- 8 - 50 μA
VCC(A) = 3.6 V; VCC(B) = 0 V - 8 - 50 μA
VCC(A) = 0 V; VCC(B) = 3.6 V -2 - -12 - μA
B port; VI = 0 V or VCCI; IO = 0 A
VCC(A) = 0.8 V to 3.6 V;
VCC(B) = 0.8 V to 3.6 V
- 10 - 55 μA
VCC(A) = 1.1 V to 3.6 V;
VCC(B) = 1.1 V to 3.6 V
- 8 - 50 μA
VCC(A) = 3.6 V; VCC(B) = 0 V -2 - -12 - μA
VCC(A) = 0 V; VCC(B) = 3.6 V - 8 - 50 μA
A plus B port (ICC(A) + ICC(B)); IO = 0 A;
VI = 0 V or VCCI; VCC(A) = 0.8 V to 3.6 V;
VCC(B) = 0.8 V to 3.6 V
- 20 - 70 μA
ICC supply current
A plus B port (ICC(A) + ICC(B)); IO = 0 A;
VI = 0 V or VCCI; VCC(A) = 1.1 V to 3.6 V;
VCC(B) = 1.1 V to 3.6 V
- 16 - 65 μA
ΔICC additional
supply current
VI = 3.0 V; VCC(A) = VCC(B) = 3.6 V - 500 - 650 μA
[1] VCCO is the supply voltage associated with the output port.
[2] VCCI is the supply voltage associated with the data input port.
[3] For I/O ports, the parameter IOZ includes the input leakage current.
74AVC4TD245 'ccm com
Nexperia 74AVC4TD245
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
74AVC4TD245 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 9 June 2017
9 / 24
Table 9. Typicaltotal supply current (ICC(A) + ICC(B))
VCC(B)
VCC(A)
0 V 0.8 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V
Unit
0 V 0 0.1 0.1 0.1 0.1 0.1 0.1 μA
0.8 V 0.1 0.1 0.1 0.1 0.1 0.3 1.6 μA
1.2 V 0.1 0.1 0.1 0.1 0.1 0.1 0.8 μA
1.5 V 0.1 0.1 0.1 0.1 0.1 0.1 0.4 μA
1.8 V 0.1 0.1 0.1 0.1 0.1 0.1 0.2 μA
2.5 V 0.1 0.3 0.1 0.1 0.1 0.1 0.1 μA
3.3 V 0.1 1.6 0.8 0.4 0.2 0.1 0.1 μA
11 Dynamic characteristics
Table 10. Typical power dissipation capacitance at VCC(A) = VCC(B) and Tamb = 25 °C [1] [2]
Voltages are referenced to GND (ground = 0 V).
VCC(A) = VCC(B)
Symbol Parameter Conditions
0.8 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V
Unit
A port: (direction An toBn);
output enabled
0.2 0.2 0.2 0.2 0.3 0.4 pF
A port: (direction An to Bn);
output disabled
0.2 0.2 0.2 0.2 0.3 0.4 pF
A port: (direction Bn toAn);
output enabled
9.5 9.7 9.8 9.9 10.7 11.9 pF
A port: (direction Bn to An);
output disabled
0.6 0.6 0.6 0.6 0.7 0.7 pF
B port: (direction An to Bn);
output enabled
9.5 9.7 9.8 9.9 10.7 11.9 pF
B port: (direction An to Bn);
output disabled
0.6 0.6 0.6 0.6 0.7 0.7 pF
B port: (direction Bn to An);
output enabled
0.2 0.2 0.2 0.2 0.3 0.4 pF
CPD power dissipation
capacitance
B port: (direction Bn to An);
output disabled
0.2 0.2 0.2 0.2 0.3 0.4 pF
[1] CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD × VCC
2 × fi × N + Σ(CL × VCC
2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(CL × VCC
2 × fo) = sum of the outputs.
[2] fi = 10 MHz; VI = GND to VCC; tr = tf = 1 ns; CL = 0 pF; RL = ∞ Ω.
74AVC4TD245 amb Figure 7 Figure 5 Figure 6 amb Figure 7 Figure 5 Figure 6 GE GE DE (E Figure 7 Figure 5 Figure 6 flfifir‘fi
Nexperia 74AVC4TD245
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
74AVC4TD245 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 9 June 2017
10 / 24
Table 11. Typical dynamic characteristics at VCC(A) = 0.8 V and Tamb = 25 °C [1]
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7; for waveforms see Figure 5 and Figure 6
VCC(B)
Symbol Parameter Conditions
0.8 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V
Unit
An to Bn 14.5 7.3 6.5 6.2 5.9 6.0 nstpd propagation delay
Bn to An 14.5 12.7 12.4 12.3 12.1 12.0 ns
OE to An 14.3 14.3 14.3 14.3 14.3 14.3 nstdis disable time
OE to Bn 17.0 9.9 9.0 9.4 9.0 9.7 ns
OE to An 18.2 18.2 18.2 18.2 18.2 18.2 nsten enable time
OE to Bn 19.2 10.7 9.8 9.6 9.7 10.2 ns
[1] tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH.
Table 12. Typical dynamic characteristics at VCC(B) = 0.8 V and Tamb = 25 °C [1]
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7; for waveforms see Figure 5 and Figure 6
VCC(A)
Symbol Parameter Conditions
0.8 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V
Unit
An to Bn 14.5 12.7 12.4 12.3 12.1 12.0 nstpd propagation delay
Bn to An 14.5 7.3 6.5 6.2 5.9 6.0 ns
OE to An 14.3 5.5 4.1 4.0 3.0 3.5 nstdis disable time
OE to Bn 17.0 13.8 13.4 13.1 12.9 12.7 ns
OE to An 18.2 5.6 4.0 3.2 2.4 2.2 nsten enable time
OE to Bn 19.2 14.6 14.1 13.9 13.7 13.6 ns
[1] tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH.
Table 13. Dynamic characteristics for temperature range -40 °C to +85 °C [1]
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7; for waveforms see Figure 5 and Figure 6
VCC(B)
1.2 V
± 0.1 V
1.5 V
± 0.1 V
1.8 V
± 0.15 V
2.5 V
± 0.2 V
3.3 V
± 0.3 V
Symbol Parameter Conditions
Min Max Min Max Min Max Min Max Min Max
Unit
VCC(A) = 1.1 V to 1.3 V
An to Bn 2.0 10.5 1.3 7.8 1.2 6.9 1.0 5.9 0.8 5.7 nstpd propagation
delay Bn to An 2.0 10.5 1.5 9.9 1.5 9.7 1.4 9.4 1.4 9.3 ns
OE to An 2.0 10.0 2.0 10.0 2.0 10.0 2.0 10.0 2.0 10.0 nstdis disable time
OE to Bn 2.0 11.1 2.0 8.6 1.0 8.0 0.7 7.0 1.0 8.0 ns
OE to An 2.0 13.5 2.0 13.5 2.0 13.5 2.0 13.5 2.0 13.5 nsten enable time
OE to Bn 2.0 15.0 2.0 11.0 2.0 9.4 1.0 7.8 1.0 7.4 ns
74AVC4TD245 mama Emmy.
Nexperia 74AVC4TD245
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
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Product data sheet Rev. 3 — 9 June 2017
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VCC(B)
1.2 V
± 0.1 V
1.5 V
± 0.1 V
1.8 V
± 0.15 V
2.5 V
± 0.2 V
3.3 V
± 0.3 V
Symbol Parameter Conditions
Min Max Min Max Min Max Min Max Min Max
Unit
VCC(A) = 1.4 V to 1.6 V
An to Bn 1.5 9.9 1.0 7.1 1.0 6.0 0.5 4.8 0.5 4.3 nstpd propagation
delay Bn to An 1.3 7.8 1.0 7.1 0.9 6.9 0.8 6.6 0.6 6.5 ns
OE to An 1.0 6.0 1.0 6.0 1.0 6.0 1.0 6.0 1.0 6.0 nstdis disable time
OE to Bn 2.0 10.2 1.5 7.5 0.9 7.2 0.4 6.2 0.4 6.1 ns
OE to An 1.0 7.5 1.0 7.5 1.0 7.5 1.0 7.5 1.0 7.5 nsten enable time
OE to Bn 2.0 14.4 1.4 7.9 1.3 7.7 1.1 6.4 1.1 5.6 ns
VCC(A) = 1.65 V to 1.95 V
An to Bn 1.5 9.7 0.9 6.9 0.8 5.7 0.5 4.5 0.3 4.0 nstpd propagation
delay Bn to An 1.2 6.9 1.0 6.0 0.8 5.7 0.5 5.5 0.5 5.3 ns
OE to An 0.5 5.7 0.5 5.7 0.5 5.7 0.5 5.7 0.5 5.7 nstdis disable time
OE to Bn 2.0 9.9 1.5 7.0 0.8 6.9 0.2 5.8 0.2 5.9 ns
OE to An 1.0 6.7 1.0 6.7 1.0 6.7 1.0 6.7 1.0 6.7 nsten enable time
OE to Bn 1.5 13.9 1.2 7.2 1.2 6.9 0.8 5.4 0.6 5.0 ns
VCC(A) = 2.3 V to 2.7 V
An to Bn 1.4 9.4 0.8 6.6 0.5 5.5 0.4 4.2 0.2 3.7 nstpd propagation
delay Bn to An 1.0 5.9 0.5 4.8 0.5 4.5 0.4 4.2 0.3 3.9 ns
OE to An 0.2 4.0 0.2 4.0 0.2 4.0 0.2 4.0 0.2 4.0 nstdis disable time
OE to Bn 2.0 9.3 1.5 6.7 0.7 6.3 0.2 5.0 0.2 5.7 ns
OE to An 0.6 4.5 0.6 4.5 0.6 4.5 0.6 4.5 0.6 4.5 nsten enable time
OE to Bn 1.5 13.6 1.0 6.8 1.0 6.0 0.8 4.6 0.6 4.2 ns
VCC(A) = 3.0 V to 3.6 V
An to Bn 1.4 9.3 0.6 6.5 0.5 5.3 0.3 3.9 0.2 3.5 nstpd propagation
delay Bn to An 0.8 5.7 0.5 4.3 0.3 4.0 0.2 3.7 0.2 3.5 ns
OE to An 0.2 4.5 0.2 4.5 0.2 4.5 0.2 4.5 0.2 4.5 nstdis disable time
OE to Bn 2.0 9.0 1.5 6.4 0.7 6.1 0.2 4.8 0.2 5.6 ns
OE to An 0.5 4.0 0.5 4.0 0.5 4.0 0.5 4.0 0.5 4.0 nsten enable time
OE to Bn 1.5 13.4 1.0 6.7 1.0 5.9 0.7 4.4 0.5 4.0 ns
[1] tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH.
74AVC4TD245 Figure 7 Figure 5 Figure 6
Nexperia 74AVC4TD245
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
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Product data sheet Rev. 3 — 9 June 2017
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Table 14. Dynamic characteristics for temperature range -40 °C to +125 °C [1]
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7; for waveforms see Figure 5 and Figure 6
VCC(B)
1.2 V
± 0.1 V
1.5 V
± 0.1 V
1.8 V
± 0.15 V
2.5 V
± 0.2 V
3.3 V
± 0.3 V
Symbol Parameter Conditions
Min Max Min Max Min Max Min Max Min Max
Unit
VCC(A) = 1.1 V to 1.3 V
An to Bn 2.0 12.1 1.3 9.0 1.2 8.0 1.0 6.8 0.8 6.6 nstpd propagation
delay Bn to An 2.0 12.1 1.5 11.4 1.5 11.2 1.4 10.9 1.4 10.7 ns
OE to An 2.0 11.5 2.0 11.5 2.0 11.5 2.0 11.5 2.0 11.5 nstdis disable time
OE to Bn 2.0 12.8 2.0 9.9 1.0 9.2 0.7 8.1 1.0 9.2 ns
OE to An 2.0 15.6 2.0 15.6 2.0 15.6 2.0 15.6 2.0 15.6 nsten enable time
OE to Bn 2.0 17.3 2.0 12.7 2.0 10.9 1.0 9.0 1.0 8.6 ns
VCC(A) = 1.4 V to 1.6 V
An to Bn 1.5 11.4 1.0 8.2 1.0 6.9 0.5 5.6 0.5 5.0 nstpd propagation
delay Bn to An 1.3 9.0 1.0 8.2 0.9 8.0 0.8 7.6 0.6 7.5 ns
OE to An 1.0 6.9 1.0 6.9 1.0 6.9 1.0 6.9 1.0 6.9 nstdis disable time
OE to Bn 2.0 11.8 1.5 8.7 0.9 8.3 0.4 7.2 0.4 7.1 ns
OE to An 1.0 8.7 1.0 8.7 1.0 8.7 1.0 8.7 1.0 8.7 nsten enable time
OE to Bn 2.0 16.6 1.4 9.1 1.3 8.9 1.1 7.4 1.1 6.5 ns
VCC(A) = 1.65 V to 1.95 V
An to Bn 1.5 11.2 0.9 8.0 0.8 6.6 0.5 5.2 0.3 4.6 nstpd propagation
delay Bn to An 1.2 8.0 1.0 6.9 0.8 6.6 0.5 6.4 0.5 6.1 ns
OE to An 0.5 6.6 0.5 6.6 0.5 6.6 0.5 6.6 0.5 6.6 nstdis disable time
OE to Bn 2.0 11.4 1.5 8.1 0.8 8.0 0.2 6.7 0.2 6.8 ns
OE to An 1.0 7.8 1.0 7.8 1.0 7.8 1.0 7.8 1.0 7.8 nsten enable time
OE to Bn 1.5 16.0 1.2 8.3 1.2 8.0 0.8 6.3 0.6 5.8 ns
VCC(A) = 2.3 V to 2.7 V
An to Bn 1.4 10.9 0.8 7.6 0.5 6.4 0.4 4.9 0.2 4.3 nstpd propagation
delay Bn to An 1.0 6.8 0.5 5.6 0.5 5.2 0.4 4.9 0.3 4.5 ns
OE to An 0.2 4.6 0.2 4.6 0.2 4.6 0.2 4.6 0.2 4.6 nstdis disable time
OE to Bn 2.0 10.7 1.5 7.8 0.7 7.3 0.2 5.8 0.2 6.6 ns
OE to An 0.6 5.2 0.6 5.2 0.6 5.2 0.6 5.2 0.6 5.2 nsten enable time
OE to Bn 1.5 15.7 1.0 7.9 1.0 6.9 0.8 5.3 0.6 4.9 ns
VCC(A) = 3.0 V to 3.6 V
An to Bn 1.4 10.7 0.6 7.5 0.5 6.1 0.3 4.5 0.2 4.1 nstpd propagation
delay Bn to An 0.8 6.6 0.5 5.0 0.3 4.6 0.2 4.3 0.2 4.1 ns
tdis disable time OE to An 0.2 5.2 0.2 5.2 0.2 5.2 0.2 5.2 0.2 5.2 ns
74AVC4TD245 U oma 5007A Table 15 E —/V T K W V Wmaamfi We Table 15
Nexperia 74AVC4TD245
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
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Product data sheet Rev. 3 — 9 June 2017
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VCC(B)
1.2 V
± 0.1 V
1.5 V
± 0.1 V
1.8 V
± 0.15 V
2.5 V
± 0.2 V
3.3 V
± 0.3 V
Symbol Parameter Conditions
Min Max Min Max Min Max Min Max Min Max
Unit
OE to Bn 2.0 10.4 1.5 7.4 0.7 7.1 0.2 5.6 0.2 6.5 ns
OE to An 0.5 4.6 0.5 4.6 0.5 4.6 0.5 4.6 0.5 4.6 nsten enable time
OE to Bn 1.5 15.5 1.0 7.8 1.0 6.8 0.7 5.1 0.5 4.6 ns
[1] tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH.
11.1 Waveforms and test circuit
001aao074
VI
GND
VOH
An, Bn input
Bn, An output
VOL
VM
VM
tPHL tPLH
Measurement points are given in Table 15.
VOL and VOH are typical output voltage levels that occur with the output load.
Figure 5. The data input (An, Bn) to output (Bn, An) propagation delay times
Measurement points are given in Table 15.
VOL and VOH are typical output voltage levels that occur with the output load.
VCCO is the supply voltage associated with the output port.
Figure 6. Enable and disable times
74AVC4TD245
Nexperia 74AVC4TD245
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
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Product data sheet Rev. 3 — 9 June 2017
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Table 15. Measurement points
Supply voltage Input [1] Output [2]
VCC(A), VCC(B) VMVMVXVY
0.8 V to 1.6 V 0.5VCCI 0.5VCCO VOL + 0.1 V VOH - 0.1 V
1.65 V to 2.7 V 0.5VCCI 0.5VCCO VOL + 0.15 V VOH - 0.15 V
3.0 V to 3.6 V 0.5VCCI 0.5VCCO VOL + 0.3 V VOH - 0.3 V
[1] VCCI is the supply voltage associated with the data input port.
[2] VCCO is the supply voltage associated with the output port.
VMVM
tW
tW
10 %
90 %
0 V
VI
VI
negative
pulse
positive
pulse
0 V
VMVM
90 %
10 %
tf
tr
tr
tf
001aae331
VEXT
VCC
VIVO
DUT
CL
RT
RL
RL
G
Test data is given in Table 16.
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance.
VEXT = External voltage for measuring switching times.
Figure 7. Test circuit for measuring switching times
Table 16. Test data
Supply voltage Input Load VEXT
VCC(A), VCC(B) VI [1] Δt/ΔV [2] CLRLtPLH, tPHL tPZH, tPHZ tPZL, tPLZ [3]
0.8 V to 1.6 V VCCI ≤ 1.0 ns/V 15 pF 2 kΩ open GND 2VCCO
1.65 V to 2.7 V VCCI ≤ 1.0 ns/V 15 pF 2 kΩ open GND 2VCCO
3.0 V to 3.6 V VCCI ≤ 1.0 ns/V 15 pF 2 kΩ open GND 2VCCO
[1] VCCI is the supply voltage associated with the data input port.
[2] dV/dt ≥ 1.0 V/ns
[3] VCCO is the supply voltage associated with the output port.
74AVC4TD245 001551475 no 11111 77 CL CL
Nexperia 74AVC4TD245
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
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Product data sheet Rev. 3 — 9 June 2017
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11.2 Typical propagation delay characteristics
001aai476
CL(pF)
0 604020
12
16
8
20
24
tpd
(ns)
4
(1)
(2)
(3)
(4)
(5)
(6)
CL(pF)
0 604020
001aai477
13
17
21
tpd
(ns)
9
(1)
(2)
(3)
(4)
(5)
(6)
a. Propagation delay (A to B); VCC(A) = 0.8 V b. Propagation delay (A to B); VCC(B) = 0.8 V
(1) VCC(B) = 0.8 V
(2) VCC(B) = 1.2 V
(3) VCC(B) = 1.5 V
(4) VCC(B) = 1.8 V
(5) VCC(B) = 2.5 V
(6) VCC(B) = 3.3 V
(1) VCC(A) = 0.8 V
(2) VCC(A) = 1.2 V
(3) VCC(A) = 1.5 V
(4) VCC(A) = 1.8 V
(5) VCC(A) = 2.5 V
(6) VCC(A) = 3.3 V
Figure 8. Typical propagation delay versus load capacitance; Tamb = 25 °C
74AVC4TD245 001551478 / \ \\\ \\ amaaws \ \ \\ \\\\ CL 001551491 \\\\ \\\ \ \ \\ no 1551430 \\\\\ \\\\ \\\\\ CL
Nexperia 74AVC4TD245
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
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Product data sheet Rev. 3 — 9 June 2017
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CL(pF)
0 604020
001aai478
3
5
7
tPLH
(ns)
1
(1)
(2)
(3)
(4)
(5)
CL(pF)
0 604020
001aai491
3
5
7
tPHL
(ns)
1
(4)
(5)
(1)
(2)
(3)
a. LOW to HIGH propagation delay (A to B); VCC(A) = 1.2 V b. HIGH to LOW propagation delay (A to B); VCC(A) = 1.2 V
CL(pF)
0 604020
001aai479
3
5
7
tPLH
(ns)
1
(1)
(2)
(3)
(4)
(5)
CL(pF)
0 604020
001aai480
3
5
7
tPHL
(ns)
1
(1)
(2)
(3)
(5)
(4)
c. LOW to HIGH propagation delay (A to B); VCC(A) = 1.5 V d. HIGH to LOW propagation delay (A to B); VCC(A) = 1.5 V
(1) VCC(B) = 1.2 V
(2) VCC(B) = 1.5 V
(3) VCC(B) = 1.8 V
(4) VCC(B) = 2.5 V
(5) VCC(B) = 3.3 V
Figure 9. Typical propagation delay versus load capacitance; Tamb = 25 °C
74AVC4TD245 001551481 001531482 \\ \ \\\ \ \\\ \ \\\\ \ \\ \ \\\\ \\ 001531483 001531486 \ \ \ \\ \\ \\ \ \ \\\\ \\\ \\ \ \\ \\\\ \ \ CL CL
Nexperia 74AVC4TD245
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
74AVC4TD245 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 9 June 2017
17 / 24
CL(pF)
0 604020
001aai481
3
5
7
tPLH
(ns)
1
(1)
(2)
(3)
(5)
(4)
CL(pF)
0 604020
001aai482
3
5
7
tPHL
(ns)
1
(1)
(2)
(3)
(5)
(4)
a. LOW to HIGH propagation delay (A to B); VCC(A) = 1.8 V b. HIGH to LOW propagation delay (A to B); VCC(A) = 1.8 V
CL(pF)
0 604020
001aai483
3
5
7
tPLH
(ns)
1
(1)
(2)
(3)
(5)
(4)
CL(pF)
0 604020
001aai486
3
5
7
tPHL
(ns)
1
(1)
(2)
(3)
(5)
(4)
c. LOW to HIGH propagation delay (A to B); VCC(A) = 2.5 V d. HIGH to LOW propagation delay (A to B); VCC(A) = 2.5 V
(1) VCC(B) = 1.2 V
(2) VCC(B) = 1.5 V
(3) VCC(B) = 1.8 V
(4) VCC(B) = 2.5 V
(5) VCC(B) = 3.3 V
Figure 10. Typical propagation delay versus load capacitance; Tamb = 25 °C
74AVC4TD245 001551455 \\ \\\ \\ \\ \\\\ \\\ \\\\ CL
Nexperia 74AVC4TD245
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
74AVC4TD245 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 9 June 2017
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CL(pF)
0 604020
001aai485
3
5
7
tPLH
(ns)
1
(1)
(2)
(3)
(5)
(4)
CL(pF)
0 604020
001aai484
3
5
7
tPHL
(ns)
1
(1)
(2)
(3)
(5)
(4)
a. LOW to HIGH propagation delay (A to B); VCC(A) = 3.3 V b. HIGH to LOW propagation delay (A to B); VCC(A) = 3.3 V
(1) VCC(B) = 1.2 V
(2) VCC(B) = 1.5 V
(3) VCC(B) = 1.8 V
(4) VCC(B) = 2.5 V
(5) VCC(B) = 3.3 V
Figure 11. Typical propagation delay versus load capacitance; Tamb = 25 °C
74AVC4TD245 DHVQFN1G: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads, ‘—'H D l 1 A /+ ” ’’’’’ 4 ’’’’’ ‘” % W? , l :3 l ":1; D FD *DF Ff: EC l l V/lwl H «mm :Jwawuw l :> €73 13:2 % mmflmflm k j 3: E@ W
Nexperia 74AVC4TD245
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
74AVC4TD245 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 9 June 2017
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12 Package outline
terminal 1
index area
0.51
A1Eh
b
UNIT ye
0.2
c
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 3.6
3.4
Dh
2.15
1.85
y1
2.6
2.4
1.15
0.85
e1
2.5
0.30
0.18
0.05
0.00 0.05 0.1
DIMENSIONS (mm are the original dimensions)
SOT763-1 MO-241 - - -- - -
0.5
0.3
L
0.1
v
0.05
w
0 2.5 5 mm
scale
SOT763-1
DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
16 terminals; body 2.5 x 3.5 x 0.85 mm
A(1)
max.
A
A1
c
detail X
y
y1C
e
L
Eh
Dh
e
e1
b
2 7
15 10
9
8
1
16
X
D
E
C
B A
terminal 1
index area
AC
C
B
vM
wM
E(1)
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
D(1)
02-10-17
03-01-27
Figure 12. Package outline SOT763-1 (DHVQFN16)
74AVC4TD245 xorms: plastic, extremely thin quad flat package; no leads; % F i 4 44+44 4 \ ' j E ‘77 \ D j ‘ EV ’j'+'E’ ' D j 1 E 7 / HWHH J L Ef© W
Nexperia 74AVC4TD245
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
74AVC4TD245 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 9 June 2017
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References
Outline
version
European
projection Issue date
IEC JEDEC JEITA
SOT1161-1 - - -
- - -
---
sot1161-1_po
09-12-28
09-12-29
Unit(1)
mm
max
nom
min
0.5 0.05
0.00
0.25
0.20
0.15
1.9
1.8
1.7
2.7
2.6
2.5
0.4 1.2
0.45
0.40
0.35
0.1
A
Dimensions
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
XQFN16: plastic, extremely thin quad flat package; no leads;
16 terminals; body 1.80 x 2.60 x 0.50 mm SOT1161-1
A1A3
0.127
b D E e e1
1.2
e2L L1
0.55
0.50
0.45
v w
0.05
y
0.05
y1
0.05
0 1 2 mm
scale
B A
terminal 1
index area
D
E
X
C
y
C
y1
detail X
AA1
A3
terminal 1
index area
b
e2
e1
AC Bv
Cw
L
L1
5 8
16 13
9
12
4
1
e
e
Figure 13. Package outline SOT1161-1 (XQFN16)
74AVC4TD245 Table 17. Abbreviations Table 18. Revision history
Nexperia 74AVC4TD245
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
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Product data sheet Rev. 3 — 9 June 2017
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13 Abbreviations
Table 17. Abbreviations
Acronym Description
CDM Charged Device Model
CMOS Complementary Metal Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
14 Revision history
Table 18. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74AVC4TD245 v.3 20170609 Product data sheet - 74AVC4TD245 v.2
Modifications: The format of this data sheet has been redesigned to comply with the identity guidelines of
Nexperia.
Legal texts have been adapted to the new company name where appropriate.
Type number 74AVC4TD245PW removed.
74AVC4TD245 v.2 20111209 Product data sheet - 74AVC4TD245 v.1
Modifications: Legal pages updated.
74AVC4TD245 v.1 20110503 Product data sheet - -
74AVC4TD245 Ince mis dacumenl was pu mg llwww neggenamm
Nexperia 74AVC4TD245
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
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15 Legal information
15.1 Data sheet status
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product
development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple
devices. The latest product status information is available on the Internet at URL http://www.nexperia.com.
15.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the
relevant full data sheet, which is available on request via the local Nexperia
sales office. In case of any inconsistency or conflict with the short data sheet,
the full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
15.3 Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
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cumulative liability towards customer for the products described herein shall
be limited in accordance with the Terms and conditions of commercial sale of
Nexperia.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Suitability for use — Nexperia products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
systems or equipment, nor in applications where failure or malfunction
of an Nexperia product can reasonably be expected to result in personal
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
such equipment or applications and therefore such inclusion and/or use is at
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Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification. Customers are responsible for the
design and operation of their applications and products using Nexperia
products, and Nexperia accepts no liability for any assistance with
applications or customer product design. It is customer’s sole responsibility
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associated with their applications and products. Nexperia does not accept
any liability related to any default, damage, costs or problem which is based
on any weakness or default in the customer’s applications or products, or
the application or use by customer’s third party customer(s). Customer is
responsible for doing all necessary testing for the customer’s applications
and products using Nexperia products in order to avoid a default of the
applications and the products or of the application or use by customer’s third
party customer(s). Nexperia does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement is
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apply. Nexperia hereby expressly objects to applying the customer’s general
terms and conditions with regard to the purchase of Nexperia products by
customer.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or
the grant, conveyance or implication of any license under any copyrights,
patents or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
74AVC4TD245
Nexperia 74AVC4TD245
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
74AVC4TD245 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 9 June 2017
23 / 24
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified, the
product is not suitable for automotive use. It is neither qualified nor tested in
accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of non-automotive qualified
products in automotive equipment or applications. In the event that customer
uses the product for design-in and use in automotive applications to
automotive specifications and standards, customer (a) shall use the product
without Nexperia's warranty of the product for such automotive applications,
use and specifications, and (b) whenever customer uses the product for
automotive applications beyond Nexperia's specifications such use shall be
solely at customer’s own risk, and (c) customer fully indemnifies Nexperia
for any liability, damages or failed product claims resulting from customer
design and use of the product for automotive applications beyond Nexperia's
standard warranty and Nexperia's product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
15.4 Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
74AVC4TD245
Nexperia 74AVC4TD245
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section 'Legal information'.
© Nexperia B.V. 2017. All rights reserved.
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 9 June 2017
Document identifier: 74AVC4TD245
Contents
1 General description ............................................ 1
2 Features and benefits .........................................1
3 Ordering information .......................................... 2
4 Marking .................................................................2
5 Functional diagram ............................................. 2
6 Pinning information ............................................ 3
6.1 Pinning ............................................................... 3
6.2 Pin description ................................................... 4
7 Functional description ........................................4
8 Limiting values ....................................................5
9 Recommended operating conditions ................ 5
10 Static characteristics .......................................... 6
11 Dynamic characteristics ..................................... 9
11.1 Waveforms and test circuit .............................. 13
11.2 Typical propagation delay characteristics ........ 15
12 Package outline .................................................19
13 Abbreviations .................................................... 21
14 Revision history ................................................ 21
15 Legal information ..............................................22

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