74HC08PW,118 Datasheet by NXP USA Inc.

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Table 1. Ordering information nexpefla
74HC08; 74HCT08
Quad 2-input AND gate
Rev. 7 — 16 April 2020 Product data sheet
1. General description
The 74HC08; 74HCT08 is a quad 2-input AND gate. Inputs include clamp diodes. This enables the
use of current limiting resistors to interface inputs to voltages in excess of VCC.
2. Features and benefits
Complies with JEDEC standard JESD7A
Input levels:
For 74HC08: CMOS level
For 74HCT08: TTL level
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
3. Ordering information
Table 1. Ordering information
PackageType number
Temperature range Name Description Version
74HC08D
74HCT08D
-40 °C to +125 °C SO14 plastic small outline package; 14 leads;
body width 3.9 mm
SOT108-1
74HC08DB
74HCT08DB
-40 °C to +125 °C SSOP14 plastic shrink small outline package; 14 leads;
body width 5.3 mm
SOT337-1
74HC08PW
74HCT08PW
-40 °C to +125 °C TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
74HC08BQ
74HCT08BQ
-40 °C to +125 °C DHVQFN14 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads; 14 terminals;
body 2.5 × 3 × 0.85 mm
SOT762-1
74HC08; 74HCT08 1o 13 mn5222 11 mn5223 D? mmg22! 74HC03 flflflflflflfl o n UUUULIUU pas-004035 “MODE 3 U L3) E E E 3 a 3 GND @ 3 E R Q Transparem |op View Table 2. Pin description
Nexperia 74HC08; 74HCT08
Quad 2-input AND gate
4. Functional diagram
mna222
1A
1B 1Y
2
13
2A
2B 2Y
5
46
3A
3B 3Y
10
98
4A
4B 4Y
13
12 11
Fig. 1. Logic symbol
mna223
3
&
&
&
&
2
1
6
5
4
8
10
9
11
13
12
Fig. 2. IEC logic symbol
mna221
A
B
Y
Fig. 3. IEC logic symbol
5. Pinning information
5.1. Pinning
1A VCC
1B 4B
1Y 4A
2A 4Y
2B 3B
2Y 3A
GND 3Y
1
2
3
4
5
6
7 8
10
9
12
11
14
13
74HC08
74HCT08
aaa-004035
Fig. 4. Pin configuration SOT108-1 (SO14), SOT337-1
(SSOP14) and SOT402-1 (TSSOP14)
GND(1)
Transparent top view
2Y 3A
2B 3B
2A 4Y
1Y 4A
1B 4B
G
N
D
3
Y
1
A
V
C
C
6 9
5 10
4 11
3 12
2 13
7
8
1
1
4
(1) This is not a ground pin. There is no electrical or
mechanical requirement to solder the pad. In case
soldered, the solder land should remain floating or
connected to GND.
Fig. 5. Pin configuration SOT762-1 (DHVQFN14)
5.2. Pin description
Table 2. Pin description
Symbol Pin Description
1A, 2A, 3A, 4A 1, 4, 9, 12 data input
1B, 2B, 3B, 4B 2, 5, 10, 13 data input
1Y, 2Y, 3Y, 4Y 3, 6, 8, 11 data output
GND 7 ground (0 V)
VCC 14 supply voltage
74HC_HCT08 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved
Product data sheet Rev. 7 — 16 April 2020 2 / 14
74HC08; 74HCT08
Nexperia 74HC08; 74HCT08
Quad 2-input AND gate
6. Functional description
Table 3. Function table
H = HIGH voltage level; L = LOW voltage level; X = don’t care.
Input Output
nA nB nY
LLL
L H L
H L L
HHH
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage -0.5 +7 V
IIK input clamping current VI < -0.5 V or VI > VCC + 0.5 V [1] - ±20 mA
IOK output clamping current VO < -0.5 V or VO > VCC + 0.5 V [1] - ±20 mA
IOoutput current -0.5 V < VO < VCC + 0.5 V - ±25 mA
ICC supply current - 50 mA
IGND ground current -50 - mA
Tstg storage temperature -65 +150 °C
Ptot total power dissipation Tamb = -40 to +85 °C [2] - 500 mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SOT108-1 (SO14) package: Ptot derates linearly with 10.1 mW/K above 100 °C.
For SOT337-1 (SSOP14) package: Ptot derates linearly with 7.3 mW/K above 81 °C.
For SOT402-1 (TSSOP14) package: Ptot derates linearly with 7.3 mW/K above 81 °C.
For SOT762-1 (DHVQFN14) package: Ptot derates linearly with 9.6 mW/K above 98 °C.
8. Recommended operating conditions
Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V)
74HC08 74HCT08Symbol Parameter Conditions
Min Typ Max Min Typ Max
Unit
VCC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V
VIinput voltage 0 - VCC 0 - VCC V
VOoutput voltage 0 - VCC 0 - VCC V
Tamb ambient temperature -40 - +125 -40 - +125 °C
VCC = 2.0 V - - 625 - - - ns/V
VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V
Δt/ΔV input transition rise and fall rate
VCC = 6.0 V - - 83 - - - ns/V
74HC_HCT08 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved
Product data sheet Rev. 7 — 16 April 2020 3 / 14
74HC08; 74HCT08
Nexperia 74HC08; 74HCT08
Quad 2-input AND gate
9. Static characteristics
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
25 °C -40 °C to
+85 °C
-40 °C to
+125 °C
Symbol Parameter Conditions
Min Typ Max Min Max Min Max
Unit
74HC08
VCC = 2.0 V 1.5 1.2 - 1.5 - 1.5 - V
VCC = 4.5 V 3.15 2.4 - 3.15 - 3.15 - V
VIH HIGH-level
input voltage
VCC = 6.0 V 4.2 3.2 - 4.2 - 4.2 - V
VCC = 2.0 V - 0.8 0.5 - 0.5 - 0.5 V
VCC = 4.5 V - 2.1 1.35 - 1.35 - 1.35 V
VIL LOW-level
input voltage
VCC = 6.0 V - 2.8 1.8 - 1.8 - 1.8 V
VI = VIH or VIL
IO = -20 μA; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V
IO = -20 μA; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V
IO = -20 μA; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V
IO = -4.0 mA; VCC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V
VOH HIGH-level
output voltage
IO = -5.2 mA; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V
VI = VIH or VIL
IO = 20 μA; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V
IO = 20 μA; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V
IO = 20 μA; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V
IO = 4.0 mA; VCC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V
VOL LOW-level
output voltage
IO = 5.2 mA; VCC = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V
IIinput leakage
current
VI = VCC or GND; VCC = 6.0 V - - ±0.1 - ±1 - ±1 μA
ICC supply current VI = VCC or GND; IO = 0 A;
VCC = 6.0 V
- - 2.0 - 20 - 40 μA
CIinput
capacitance
- 3.5 - - - - - pF
74HC_HCT08 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved
Product data sheet Rev. 7 — 16 April 2020 4 / 14
74HC08; 74HCT08
Nexperia 74HC08; 74HCT08
Quad 2-input AND gate
25 °C -40 °C to
+85 °C
-40 °C to
+125 °C
Symbol Parameter Conditions
Min Typ Max Min Max Min Max
Unit
74HCT08
VIH HIGH-level
input voltage
VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - 2.0 - V
VIL LOW-level
input voltage
VCC = 4.5 V to 5.5 V - 1.2 0.8 - 0.8 - 0.8 V
VI = VIH or VIL; VCC = 4.5 V
IO = -20 μA 4.4 4.5 - 4.4 - 4.4 - V
VOH HIGH-level
output voltage
IO = -4.0 mA 3.98 4.32 - 3.84 - 3.7 - V
VI = VIH or VIL; VCC = 4.5 V
IO = 20 μA - 0 0.1 - 0.1 - 0.1 V
VOL LOW-level
output voltage
IO = 5.2 mA - 0.15 0.26 - 0.33 - 0.4 V
IIinput leakage
current
VI = VCC or GND; VCC = 5.5 V - - ±0.1 - ±1 - ±1 μA
ICC supply current VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
- - 2.0 - 20 - 40 μA
ΔICC additional
supply current
per input pin;
VI = VCC - 2.1 V; IO = 0 A;
other inputs at VCC or GND;
VCC = 4.5 V to 5.5 V
- 60 216 - 270 - 294 μA
CIinput
capacitance
- 3.5 - - - - - pF
10. Dynamic characteristics
Table 7. Dynamic characteristics
GND = 0 V; CL = 50 pF; for test circuit see Fig. 7.
25 °C -40 °C to
+85 °C
-40 °C to
+125 °C
Symbol Parameter Conditions
Min Typ Max Min Max Min Max
Unit
74HC08
nA, nB to nY; see Fig. 6 [1]
VCC = 2.0 V - 25 90 - 115 - 135 ns
VCC = 4.5 V - 9 18 - 23 - 27 ns
VCC = 5.0 V; CL = 15 pF - 7 - - - - - ns
tpd propagation
delay
VCC = 6.0 V - 7 15 - 20 - 23 ns
see Fig. 6 [2]
VCC = 2.0 V - 19 75 - 95 - 110 ns
VCC = 4.5 V - 7 15 - 19 - 22 ns
tttransition time
VCC = 6.0 V - 6 13 - 16 - 19 ns
CPD power
dissipation
capacitance
per package;
VI = GND to VCC
[3] - 10 - - - - - pF
74HC_HCT08 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved
Product data sheet Rev. 7 — 16 April 2020 5 / 14
74HC08; 74HCT08 e Fig. 6 sag—own Table 8. Measurement points
Nexperia 74HC08; 74HCT08
Quad 2-input AND gate
25 °C -40 °C to
+85 °C
-40 °C to
+125 °C
Symbol Parameter Conditions
Min Typ Max Min Max Min Max
Unit
74HCT08
nA, nB to nY; see Fig. 6 [1]
VCC = 4.5 V - 14 24 - 30 - 36 ns
tpd propagation
delay
VCC = 5.0 V; CL = 15 pF - 11 - - - - - ns
tttransition time VCC = 4.5 V; see Fig. 6 [2] - 7 15 - 19 - 22 ns
CPD power
dissipation
capacitance
per package;
VI = GND to VCC - 1.5 V
[3] - 20 - - - - - pF
[1] tpd is the same as tPHL and tPLH.
[2] tt is the same as tTHL and tTLH.
[3] CPD is used to determine the dynamic power dissipation (PD in μW):
PD = CPD × VCC
2 × fi × N + ∑ (CL × VCC
2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑ (CL × VCC
2 × fo) = sum of outputs.
10.1. Waveforms and test circuit
GND
VOH
VOL
nY output
aaa-004037
VI
tPHL
tTHL tTLH
tPLH
VY
VM
VM
VX
nA, nB input
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig. 6. Input to output propagation delays
Table 8. Measurement points
Input OutputType
VMVMVXVY
74HC08 0.5VCC 0.5VCC 0.1VCC 0.9VCC
74HCT08 1.3 V 1.3 V 0.1VCC 0.9VCC
74HC_HCT08 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved
Product data sheet Rev. 7 — 16 April 2020 6 / 14
74HC08; 74HCT08 M ff $$ ff Table 9 Table 9. Test data
Nexperia 74HC08; 74HCT08
Quad 2-input AND gate
001aah768
tW
tW
tr
tr
tf
VM
VI
negative
pulse
GND
VI
positive
pulse
GND
10 %
90 %
90 %
10 %
VMVM
VM
tf
VCC
DUT
RT
VIVO
CL
G
Test data is given in Table 9.
Definitions test circuit:
RT = termination resistance should be equal to output impedance Zo of the pulse generator.
CL = load capacitance including jig and probe capacitance.
Fig. 7. Test circuit for measuring switching times
Table 9. Test data
Input LoadType
VItr, tfCL
Test
74HC08 VCC 6.0 ns 15 pF, 50 pF tPLH, tPHL
74HCT08 3.0 V 6.0 ns 15 pF, 50 pF tPLH, tPHL
74HC_HCT08 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved
Product data sheet Rev. 7 — 16 April 2020 7 / 14
74HC08; 74HCT08 SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 ‘ Cl l } / "\\} l m *m / I. l ‘ \ / ‘ ‘7 E-I
Nexperia 74HC08; 74HCT08
Quad 2-input AND gate
11. Package outline
UNIT A
max. A
1 A
2 A
3 b
p c D
(1) E
(1) (1)
e H
E L L
p Q Z y w v θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm
inches
1.75 0.25
0.10
1.45
1.25 0.25 0.49
0.36
0.25
0.19
8.75
8.55
4.0
3.8 1.27 6.2
5.8
0.7
0.6
0.7
0.3 8
0
o
o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
1.0
0.4
SOT108-1
X
w M
θ
A
A
1
A
2
b
p
D
H
E
L
p
Q
detail X
E
Z
e
c
L
v M A
(A )
3
A
7
8
1
14
y
076E06 MS-012
pin 1 index
0.069 0.010
0.004
0.057
0.049 0.01 0.019
0.014
0.0100
0.0075
0.35
0.34
0.16
0.15 0.05
1.05
0.041
0.244
0.228
0.028
0.024
0.028
0.012
0.01
0.25
0.01 0.004
0.039
0.016
99-12-27
03-02-19
0 2.5 5 mm
scale
SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
Fig. 8. Package outline SOT108-1 (SO14)
74HC_HCT08 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved
Product data sheet Rev. 7 — 16 April 2020 8 / 14
74HC08; 74HCT08 SSOP14: plastic shrink small outline package; 14 leads; body width 53 mm SOT337-1
Nexperia 74HC08; 74HCT08
Quad 2-input AND gate
UNIT A
1 A
2 A
3 b
p c D
(1) E
(1) e H
E L L
p Q Z y w v θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.21
0.05
1.80
1.65 0.25 0.38
0.25
0.20
0.09
6.4
6.0
5.4
5.2 0.65 1.25 0.2
7.9
7.6
1.03
0.63
0.9
0.7
1.4
0.9
8
0
o
o
0.13 0.1
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
SOT337-1 99-12-27
03-02-19
(1)
w M
b
p
D
H
E
E
Z
e
c
v M A
X
A
y
1 7
14 8
θ
A
A
1
A
2
L
p
Q
detail X
L
(A )
3
MO-150
pin 1 index
0 2.5 5 mm
scale
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1
A
max.
2
Fig. 9. Package outline SOT337-1 (SSOP14)
74HC_HCT08 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved
Product data sheet Rev. 7 — 16 April 2020 9 / 14
74HC08; 74HCT08 TSSOP14: plastic lhin shrink small outline package; 14 leads; body width 44 mm l ‘7 4. ‘\/|:‘ aim *fcf ; l 11 ll “<7 \‘//eei="" ’l="" llhhplhhh="" *="" l="" l="" l="" fl="" l="" l="" l="" a="" 0/="" l="" l+="" +="" +="" +7“="" h="" whhh="" kl”="" ,d="" ,ll="" e©="" 43942—3="">
Nexperia 74HC08; 74HCT08
Quad 2-input AND gate
UNIT A
1 A
2 A
3 b
p c D
(1) E (2) (1)
e H
E L L
p Q Z y w v θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3 0.65 6.6
6.2
0.4
0.3
0.72
0.38
8
0
o
o
0.13 0.1 0.2 1
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
0.75
0.50
SOT402-1 MO-153 99-12-27
03-02-18
w M
b
p
D
Z
e
0.25
1 7
14 8
θ
A
A
1
A
2
L
p
Q
detail X
L
(A )
3
H
E
E
c
v M A
X
A
y
0 2.5 5 mm
scale
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1
A
max.
1.1
pin 1 index
Fig. 10. Package outline SOT402-1 (TSSOP14)
74HC_HCT08 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved
Product data sheet Rev. 7 — 16 April 2020 10 / 14
74HC08; 74HCT08 DHVQFNM: plastic dual in-lina compatible thermal enhanced very min quad flat package; no leads; \ w \ l I 7 iiiiii Liv l%)£1£:: InaH D PEI area *D,“ j Z gen‘s‘ ‘ I \ fgu LU LP U ,4 J Qiiripri‘im ,,,,g l 3 1 :j / \\ W] H m n C U 2 4 505‘s g© 4594—1;
Nexperia 74HC08; 74HCT08
Quad 2-input AND gate
References
Outline
version
European
projection Issue date
IEC JEDEC JEITA
SOT762-1 MO-241
sot762-1_po
15-04-10
15-05-05
Unit
mm
max
nom
min
1 0.05 3.1 1.65 2.6
0.5 2 0.4
A(1)
Dimensions (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
14 terminals; body 2.5 x 3 x 0.85 mm SOT762-1
A1b
0.30
c D(1) DhE(1) Eh
1.00
e e1k
k
L v
0.1
w y
0.02 0.2 3.0 1.50 2.5 0.10.25 0.05 0.05
y1
0.30.85 0.20.00 2.9 1.35 2.40.18
0.51.15
0 4 mm2
scale
terminal 1
index area
AA1
c
L
Eh
Dh
k
b
2 6
13 9
8
7
1
14
D
E
terminal 1
index area
e1
e
e
C
y
C
y1
AC B
v
C
w
detail X
AB
X
Fig. 11. Package outline SOT762-1 (DHVQFN14)
74HC_HCT08 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved
Product data sheet Rev. 7 — 16 April 2020 11 / 14
74HC08; 74HCT08 Table 10. Abbreviations Table 4
Nexperia 74HC08; 74HCT08
Quad 2-input AND gate
12. Abbreviations
Table 10. Abbreviations
Acronym Description
CMOS Complementary Metal-Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
TTL Transistor-Transistor Logic
13. Revision history
Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74HC_HCT08 v.7 20200416 Product data sheet - 74HC_HCT08 v.6
Modifications: Table 4: Derating values for Ptot total power dissipation updated.
74HC_HCT08 v.6 20170613 Product data sheet - 74HC_HCT08 v.5
Modifications: The format of this data sheet has been redesigned to comply with the identity
guidelines of Nexperia.
Legal texts have been adapted to the new company name where appropriate.
74HC_HCT08 v.5 20151130 Product data sheet - 74HC_HCT08 v.4
Modifications: Type numbers 74HC08N and 74HCT08N (SOT27-1) removed.
74HC_HCT08 v.4 20120906 Product data sheet - 74HC_HCT08 v.3
Modifications: The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
Legal texts have been adapted to the new company name where appropriate.
74HC_HCT08 v.3 20030725 Product specification - 74HC_HCT08_CNV v.2
74HC_HCT08_CNV v.2 19970826 Product specification - -
74HC_HCT08 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved
Product data sheet Rev. 7 — 16 April 2020 12 / 14
74HC08; 74HCT08 same In a deswgn on new sheet’ .5 exp‘amed in status of dewoem described 2 «ms documenl was publish es. The latest produd slam hugs waw nexg mm sale 7 Max us or eon ns Mcomme m me genera‘ ierm and can m llwww nex er
Nexperia 74HC08; 74HCT08
Quad 2-input AND gate
14. Legal information
Data sheet status
Document status
[1][2]
Product
status [3]
Definition
Objective [short]
data sheet
Development This document contains data from
the objective specification for
product development.
Preliminary [short]
data sheet
Qualification This document contains data from
the preliminary specification.
Product [short]
data sheet
Production This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
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Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
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accepts no liability for inclusion and/or use of non-automotive qualified
products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards,
customer (a) shall use the product without Nexperia’s warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
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Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
74HC_HCT08 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved
Product data sheet Rev. 7 — 16 April 2020 13 / 14
74HC08; 74HCT08
Nexperia 74HC08; 74HCT08
Quad 2-input AND gate
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Ordering information....................................................1
4. Functional diagram.......................................................2
5. Pinning information......................................................2
5.1. Pinning.........................................................................2
5.2. Pin description............................................................. 2
6. Functional description................................................. 3
7. Limiting values............................................................. 3
8. Recommended operating conditions..........................3
9. Static characteristics....................................................4
10. Dynamic characteristics............................................ 5
10.1. Waveforms and test circuit........................................ 6
11. Package outline.......................................................... 8
12. Abbreviations............................................................ 12
13. Revision history........................................................12
14. Legal information......................................................13
© Nexperia B.V. 2020. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 16 April 2020
74HC_HCT08 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved
Product data sheet Rev. 7 — 16 April 2020 14 / 14

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