VNx7NV04(-1) Datasheet by STMicroelectronics

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September 2013 Doc ID 7383 Rev 4 1/37
1
VNN7NV04, VNS7NV04
VND7NV04, VND7NV04-1
OMNIFET II
fully autoprotected Power MOSFET
Features
Linear current limitation
Thermal shutdown
Short circuit protection
Integrated clamp
Low current drawn from input pin
Diagnostic feedback through input pin
ESD protection
Direct access to the gate of the Power
MOSFET (analog driving)
Compatible with standard Power MOSFET in
compliance with the 2002/95/EC European
Directive
Description
The VNN7NV04, VNS7NV04, VND7NV04
VND7NV04-1, are monolithic devices designed in
STMicroelectronics VIPower M0-3 Technology,
intended for replacement of standard Power
MOSFETs from DC up to 50 kHz applications.
Built in thermal shutdown, linear current limitation
and overvoltage clamp protect the chip in harsh
environments.
Fault feedback can be detected by monitoring the
voltage at the input pin.
Type R
DS(on)
I
lim
V
clamp
VNN7NV04
VNS7NV04
VND7NV04
VND7NV04-1
60 mΩ6A 40V
SOT-223 SO-8
TO251 (IPAK)
12
2
3
1
3
3
2
1
TO252 (DPAK)
Table 1. Device summary
Package Order codes
Tube Tube (lead-free) Tape and reel Tape and reel (lead-free)
SOT-223 VNN7NV04 - VNN7NV0413TR -
SO-8 VNS7NV04 - VNS7NV0413TR -
TO-252 VND7NV04 VND7NV04-E VND7NV0413TR VND7NV04TR-E
TO-251 VND7NV04-1 VND7NV04-1-E - -
www.st.com
Contents VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
2/37 Doc ID 7383 Rev 4
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3 Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.2 SO-8 maximum demagnetization energy . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.3 DPAK maximum demagnetization energy . . . . . . . . . . . . . . . . . . . . . . . . 18
3.4 SOT-223 maximum demagnetization energy . . . . . . . . . . . . . . . . . . . . . . 19
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.1 SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.2 SOT-223 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.3 DPAK thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.1 TO-251 (IPAK) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.2 TO-252 (DPAK) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
5.3 SOT-223 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.4 SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5.5 SOT-223 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.6 SO-8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
5.7 DPAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
5.8 IPAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 List of tables
Doc ID 7383 Rev 4 3/37
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 3. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 4. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 5. SO-8 thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 6. SOT-223 thermal parameter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 7. DPAK thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 8. TO-251 (IPAK) mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 9. TO-252 (DPAK) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 10. SOT-223 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 11. SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 12. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
List of figures VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
4/37 Doc ID 7383 Rev 4
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Switching time test circuit for resistive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 5. Test circuit for diode recovery times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 6. Unclamped inductive load test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 7. Input charge test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 8. Unclamped inductive waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 9. Derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 10. Transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 11. Static drain-source on resistance vs input voltage (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 12. Static drain-source on resistance vs input voltage (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 13. Source-drain diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 14. Static drain source on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 15. Turn-on current slope (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 16. Turn-on current slope (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 17. Transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 18. Static drain-source on resistance vs Id. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 19. Input voltage vs input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 20. Turn-off drain source voltage slope (part 1/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 21. Turn-off drain source voltage slope (part 2/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 22. Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 23. Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 24. Normalized on resistance vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 25. Switching time resistive load (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 26. Switching time resistive load (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 27. Normalized input threshold voltage vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 28. Normalized current limit vs junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 29. Step response current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 30. SO-8 maximum turn-off current versus load inductance. . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 31. SO-8 demagnetization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 32. DPAK maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 33. DPAK demagnetization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 34. SOT-223 maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 35. SOT-223 demagnetization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 36. SO-8 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 37. Rthj-amb vs PCB copper area in open box free air condition. . . . . . . . . . . . . . . . . . . . . . . 20
Figure 38. SO-8 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 39. Thermal fitting model of an OMNIFET II in SO-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 40. SOT-223 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 41. Rthj-amb vs PCB copper area in open box free air condition. . . . . . . . . . . . . . . . . . . . . . . 22
Figure 42. SOT-223 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 43. Thermal fitting model of an OMNIFET II in SOT-223 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 44. DPAK PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 45. Rthj-amb vs PCB copper area in open box free air condition. . . . . . . . . . . . . . . . . . . . . . . 24
Figure 46. DPAK thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 47. Thermal fitting model of an OMNIFET II in DPAK. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 48. TO-251 (IPAK) package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 List of figures
Doc ID 7383 Rev 4 5/37
Figure 49. TO-252 (DPAK) package dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 50. SOT-223 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 51. SO-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 52. SOT-223 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 53. SO-8 tube shipment (no suffix). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 54. SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 55. DPAK footprint and tube shipment (no suffix). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 56. DPAK tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 57. IPAK tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Block diagram and pin description VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
6/37 Doc ID 7383 Rev 4
1 Block diagram and pin description
Figure 1. Block diagram
Figure 2. Configuration diagram (top view)
1. For the pins configuration related to SOT-223, DPAK, IPAK see outlines at page 1.
Overvoltage
Gate
Linear
DRAIN
SOURCE
Clamp
1
2
3
Current
Limiter
Control
Over
Temperature
INPUT
FC01000
SO-8 Package
(1)
DRAIN
DRAIN
DRAIN
DRAIN
INPUT
SOURCE
SOURCE
SOURCE
1
45
8
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 Electrical specifications
Doc ID 7383 Rev 4 7/37
2 Electrical specifications
Figure 3. Current and voltage conventions
2.1 Absolute maximum ratings
DRAIN
INPUT
SOURCE
I
D
I
IN
V
IN
V
DS
R
IN
Table 2. Absolute maximum ratings
Symbol Parameter Value Unit
SOT-223 SO-8 DPAK/IPAK
V
DS
Drain-source voltage (V
IN
=0 V) Internally clamped V
V
IN
Input voltage Internally clamped V
I
IN
Input current +/-20 mA
R
IN MIN
Minimum input series impedance 150 Ω
I
D
Drain current Internally limited A
I
R
Reverse DC output current -10.5 A
V
ESD1
Electrostatic discharge (R=1.5 KΩ,
C=100 pF) 4000 V
V
ESD2
Electrostatic discharge on output pin
only (R=330 Ω, C=150 pF) 16500 V
P
tot
Total dissipation at T
c
=25 °C 7 4.6 60 W
E
MAX
Maximum switching energy
(L=0.7 mH; R
L
=0 Ω; V
bat
=13.5 V;
T
jstart
=150 ºC; I
L
=9 A) 40 40 mJ
E
MAX
Maximum switching energy
(L=0.6 mH; R
L
=0 Ω; V
bat
=13.5 V;
T
jstart
=150 ºC; I
L
=9 A) 37 mJ
T
j
Operating junction temperature Internally limited °C
T
c
Case operating temperature Internally limited °C
T
stg
Storage temperature -55 to 150 °C
Electrical specifications VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
8/37 Doc ID 7383 Rev 4
2.2 Thermal data
2.3 Electrical characteristics
-40 °C < T
j
< 150 °C, unless otherwise specified.
Table 3. Thermal data
Symbol Parameter Value Unit
SOT-223 SO-8 DPAK IPAK
R
thj-case
Thermal resistance junction-case max 18 2.1 2.1 °C/W
R
thj-lead
Thermal resistance junction-lead max 27 °C/W
R
thj-amb
Thermal resistance junction-ambient max 96
(1)
90
(1)
65
(1)
102 °C/W
1. When mounted on a standard single-sided FR4 board with 0.5 mm
2
of Cu (at least 35 µm thick) connected to all DRAIN
pins.
Table 4. Electrical characteristics
Symbol Parameter Test conditions Min Typ Max Unit
Off
V
CLAMP
Drain-source clamp
voltage V
IN
=0 V; I
D
=3.5 A 40 45 55 V
V
CLTH
Drain-source clamp
threshold voltage V
IN
=0 V; I
D
=2 mA 36 V
V
INTH
Input threshold voltage V
DS
=V
IN
; I
D
=1 mA 0.5 2.5 V
I
ISS
Supply current from input
pin V
DS
=0 V; V
IN
=5 V 100 150 µA
V
INCL
Input-source clamp
voltage
I
IN
=1 mA
I
IN
=-1 mA
6
-1.0
6.8 8
-0.3 V
I
DSS
Zero input voltage drain
current (V
IN
=0 V)
V
DS
=13 V; V
IN
=0 V; T
j
=25 °C
V
DS
=25 V; V
IN
=0 V
30
75 µA
On
R
DS(on)
Static drain-source on
resistance
V
IN
=5 V; I
D
=3.5 A; T
j
=25 °C
V
IN
=5 V; I
D
=3.5 A
60
120 mΩ
Dynamic (T
j
=25 °C, unless otherwise specified)
g
fs
(1)
Forward
transconductance V
DD
=13 V; I
D
=3.5 A 9 S
C
OSS
Output capacitance V
DS
=13 V; f=1 MHz; V
IN
=0 V 220 pF
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 Electrical specifications
Doc ID 7383 Rev 4 9/37
Switching
(T
j
=25 °C, unless otherwise specified)
t
d(on)
Turn-on delay time
V
DD
=15 V; I
D
=3.5 A
V
gen
=5 V; R
gen
=R
IN MIN
=150 Ω
(see figure Figure 4.)
100 300 ns
t
r
Rise time 470 1500 ns
t
d(off)
Turn-off delay time 500 1500 ns
t
f
Fall time 350 1000 ns
t
d(on)
Turn-on delay time
V
DD
=15 V; I
D
=3.5 A
V
gen
=5 V; R
gen
=2.2 KΩ
(see figure Figure 4.)
0.75 2.3 µs
t
r
Rise time 4.6 14.0 µs
t
d(off)
Turn-off delay time 5.4 16.0 µs
t
f
Fall time 3.6 11.0 µs
(dI/dt)
on
Turn-on current slope V
DD
=15 V; I
D
=3.5 A
V
gen
=5 V; R
gen
=R
IN MIN
=150 Ω6.5 A/µs
Q
i
Total input charge V
DD
=12 V; I
D
=3.5 A; V
IN
=5 V
I
gen
=2.13 mA (see figure Figure 7.)18 nC
Source drain diode (T
j
=25 °C, unless otherwise specified)
V
SD(1)
Forward on voltage I
SD
=3.5 A; V
IN
=0 V 0.8 V
t
rr
Reverse recovery time I
SD
=3.5 A; dI/dt=20 A/µs
V
DD
=30V; L=20H
(see test circuit, figure Figure 5.)
220 ns
Q
rr
Reverse recovery charge 0.28 µC
I
RRM
Reverse recovery current 2.5 A
Protections (-40 °C < T
j
< 150 °C, unless otherwise specified)
I
lim
Drain current limit V
IN
=5 V; V
DS
=13 V 6 9 12 A
t
dlim
Step response current
limit V
IN
=5 V; V
DS
=13 V 4.0 µs
T
jsh
Over temperature
shutdown 150 175 200 °C
T
jrs
Over temperature reset 135 °C
I
gf
Fault sink current V
IN
=5 V; V
DS
=13 V; T
j
=T
jsh
15 mA
E
as
Single pulse avalanche
energy
starting T
j
=25 °C; V
DD
=24 V
V
IN
=5 V R
gen
=R
IN MIN
=150 Ω; L=24 mH
(see figures Figure 6. & Figure 8.)
200 mJ
1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
Table 4. Electrical characteristics (continued)
Symbol Parameter Test conditions Min Typ Max Unit
Protection features VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
10/37 Doc ID 7383 Rev 4
3 Protection features
During normal operation, the input pin is electrically connected to the gate of the internal
Power MOSFET through a low impedance path.
The device then behaves like a standard Power MOSFET and can be used as a switch from
DC up to 50 kHz. The only difference from the user’s standpoint is that a small DC current
I
ISS
(typ. 100µA) flows into the input pin in order to supply the internal circuitry.
The device integrates:
Overvoltage clamp protection: internally set at 45 V, along with the rugged avalanche
characteristics of the Power MOSFET stage give this device unrivalled ruggedness and
energy handling capability. This feature is mainly important when driving inductive
loads.
Linear current limiter circuit: limits the drain current I
D
to I
lim
whatever the input pin
voltages. When the current limiter is active, the device operates in the linear region, so
power dissipation may exceed the capability of the heatsink. Both case and junction
temperatures increase, and if this phase lasts long enough, junction temperature may
reach the over temperature threshold T
jsh
.
Over temperature and short circuit protection: these are based on sensing the chip
temperature and are not dependent on the input voltage. The location of the sensing
element on the chip in the power stage area ensures fast, accurate detection of the
junction temperature. Over temperature cutout occurs in the range 150 to 190 °C, a
typical value being 170 °C. The device is automatically restarted when the chip
temperature falls of about 15 °C below shutdown temperature.
Status feedback: in the case of an over temperature fault condition (T
j
> T
jsh
), the
device tries to sink a diagnostic current I
gf
through the input pin in order to indicate fault
condition. If driven from a low impedance source, this current may be used in order to
warn the control circuit of a device shutdown. If the drive impedance is high enough so
that the input pin driver is not able to supply the current I
gf
, the input pin will fall to 0 V.
This will not however affect the device operation: no requirement is put on the current
capability of the input pin driver except to be able to supply the normal operation drive
current I
ISS
.
Additional features of this device are ESD protection according to the Human Body model
and the ability to be driven from a TTL logic circuit.
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 Protection features
Doc ID 7383 Rev 4 11/37
Figure 4. Switching time test circuit for resistive load
Figure 5. Test circuit for diode recovery times
t
I
D
90%
10%
t
V
gen
t
d(on)
t
d(off)
t
f
t
r
L=100uH
A
B
8.5
Ω
V
DD
R
gen
FAST
DIODE
OMNIFET
A
D
I
S
150
Ω
B
OMNIFET
D
S
I
V
gen
,fli ELK m. L J W; 1 mm; mm A V‘ $201572
Protection features VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
12/37 Doc ID 7383 Rev 4
Figure 6. Unclamped inductive load test
circuits Figure 7. Input charge test circuit
Figure 8. Unclamped inductive waveforms
R
GEN
P
W
V
IN
V
IN
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 Protection features
Doc ID 7383 Rev 4 13/37
3.1 Electrical characteristics curves
Figure 9. Derating curve Figure 10. Transconductance
Figure 11. Static drain-source on resistance
vs input voltage (part 1/2) Figure 12. Static drain-source on resistance
vs input voltage (part 2/2)
Figure 13. Source-drain diode forward
characteristics Figure 14. Static drain source on resistance
012345678
Id(A)
0
2
4
6
8
10
12
14
16
18
20
Gfs (S)
Vds=13V
Tj=25ºC
Tj=150ºC
Tj=-40ºC
3 3.5 4 4.5 5 5.5 6 6.5
Vin(V)
0
20
40
60
80
100
120
140
Rds(on) (mOhm)
Id=6A
Id=1A
Id=6A
Id=1A
Id=6A
Id=1A
Tj=25ºC
Tj=150ºC
Tj=-40ºC
0 2 4 6 8 101214
Id(A)
500
550
600
650
700
750
800
850
900
950
1000
Vsd (mV)
Vin=0V
0123456
Id(A)
0
25
50
75
100
125
150
Rds(on) (mohms)
Tj=25ºC
Tj=150ºC
Tj=-40ºC
Vin=5V
vmv) mm nnmm mum/us, Rgmhm)
Protection features VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
14/37 Doc ID 7383 Rev 4
Figure 15. Turn-on current slope (part 1/2) Figure 16. Turn-on current slope (part 2/2)
Figure 17. Transfer characteristics Figure 18. Static drain-source on resistance
vs Id
Figure 19. Input voltage vs input charge Figure 20. Turn-off drain source voltage slope
(part 1/2)
100 200 300 400 500 600 700 800 900 1000 1100
Rg(ohm)
0.25
0.5
0.75
1
1.25
1.5
1.75
2
2.25
di/dt(A/us)
Vin=3.5V
Vdd=15V
Id=3.5A
100 200 300 400 500 600 700 800 900 1000 1100
Rg(ohm)
0
1
2
3
4
5
6
7
8
di/dt(A/us)
Vin=5V
Vdd=15V
Id=3.5A
1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
Vin(V)
0
1
2
3
4
5
6
7
8
9
10
Idon(A)
Vds=13.5V
Tj=150ºC
Tj=25ºC
Tj=-40ºC
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6
Id(A)
0
20
40
60
80
100
120
140
Rds(on) (mOhm)
Tj=25ºC
Tj=150ºC
Tj=-40ºC
Vin=5V
Vin=3.5V
Vin=5V
Vin=5V
Vin=3.5V
Vin=3.5V
0 5 10 15 20 25
Qg(nC)
0
1
2
3
4
5
6
7
8
Vin(V)
Vds=12V
Id=3.5A
100 200 300 400 500 600 700 800 900 1000 1100
Rg(ohm)
0
50
100
150
200
250
300
dv/dt(V/us)
Vin=5V
Vdd=15V
Id=3.5A
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 Protection features
Doc ID 7383 Rev 4 15/37
Figure 21. Turn-off drain source voltage slope
(part 2/2) Figure 22. Capacitance variations
Figure 23. Output characteristics Figure 24. Normalized on resistance vs
temperature
v
Figure 25. Switching time resistive load (part
1/2) Figure 26. Switching time resistive load (part
2/2)
100 200 300 400 500 600 700 800 900 1000 1100
Rg(ohm)
0
50
100
150
200
250
300
dv/dt(v/us)
Vin=3.5V
Vdd=15V
Id=3.5A
0 5 10 15 20 25 30 35
Vds(V)
100
200
300
400
500
600
C(pF)
f=1MHz
Vin=0V
012345678910111213
VDS(V)
0
1
2
3
4
5
6
7
8
9
10
11
12
ID(A)
Vin=2.5V
Vin=4V
Vin=4.5V
Vin=3V
Vin=2V
Vin=5V
-50 -25 0 25 50 75 100 125 150 175
T(ºC)
0.5
0.75
1
1.25
1.5
1.75
2
2.25
Rds(on)
Vin=5V
Id=3.5A
0250 500 750 1000 1250 1500 1750 2000 2250 2500
Rg(ohm)
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
t(us)
td(on)
tf
td(off)
tr
Vdd=15V
Id=3.5A
Vin=5V
3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25
Vin(V)
0
200
400
600
800
1000
1200
1400
1600
t(ns)
tf
tr
td(on)
td(off)
Vdd=15V
Id=3.5A
Rg=150ohm
Protection features VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
16/37 Doc ID 7383 Rev 4
Figure 27. Normalized input threshold voltage
vs temperature Figure 28. Normalized current limit vs junction
temperature
Figure 29. Step response current limit
-50 -25 0 25 50 75 100 125 150 175
T(ºC)
0.7
0.75
0.8
0.85
0.9
0.95
1
1.05
1.1
1.15
Vin(th)
Vds=Vin
Id=1mA
-50 -25 0 25 50 75 100 125 150 175
Tj (ºC)
5
6
7
8
9
10
11
12
13
14
15
Ilim (A)
Vds=13V
Vin=5V
5 101520253035
Vdd(V)
3.5
4
4.5
5
5.5
6
6.5
7
Tdlim(us)
Vin=5V
Rg=150ohm
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 Protection features
Doc ID 7383 Rev 4 17/37
3.2 SO-8 maximum demagnetization energy
Figure 30. SO-8 maximum turn-off current versus load inductance
Legend
A = Single Pulse at T
Jstart
=150 °C
B = Repetitive pulse at T
Jstart
=100 °C
C = Repetitive Pulse at T
Jstart
=125 °C
Conditions:
V
CC
=13.5 V
Values are generated with R
L
=0 Ω. In case of repetitive pulses, T
jstart
(at beginning of each
demagnetization) of every pulse must not exceed the temperature specified above for
curves B and C.
Figure 31. SO-8 demagnetization
1
10
100
0.1 1 10 100
L(mH)
I
LMAX (A)
A
B
C
V
IN
, I
L
t
Demagnetization Demagnetization Demagnetization
Protection features VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
18/37 Doc ID 7383 Rev 4
3.3 DPAK maximum demagnetization energy
Figure 32. DPAK maximum turn-off current versus load inductance
Legend
A = Single Pulse at T
Jstart
=150 °C
B = Repetitive pulse at T
Jstart
=100 °C
C = Repetitive Pulse at T
Jstart
=125 °C
Conditions:
V
CC
=13.5 V
Values are generated with R
L
=0 Ω. In case of repetitive pulses, T
jstart
(at beginning of each
demagnetization) of every pulse must not exceed the temperature specified above for
curves B and C.
Figure 33. DPAK demagnetization
1
10
100
0.01 0.1 1 10 100
L(mH)
I
LMAX (A)
V
IN
, I
L
t
Demagnetization Demagnetization Demagnetization
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 Protection features
Doc ID 7383 Rev 4 19/37
3.4 SOT-223 maximum demagnetization energy
Figure 34. SOT-223 maximum turn-off current versus load inductance
Legend
A = Single Pulse at T
Jstart
=150 °C
B = Repetitive pulse at T
Jstart
=100 °C
C = Repetitive Pulse at T
Jstart
=125 °C
Conditions:
V
CC
=13.5 V
Values are generated with R
L
=0 Ω. In case of repetitive pulses, T
jstart
(at beginning of each
demagnetization) of every pulse must not exceed the temperature specified above for
curves B and C.
Figure 35. SOT-223 demagnetization
1
10
100
0.01 0.1 1 10
L(mH)
I
LMAX (A)
V
IN
, I
L
t
Demagnetization Demagnetization Demagnetization
"53% %% %% III—HEM"? D. B:m“2 2Cm”2 lhI-amb
Package and PCB thermal data VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
20/37 Doc ID 7383 Rev 4
4 Package and PCB thermal data
4.1 SO-8 thermal data
Figure 36. SO-8 PC board
Note: Layout condition of R
th
and Z
th
measurements (PCB FR4 area=58 mm x 58 mm, PCB
thickness=2 mm, Cu thickness=35 µm, Copper areas: 0.14 cm
2
, 0.8 cm
2
, 2 cm
2
).
Figure 37. R
thj-amb
vs PCB copper area in open box free air condition
70
75
80
85
90
95
100
105
110
00.511.522.5
PCB Cu heatsink area (cm^2)
RTHj_amb (ºC/W)
SO-8 at 2 pins connected to TAB
5)
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 Package and PCB thermal data
Doc ID 7383 Rev 4 21/37
Figure 38. SO-8 thermal impedance junction ambient single pulse
Figure 39. Thermal fitting model of an OMNIFET II in SO-8
Equation 1 Pulse calculation formula
where
Table 5. SO-8 thermal parameter
Area/island (cm
2
)Footprint2
R1 (°C/W) 0.2
R2 (°C/W) 0.9
R3 (°C/W) 3.5
R4 (°C/W) 21
R5 (°C/W) 16
R6 (°C/W) 58 28
C1 (W.s/°C) 3.00E-04
0.1
1
10
100
1000
0.0001 0.001 0.01 0.1 1 10 100 1000
Time (s)
ZTH (°C/W)
T_amb
C1
R1 R2
C2
R3
C3
R4
C4
R5
C5
R6
C6
Pd
Tj
Z
THδ
R
TH
δZ
THtp
1δ()+=
δt
p
T=
lh iiiii
Package and PCB thermal data VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
22/37 Doc ID 7383 Rev 4
4.2 SOT-223 thermal data
Figure 40. SOT-223 PC board
Note: Layout condition of R
th
and Z
th
measurements (PCB FR4 area=58 mm x 58 mm, PCB
thickness=2 mm, Cu thickness=35 µm, Copper areas: 0.11 cm
2
, 1 cm
2
, 2 cm
2
).
Figure 41. R
thj-amb
vs PCB copper area in open box free air condition
C2 (W.s/°C) 9.00E-04
C3 (W.s/°C) 7.50E-03
C4 (W.s/°C) 0.045
C5 (W.s/°C) 0.35
C6 (W.s/°C) 1.05 2
Table 5. SO-8 thermal parameter (continued)
Area/island (cm
2
)Footprint2
60
70
80
90
100
110
120
130
140
00.511.522.5
Cu area (cm^2)
RTH j-amb (°C/W)
LED“ “LEE H H > 8
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 Package and PCB thermal data
Doc ID 7383 Rev 4 23/37
Figure 42. SOT-223 thermal impedance junction ambient single pulse
Figure 43. Thermal fitting model of an OMNIFET II in SOT-223
Equation 2 Pulse calculation formula
where
Table 6. SOT-223 thermal parameter
Area/island (cm
2
)Footprint2
R1 (°C/W) 0.2
R2 (°C/W) 1.1
R3 (°C/W) 4.5
R4 (°C/W) 24
R5 (°C/W) 0.1
R6 (°C/W) 100 45
C1 (W.s/°C) 3.00E-04
0.1
1
10
100
1000
0.0001 0.001 0.01 0.1 1 10 100 1000
Time (s)
ZTH (°C/W)
T_amb
C1
R1 R2
C2
R3
C3
R4
C4
R5
C5
R6
C6
Pd
Tj
Z
THδ
R
TH
δZ
THtp
1δ()+=
δt
p
T=
IIIIIII
Package and PCB thermal data VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
24/37 Doc ID 7383 Rev 4
4.3 DPAK thermal data
Figure 44. DPAK PC board
Note: Layout condition of R
th
and Z
th
measurements (PCB FR4 area=60 mm x 60 mm, PCB
thickness=2 mm, Cu thickness=35µm, Copper areas: from minimum pad lay-out to 8 cm2).
Figure 45. R
thj-amb
vs PCB copper area in open box free air condition
C2 (W.s/°C) 9.00E-04
C3 (W.s/°C) 3.00E-02
C4 (W.s/°C) 0.16
C5 (W.s/°C) 1000
C6 (W.s/°C) 0.5 2
Table 6. SOT-223 thermal parameter (continued)
Area/island (cm
2
)Footprint2
30
40
50
60
70
80
90
0246810
PCB CU heatsink area (cm^2)
RTH j_amb (ºC/W)
[‘1‘ m 7 z 7 1mm 3:10 "’[t m
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 Package and PCB thermal data
Doc ID 7383 Rev 4 25/37
Figure 46. DPAK thermal impedance junction ambient single pulse
Figure 47. Thermal fitting model of an OMNIFET II in DPAK
Equation 3 Pulse calculation formula
where
Table 7. DPAK thermal parameter
Area/island (cm
2
)Footprint6
R1 (°C/W) 0.1
R2 (°C/W) 0.35
R3 (°C/W) 1.20
R4 (°C/W) 2
R5 (°C/W) 15
R6 (°C/W) 61 24
0.1
1
10
100
1000
0.0001 0.001 0.01 0.1 1 10 100 1000
Time (s)
ZTH (°C/W)
T_amb
C1
R1 R2
C2
R3
C3
R4
C4
R5
C5
R6
C6
Pd
Tj
Z
THδ
R
TH
δZ
THtp
1δ()+=
δt
p
T=
Package and PCB thermal data VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
26/37 Doc ID 7383 Rev 4
C1 (W.s/°C) 0.0006
C2 (W.s/°C) 0.0021
C3 (W.s/°C) 0.05
C4 (W.s/°C) 0.3
C5 (W.s/°C) 0.45
C6 (W.s/°C) 0.8 5
Table 7. DPAK thermal parameter (continued)
Area/island (cm
2
)Footprint6
l: www.st.com
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 Package and packing information
Doc ID 7383 Rev 4 27/37
5 Package and packing information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
5.1 TO-251 (IPAK) mechanical data
Table 8. TO-251 (IPAK) mechanical data
Symbol millimeters
Min. Typ. Max.
A2.2 2.4
A1 0.9 1.1
A3 0.7 1.3
B 0.64 0.9
B2 5.2 5.4
B3 0.85
B5 0.3
B6 0.95
C 0.45 0.6
C2 0.48 0.6
D6 6.2
E6.4 6.6
G4.4 4.6
H15.9 16.3
L9 9.4
L1 0.8 1.2
L2 0.8 1
c2 A3 A1
Package and packing information VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
28/37 Doc ID 7383 Rev 4
Figure 48. TO-251 (IPAK) package dimensions
5.2 TO-252 (DPAK) mechanical data
Table 9. TO-252 (DPAK) mechanical data
Symbol millimeters
Min. Typ. Max.
A2.20 2.40
A1 0.90 1.10
A2 0.03 0.23
B0.64 0.90
B2 5.20 5.40
C0.45 0.60
C2 0.48 0.60
D6.00 6.20
D1 5.1
E6.40 6.60
E1 4.7
e2.28
G4.40 4.60
H9.35 10.10
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 Package and packing information
Doc ID 7383 Rev 4 29/37
Figure 49. TO-252 (DPAK) package dimensions
5.3 SOT-223 mechanical data
L2 0.8
L4 0.60 1.00
R0.2
V2 0°
Package Weight Gr. 0.29
Table 9. TO-252 (DPAK) mechanical data (continued)
Symbol millimeters
Min. Typ. Max.
P032P
Table 10. SOT-223 mechanical data
Symbol millimeters
Min. Typ. Max.
A1.8
B0.60.70.85
B1 2.9 3 3.15
c 0.24 0.26 0.35
D 6.3 6.5 6.7
e2.3
Package and packing information VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
30/37 Doc ID 7383 Rev 4
Figure 50. SOT-223 package dimensions
5.4 SO-8 mechanical data
e1 4.6
E 3.3 3.5 3.7
H6.777.3
V 10 (max)
A1 0.02 0.1
Table 10. SOT-223 mechanical data (continued)
Symbol millimeters
Min. Typ. Max.
0046067
Table 11. SO-8 mechanical data
Symbol millimeters
Min Typ Max
A1.75
a1 0.1 0.25
a2 1.65
a3 0.65 0.85
b0.35 0.48
A 1.75
A1 0.10 0.25
immm 4 I I ffl:r1 4H; 1“ r A“ 57 T f\ U U U U ‘:‘:\j 7 “V W } E L 1777? U L U U
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 Package and packing information
Doc ID 7383 Rev 4 31/37
Figure 51. SO-8 package dimensions
A2 1.25
b 0.28 0.48
c 0.17 0.23
D
(1)
4.80 4.90 5.00
E 5.80 6.00 6.20
E1
(2)
3.80 3.90 4.00
e 1.27
h 0.25 0.50
L 0.40 1.27
L1 1.04
k 0°
ccc 0.10
1. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs
shall not exceed 0.15 mm in total (both side).
2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not
exceed 0.25 mm per side.
Table 11. SO-8 mechanical data (continued)
Symbol millimeters
Min Typ Max
0016023 D
I #4
Package and packing information VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
32/37 Doc ID 7383 Rev 4
5.5 SOT-223 packing information
Figure 52. SOT-223 tape and reel shipment (suffix “TR”)
REEL DIMENSIONS
Base Q.ty 1000
Bulk Q.ty 1000
A (max) 330
B (min) 1.5
C (± 0.2) 13
F20.2
G (+ 2 / -0) 12.4
N (min) 60
T (max) 18.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
All dimensions are in mm.
Tape width W 12
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 8
Hole Diameter D 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 5.5
Compartment Depth K (max) 4.5
Hole Spacing P1 (± 0.1) 2
Top
cover
tape
End
Start
No componentsNo components Components
500mm min
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
Lb" Dimhon m M
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 Package and packing information
Doc ID 7383 Rev 4 33/37
5.6 SO-8 packing information
Figure 53. SO-8
tube shipment (no suffix)
Figure 54. SO-8 tape and reel shipment (suffix “TR”)
Base Q.ty 100
Bulk Q.ty 2000
Tube length (± 0.5) 532
A3.2
B6
C (± 0.1) 0.6
C
B
A
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
All dimensions are in mm.
Tape width W 12
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 8
Hole Diameter D (± 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 5.5
Compartment Depth K (max) 4.5
Hole Spacing P1 (± 0.1) 2
Top
cover
tape
End
Start
No componentsNo components Components
500mm min
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
REEL DIMENSIONS
All dimensions are in mm.
Base Q.ty 2500
Bulk Q.ty 2500
A (max) 330
B (min) 1.5
C (± 0.2) 13
F20.2
G (+ 2 / -0) 12.4
N (min) 60
T (max) 18.4
% %
Package and packing information VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
34/37 Doc ID 7383 Rev 4
5.7 DPAK packing information
Figure 55. DPAK footprint and tube shipment (no suffix)
Figure 56. DPAK tape and reel shipment (suffix “TR”)
6.7 3.01.8 1.6
2.3
2.3
6.7
A
C
B
Base Q.ty 75
Bulk Q.ty 3000
Tube length (± 0.5) 532
A6
B21.3
C (± 0.1) 0.6
REEL DIMENSIONS
Base Q.ty 2500
Bulk Q.ty 2500
A (max) 330
B (min) 1.5
C (± 0.2) 13
F20.2
G (+ 2 / -0) 16.4
N (min) 60
T (max) 22.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
All dimensions are in mm.
Tape width W 16
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 8
Hole Diameter D (± 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 7.5
Compartment Depth K (max) 6.5
Hole Spacing P1 (± 0.1) 2
Top
cover
tape
End
Start
No componentsNo components Components
500mm min
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 Package and packing information
Doc ID 7383 Rev 4 35/37
5.8 IPAK packing information
Figure 57. IPAK tube shipment (no suffix)
All dimensions are in mm.
Base Q.ty 75
Bulk Q.ty 3000
Tube length (± 0.5) 532
A6
B21.3
C (± 0.1) 0.6
A
C
B
Revision history VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
36/37 Doc ID 7383 Rev 4
6 Revision history
Table 12. Document revision history
Date Revision Changes
01-Feb-2003 1 Initial Release
28-Apr-2009 2
Added Table 1: Device summary on page 1 and Section 4:
Package and PCB thermal data on page 20.
Updated Section 5: Package and packing information on
page 27.
10-Sep-2010 3 Updated Table 4: Electrical characteristics
20-Sep-2013 4 Updated Disclaimer.
m
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
Doc ID 7383 Rev 4 37/37
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