LT1722-24 Datasheet by Analog Devices Inc.

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l ’ LI” LT1722 LT1723 LT1724 TECHNOLOGY T > L7 LJUW
LT1722/LT1723/LT1724
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TYPICAL APPLICATION
FEATURES DESCRIPTION
Single, Dual, Quad 200MHz
Low Noise Precision Op Amps
The LT
®
1722/LT1723/LT1724 are single/dual/quad, low
noise, low power, high speed operational amplifi ers. These
products feature lower input offset voltage, lower input bias
current and higher DC gain than devices with comparable
bandwidth. The 200MHz gain bandwidth ensures high
open-loop gain at video frequencies.
The low input noise voltage is achieved with reduced
supply current. The total noise is optimized for a source
resistance between 0.8k and 12k. Due to the input bias
current cancellation technique used, the resistance seen
by each input does not need to be balanced.
The output drives a 150 load to ±3V with ±5V supplies.
On a single 5V supply the output swings from 1.5V to
3.5V with a 500 load connected to 2.5V. The amplifi er
is unity-gain stable (CLOAD ≤ 100pF).
The LT1722/LT1723/LT1724 are manufactured on Linear
Technologys advanced low voltage complementary
bipolar process. The LT1722 is available in the SO-8 and
5-pin SOT-23 packages. The LT1723 is available in the
SO-8 and MS8 packages. The LT1724 is available in the
14-lead SO package.
Differential Video Line Driver
APPLICATIONS
n 3.8nV/√Hz Input Noise Voltage
n 3.7mA Supply Current
n 200MHz Gain Bandwidth
n Low Total Harmonic Distortion: –85dBc at 1MHz
n 70V/µs Slew Rate
n 400µV Maximum Input Offset Voltage
n 300nA Maximum Input Bias Current
n Unity-Gain Stable
n Capacitive Load Stable Up to 100pF
n 23mA Minimum Output Current
n Specifi ed at ±5V and Single 5V
n Low Profi le (1mm) SOT-23 (ThinSot) Package
n Video and RF Amplifi cation
n ADSL, HDSL II, VDSL Receivers
n Active Filters
n Wideband Amplifi ers
n Buffers
n Data Acquisition Systems
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. ThinSOT is a trademark of Linear Technology Corporation. All other
trademarks are the property of their respective owners.
Line Driver Mulitburst Video Signal
+
1/2 LT1723
R5 2k
R3
750
R7
62.5
+VOUT
VIN/2 62.5
LOAD
62.5
LOAD
–VIN/2
–VIN
1723 TA01
VIN
–VOUT
125
CAT-5
TWISTED PAIR
C1 5pF
+
1/2 LT1723
R4 2k
VIN
75
SOURCE R2
2k
R1
75
R6
62.5
C2 5pF
+VOUT
0.5V/DIV
–VOUT
0.5V/DIV
VIN
1V/DIV
1723 TA02
[I1722flJ1723flI1724 j j j j 19% EEEE DDDEEEE <>< 3/="">, EEEEEEE : 3 A :C: 333: 3333 b a $E CED: ALYQEQ
LT1722/LT1723/LT1724
2
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PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
Total Supply Voltage (V+ to V) .............................12.6V
Input Voltage ............................................................. ±VS
Differential Input Voltage (Note 2) .........................±0.7V
Input Current (Note 2) ..........................................±10mA
Output Short-Circuit Duration (Note 3) ............ Indefi nite
(Note 1)
LT1722
TOP VIEW
NC
V+
OUT
NC
NC
–IN
+IN
V
S8 PACKAGE
8-LEAD PLASTIC SO
1
2
3
4
8
7
6
5
+
TJMAX = 150°C, θJA = 150°C/W
LT1722
OUT 1
V 2
TOP VIEW
S5 PACKAGE
5-LEAD PLASTIC TSOT-23
+IN 3
5 V+
4 –IN
+–
TJMAX = 150°C, θJA = 250°C/W
LT1723
TOP VIEW
V+
OUT B
–IN B
+IN B
OUT A
–IN A
+IN A
V
S8 PACKAGE
8-LEAD PLASTIC SO
1
2
3
4
8
7
6
5
A
B
TJMAX = 150°C, θJA = 190°C/W
LT1723
1
2
3
4
OUT A
–IN A
+IN A
V
8
7
6
5
V+
OUT B
–IN B
+IN B
TOP VIEW
MS8 PACKAGE
8-LEAD PLASTIC MSOP
A
B
TJMAX = 150°C, θJA = 250°C/W
LT1724
TOP VIEW
S PACKAGE
14-LEAD PLASTIC SO
1
2
3
4
5
6
7
14
13
12
11
10
8
8
OUT A
–IN A
+IN A
V+
+IN B
–IN B
OUT B
OUT D
–IN D
+IN D
V
+IN C
–IN C
OUT C
+
+
AD
+
+
BC
TJMAX = 150°C, θJA = 100°C/W
Operating Temperature Range (Note 4) ...40°C to 85°C
Specifi ed Temperature Range (Note 5) ....40°C to 85°C
Maximum Junction Temperature .......................... 150°C
Storage Temperature Range ..................65°C to 150°C
Lead Temperature (Soldering, 10 sec)...................300°C
LT1722/LT1723/LT1724 L7 LJUW
LT1722/LT1723/LT1724
3
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ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION SPECIFIED
TEMPERATURE RANGE
LT1722CS8#PBF LT1722CS8#TRPBF 1722 8-Lead Plastic SO 0°C to 70°C
LT1722IS8#PBF LT1722IS8#TRPBF 1722I 8-Lead Plastic SO –40°C to 85°C
LT1722CS5#PBF LT1722CS5#TRPBF LTZB 5-Lead Plastic TSOT-23 0°C to 70°C
LT1722IS5#PBF LT1722IS5#TRPBF LTZB 5-Lead Plastic TSOT-23 –40°C to 85°C
LT1723CS8#PBF LT1723CS8#TRPBF 1723 8-Lead Plastic SO 0°C to 70°C
LT1723IS8#PBF LT1723IS8#TRPBF 1723I 8-Lead Plastic SO –40°C to 85°C
LT1723CMS8#PBF LT1723CMS8#TRPBF LTYC 8-Lead Plastic MSOP 0°C to 70°C
LT1723IMS8#PBF LT1723IMS8#TRPBF LTZA 8-Lead Plastic MSOP –40°C to 85°C
LT1724CS#PBF LT1724CS#TRPBF LT1724CS 14-Lead Plastic SO 0°C to 70°C
LT1724IS#PBF LT1724IS#TRPBF LT1724IS 14-Lead Plastic SO –40°C to 85°C
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi ed by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based fi nish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifi
cations, go to: http://www.linear.com/tapeandreel/
LT1722/LT1723/LT1724
LT1722/LT1723/LT1724
4
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ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VOS Input Offset Voltage (Note 6)
LT1722 SOT-23 and LT1723 MS8
100
150
400
650
µV
µV
IOS Input Offset Current 40 300 nA
IBInput Bias Current 40 300 nA
enInput Noise Voltage f = 10kHz 3.8 nV/√Hz
inInput Noise Current f = 10kHz 1.2 pA/√Hz
RIN Input Resistance VCM = ±3.5V
Differential
535
50
M
k
CIN Input Capacitance 2pF
Input Voltage Range +
Input Voltage Range
3.5 4
–4 –3.5
V
V
CMRR Common Mode Rejection Ratio VCM = ±3.5V 80 100 dB
PSRR Power Supply Rejection Ratio VS = ±2.3V to ± 5.5V 78 90 dB
AVOL Large-Signal Voltage Gain VOUT = ±3V, RL = 500
VOUT = ±3V, RL = 150
10
7
17
14
V/mV
V/mV
VOUT Output Swing RL = 500, VIN = ±10mV
RL = 150, VIN = ±10mV
±3.2
±3.1
±3.8
±3.4
V
V
IOUT Output Current VOUT = ±3V, 10mV Overdrive 23 50 mA
ISC Short-Circuit Current VOUT = 0V, VIN = ±1V 35 90 mA
SR Slew Rate AV = –1, (Note 7) 45 70 V/µs
Full Power Bandwidth 3V Peak, (Note 8) 3.7 MHz
GBW Gain Bandwidth f = 200kHz 115 200 MHz
tSSettling Time AV = –1, 2V, 0.1%
AV = –1, 2V, 0.01%
91
112
ns
ns
tr
, tfRise Time, Fall Time AV = 1, 10% to 90%, VIN = 0.2VP-P, RL = 150 6 ns
Overshoot AV = 1, VIN = 0.2VP-P, RL = 150, RF = 0 15 %
Propagation Delay 50% VIN to 50% VOUT = 0.2VP-P, RL = 150 3 ns
ROOutput Resistance AV = 1, f = 1MHz 0.15
Channel Separation VOUT = ±3V, RL = 150 82 90 dB
ISSupply Current Per Amplifi er 3.7 4.5 mA
TA = 25°C. VS = 5V, VCM = 2.5V, RL to 2.5V, unless otherwise noted.
VOS Input Offset Voltage (Note 6)
LT1722 SOT-23 and LT1723 MS8
250
350
550
800
µV
µV
IOS Input Offset Current 20 300 nA
IBInput Bias Current 20 300 nA
enInput Noise Voltage f = 10kHz 4 nV/Hz
inInput Noise Current f = 10kHz 1.1 pA/Hz
RIN Input Resistance VCM = 1.5V to 3.5V
Differential
532
55
M
k
CIN Input Capacitance 2pF
Input Voltage Range +
Input Voltage Range –
3.5 4
1 1.5
V
V
TA = 25°C, VS = ±5V, VCM = 0V, unless otherwise noted.
LT1722/LT1723/LT1724 L7 LJUW
LT1722/LT1723/LT1724
5
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ELECTRICAL CHARACTERISTICS
T
A = 25°C. VS = 5V, VCM = 2.5V, RL to 2.5V, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
CMRR Common Mode Rejection Ratio VCM = 1.5V to 3.5V 80 100 dB
AVOL Large-Signal Voltage Gain VOUT = 1.5V to 3.5V, RL = 500 4 10 V/mV
VOUT Output Swing+
Output Swing–
RL = 500, VIN = ±10mV
RL = 500, VIN = ±10mV
3.6 3.8
0.9 1.4
V
V
IOUT Output Current VOUT = 3.5V or 1.5V, 10mV Overdrive 10 20 mA
ISC Short-Circuit Current VOUT = 2.5V, VIN = ±1V 22 55 mA
SR Slew Rate AV = –1, (Note 7) 40 70 V/µs
Full Power Bandwidth 1V Peak, (Note 8) 8.7 MHz
GBW Gain Bandwidth (Note 10) f = 200kHz 115 180 MHz
tr
, tfRise Time, Fall Time AV = 1, 10% to 90%, VIN = 0.2VP-P, RL = 500 5 ns
Overshoot AV = 1, VIN = 0.2VP-P, RL = 500 16 %
Propagation Delay 50% VIN to 50% VOUT, 0.1V, RL = 500 3 ns
ROOutput Resistance AV = 1, f = 1MHz 0.19
Channel Separation VOUT = 1.5V to 3.5V, RL = 500 82 90 dB
ISSupply Current Per Amplifi er 3.8 5 mA
The denotes the specifi cations which apply over the temperature range of 0°C ≤ T
A ≤ 70°C. VS = ±5V, VCM = 0V,
unless otherwise noted. (Note 5)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VOS Input Offset Voltage (Note 6)
LT1722 SOT-23 and LT1723 MS8
l
l
700
850
µV
µV
Input VOS Drift (Note 9) l37µV/°C
IOS Input Offset Current l350 nA
IBInput Bias Current l350 nA
Input Voltage Range +
Input Voltage Range
l
l
3.5
–3.5
V
V
CMRR Common Mode Rejection Ratio VCM = ±3.5V l75 dB
PSRR Power Supply Rejection Ratio VS = ±2.3V to ±5.5V l76 dB
AVOL Large-Signal Voltage Gain VOUT = ±3V, RL = 500Ω
VOUT = ±3V, RL = 150Ω
l
l
9
6
V/mV
V/mV
VOUT Output Swing RL = 500Ω, VIN = ±10mV
RL = 150Ω, VIN = ±10mV
l
l
±3.15
±3.05
V
V
IOUT Output Current VOUT = ±3V, 10mV Overdrive l22 mA
ISC Short-Circuit Current VOUT = 0V, VIN = ±1V l30 mA
SR Slew Rate AV = –1, (Note 7) l35 V/µs
GBW Gain Bandwidth f = 200kHz l100 MHz
Channel Separation VOUT = ±3V, RL = 150Ω l81 dB
ISSupply Current Per Amplifi er l5.45 mA
LT1722/LT1723/LT1724 L7LJCUEN2
LT1722/LT1723/LT1724
6
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ELECTRICAL CHARACTERISTICS
The l denotes the specifi cations which apply over the temperature range of
0°C ≤ T
A ≤ 70°C. VS = 5V, VCM = 2.5V, RL to 2.5V, unless otherwise noted. (Note 5)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VOS Input Offset Voltage (Note 6)
LT1722 SOT-23 and LT1723 MS8
l
l
850
950
µV
µV
Input VOS Drift (Note 9) l37µV/°C
IOS Input Offset Current l350 nA
IBInput Bias Current l350 nA
Input Voltage Range +
Input Voltage Range
l
l
3.5
1.5
V
V
CMRR Common Mode Rejection Ratio VCM = 1.5V to 3.5V l75 dB
AVOL Large-Signal Voltage Gain VOUT = 1.5V to 3.5V, RL = 500Ωl3 V/mV
VOUT Output Swing+
Output Swing–
RL = 500Ω, VIN = ±10mV
RL = 500Ω, VIN = ±10mV
l
l
3.55
1.45
V
V
IOUT Output Current VOUT = 3.5V, or 1.5V, 10mV Overdrive l9mA
ISC Short-Circuit Current VOUT = 2.5V, VIN = ±1V l11 mA
SR Slew Rate AV = –1, (Note 7) l30 V/µs
GBW Gain Bandwidth (Note 10) f = 200kHz l100 MHz
Channel Separation VOUT = 1.5V to 3.5V, RL = 500Ω l81 dB
ISSupply Current l5.95 mA
The l denotes the specifi cations which apply over the temperature range of –40°C ≤ T
A ≤ 85°C. VS = ±5V, VCM = 0V,
unless otherwise noted. (Note 5)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VOS Input Offset Voltage (Note 6)
LT1722 SOT-23 and LT1723 MS8
l
l
900
1100
µV
µV
Input VOS Drift (Note 9) l3 10 µV/°C
IOS Input Offset Current l400 nA
IBInput Bias Current l400 nA
Input Voltage Range +
Input Voltage Range –
l
l
3.5
–3.5
V
V
CMRR Common Mode Rejection Ratio VCM = ±3.5V l75 dB
PSRR Power Supply Rejection Ratio VS = ±2.0V to ±5.5V l75 dB
AVOL Large-Signal Voltage Gain VOUT = ±3V, RL = 500
VOUT = ±3V, RL = 150
l
l
8
5
V/mV
V/mV
VOUT Output Swing RL = 500, VIN = ±10mV
RL = 150, VIN = ±10mV
l
l
±3.1
±3.0
V
V
IOUT Output Current VOUT = ±3V, 10mV Overdrive l20 mA
ISC Short-Circuit Current VOUT = 0V, VIN = ±1V l25 mA
SR Slew Rate AV = –1, (Note 7) l25 V/µs
GBW Gain Bandwidth f = 200kHz l90 MHz
Channel Separation VOUT = ±3V, RL = 150 l80 dB
ISSupply Current l5.95 mA
LT1722/LT1723/LT1724 L7 LJUW
LT1722/LT1723/LT1724
7
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ELECTRICAL CHARACTERISTICS
The denotes the specifi cations which apply over the temperature range of
–40°C ≤ TA ≤ 85°C. VS = 5V, VCM = 2.5V, RL to 2.5V, unless otherwise noted. (Note 5)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The inputs are protected by back-to-back diodes. If the differential
input voltage exceeds 0.7V, the input current should be limited to less than
10mA.
Note 3: A heat sink may be required to keep the junction temperature
below the absolute maximum rating when the output is shorted
indefi nitely.
Note 4: The LT1722C/LT1722I, LT1723C/LT1723I, LT1724C/LT1724I are
guaranteed functional over the operating temperature range of
40°C to 85°C.
Note 5: The LT1722C/LT1723C/LT1724C are guaranteed to meet specifi ed
performance from 0°C to 70°C. The LT1722C/LT1723C/LT1724C are
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VOS Input Offset Voltage (Note 6)
LT1722 SOT-23 and LT1723 MS8
l
l
1000
1200 µV
µV
Input VOS Drift (Note 9) l310µV/°C
IOS Input Offset Current l400 nA
IBInput Bias Current l400 nA
Input Voltage Range +
Input Voltage Range –
l
l
3.5
1.5
V
V
CMRR Common Mode Rejection Ratio VCM = 1.5V to 3.5V l75 dB
AVOL Large-Signal Voltage Gain VOUT = 1.5V to 3.5V, RL = 500l2 V/mV
VOUT Output Swing+
Output Swing–
RL = 500, VIN = ±10mV
RL = 500, VIN = ±10mV
l
l
3.5
1.5
V
V
IOUT Output Current VOUT = 3.5V or 1.5V, 30mV Overdrive l8mA
ISC Short-Circuit Current VOUT = 2.5V, VIN = ±1V l10 mA
SR Slew Rate AV = –1, (Note 7) l20 V/µs
GBW Gain Bandwidth (Note 10) f = 200kHz l90 MHz
Channel Separation VOUT = 1.5V to 3.5V, RL = 500l80 dB
ISSupply Current l6.45 mA
designed, characterized and expected to meet specifi ed performance from
40°C to 85°C but are not tested or QA sampled at these temperatures.
The LT1722I/LT1723I/LT1724I are guaranteed to meet specifi ed
performance from –40°C to 85°C.
Note 6: Input offset voltage is pulse tested and is exclusive of warm-up
drift.
Note 7: Slew rate is measured between ±2V on the output with ±3V input
for ±5V supplies and ±1V on the output with ±1.5V input for single 5V
supply. (For 5V supply, the voltage levels are 2.5V referred.)
Note 8: Full power bandwidth is calculated from the slew rate:
FPBW = SR/2πVP
Note 9 : This parameter is not 100% tested.
Note 10 : This parameter is guaranteed through correlation with slew rate.
LT1722/LT1723/LT1724 \ s :5 av \ L/v / v5 5v v \ :25v L7LJCUEN2
LT1722/LT1723/LT1724
8
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TYPICAL PERFORMANCE CHARACTERISTICS
Input Bias Current
vs Temperature Input Noise Spectral Density
Open-Loop Gain
vs Resistive Load
Total Noise
vs Unmatched Source Resistance Warm-Up Drift vs Time VOS Shift vs VCM and VS
Supply Current vs Temperature
Input Common Mode Range
vs Supply Voltage
Input Bias Current
vs Common Mode Voltage
TEMPERATURE (°C)
–50
SUPPLY CURRENT (mA)
4.0
4.5
5.0
25 75
1723 G01
3.5
3.0
–25 0 50 100 125
2.5
2.0
PER AMPLIFIER
VS = 5V
VS = ±5V
SUPPLY VOLTAGE (±V)
0
INPUT COMMON MODE RANGE (V)
245
1723 G02
13 67
0.5
V+
–0.5
–1.0
–1.5
–1.2
2.0
1.5
1.0
0.5
V
(VOS) < 500µV
TA = 25°C
INPUT COMMON MODE VOLTAGE (V)
–5
INPUT BIAS CURRENT (nA)
400
300
200
100
0
–100
–200
–300
–400 3
1723 G03
–3 –1 1 52–4 –2 0 4
VS = ±5V
TA = –45°C
TA = 125°C
TA = 25°C
TA = 85°C
TEMPERATURE (°C)
–50
INPUT BIAS CURRENT (nA)
20
40
60
25 75
1723 G04
0
–20
–25 0 50
IB
IB
IB+
IB+
100 125
–40
–60
VS = ±5V
VS = 5V
FREQUENCY (kHz)
0.01 0.1
1
10
100
0.1
1
10
in
1 10 100
1723 G05
INPUT VOLTAGE NOISE (nV/√Hz)
INPUT CURRENT NOISE (pA/√Hz)
en
LOAD RESISTANCE ()
100
74.0
OPEN-LOOP GAIN (dB)
76.5
79.0
81.5
84.0
89.0
1000 10000
1723 G06
86.5
TA = 25°C
VS = ±5V, VO = ±3V
VS = ±2.5V, VO = ±1V
SOURCE RESISTANCE, RS (k)
1
TOTAL NOISE VOLTAGE (nV/√Hz)
10
0.01 1 10 100
1723 G07
0.1 0.1
100 VS = ±5V
TA = 25°C
f = 10kHz
TOTAL NOISE
RESISTOR NOISE
+
RS
TIME AFTER POWER-UP (SEC)
0
OFFSET VOLTAGE DRIFT (µV)
10
20
30
5
15
25
20 40 60 80
1723 G08
10010030507090
LT1722S8
TA = 25°C
TYPICAL DATA
VS = ±5V
VS = ±2.5V
COMMON MODE VOLTAGE (V)
–300
VOS SHIFT (µV)
–100
100
300
–200
0
200
–3 –1 1 3
1723 G09
5–4–5 –2 0 2 4
VS = ±6.3V
VS = ±5V
VS = ±4V
VS = ±3V
VS = ±2.5V
TA = 25°C
TYPICAL PART
VS = ±6V
LT1722/LT1723/LT1724 R = mm R = mm R = 5005; AV 4 R; = 5005; R5 = on Av=4 RF=5UUSL R5=ELQ , — Ava RF=U$2 R5=50012 L7 LJUW
LT1722/LT1723/LT1724
9
172234fb
TYPICAL PERFORMANCE CHARACTERISTICS
Open-Loop Gain vs Temperature
Output Voltage Swing
vs Supply Voltage
Output Short-Circuit Current
vs Temperature
Gain and Phase vs Frequency Overshoot vs Capacitive Load Output Impedance vs Frequency
VOS vs Temperature
Undistorted Output Swing
vs Frequency
Undistorted Output Swing
vs Frequency
TEMPERATURE (°C)
–60
–500
OFFSET VOLTAGE (µV)
–400
–200
–100
0
60 80 100
200
1723 G10
–300
–40 –20 0 20 40 120
100
VS = ±5V
TYPICAL PART
VS = ±2.5V
FREQUENCY (MHz)
0.1
0
OUTPUT VOLTAGE (VP-P)
2
4
6
8
110
1723 G11
10
1
3
5
7
9
AV = 1, RF = 0, RIN = 500
AV = –1, RF = 500
VS = ±5V
RL = 150
2% MAX DISTORTION
FREQUENCY (MHz)
0.1
0
OUTPUT VOLTAGE (VP-P)
1.0
2.0
3.0
4.0
110
1723 G12
5.0
0.5
1.5
2.5
3.5
4.5
AV = –1, RF = 500
VS = 5V
RL = 500
2% MAX DISTORTION
AV = 1, RF = 0,
RIN = 500
TEMPERATURE (°C)
–50
86
OPEN-LOOP GAIN (dB)
76
78
79
80
85
82
050 75
1723 G13
77
83
84
81
–25 25 100 125
VS = ±5V, VO = ±3V
VS = 5V, VO = ±1V
RL = 500
RL = 500
RL = 150
SUPPLY VOLTAGE (±V)
2.0
OUTPUT VOLTAGE SWING (V)
2.5 3.53.0 4.0 5.04.5
1723 G08
5.5
V+
–0.5
–1.0
–1.5
–2.0
2.0
1.5
1.0
0.5
V
6.0
TA = 25°C
VIN = 10mV
RL = 500
RL = 500
RL = 150
RL = 150
TEMPERATURE (°C)
–50
60
OUTPUT SHORT-CIRCIUT CURRENT (mA)
65
75
80
85
110
95
050 75
1723 G15
70
100
105
90
–25 25 100 125
VS = ±5V
VS = 5V
SOURCE
SOURCE
SINK
SINK
FREQUENCY (MHz)
20
GAIN (dB)
PHASE (DEG)
80
90
10
0
70
40
60
50
30
0.01 1 10 100
1723 G16
–10
20
80
90
10
0
70
40
60
50
30
–10
0.1
PHASE
GAIN
±5V
±5V
5V
5V
TA = 25°C
AV = –1
RF = RG = 500
CAPACITIVE LOAD (pF)
10
OVERSHOOT (%)
50
60
70
80
50
1723 G17
40
30
45
55
65
75
35
25
20 20 30 40 60 70 80 90 100
VS = ±5V
RL = 500
VIN = 2VP-P
f = 1MHz
AV = –1, RF = 500, RS = 0
AV = 1, RF = 0, RS = 500
AV = 1, RF = 500,
RS = 0
FREQUENCY (MHz)
0.01
0.001
OUTPUT IMPEDANCE ()
0.1
100
1100.1 100
1723 G18
0.01
1
10
TA = 25°C
VS = ±5V
AV = 100
AV = 10 AV = 1
LT1722/LT1723/LT1724 L7LJCUEN2
LT1722/LT1723/LT1724
10
172234fb
TYPICAL PERFORMANCE CHARACTERISTICS
Channel Separation vs Frequency
Power Supply Rejection Ratio
vs Frequency
Common Mode Rejection Ratio
vs Frequency
Slew Rate vs Temperature Phase Margin vs Supply Voltage
Gain Bandwidth
vs Supply Voltage
Gain vs Frequency, AV = 1 Gain vs Frequency, AV = 1 Gain vs Frequency, AV = –1
FREQUENCY (MHz)
1
–1
GAIN (dB)
1
3
5
7
10 100
1723 G19
0
2
4
6
8
9TA = 25°C
AV = 1
RF = 0
NO RL
±5V
5V CL = 100pF
CL = 50pF
CL = 0pF
FREQUENCY (MHz)
1
–1
GAIN (dB)
1
3
5
7
10 100
1723 G20
0
2
4
6
8
9TA = 25°C
AV = 1
NO RL
NO CL
±5V
5V
RF = 500
RF = 1k
RF = 0
FREQUENCY (MHz)
1
–1
GAIN (dB)
1
3
5
7
10 100
1723 G21
0
2
4
6
8
9TA = 25°C
AV = –1
RF = RG = 500
NO RL
±5V
5V
CL = 100pF
CL = 50pF
CL = 0pF
FREQUENCY (MHz)
0.1
–50
CROSSTALK (dB)
–30
–10
1 10 100
1723 G22
–70
–60
–40
–20
–80
–90
TA = 25°C
VO = 6VP-P
RL = 150
FREQUENCY (MHz)
40
POWER SUPPLY REJECTION RATIO (dB)
100
30
20
90
60
80
70
50
0.01 1 10 100
1723 G23
10
00.1
TA = 25°C
VS = ±5V
AV = 1
–PSRR
+PSRR
FREQUENCY (MHz)
40
COMMON MODE REJECTION RATIO (dB)
100
110
30
20
90
60
80
70
50
0.01 1 10 100
1723 G24
10 0.1
TA = 25°C
VS = ±5V
TEMPERATURE (°C)
–50
SLEW RATE (V/µs)
90
25
1723 G40
60
40
–25 0 50
30
20
100
80
70
50
75 100 125
TA = 25°C
AV = –1
RG = RF = 500
VS = ±5V, SR+
VS = ±5V, SR
VS = ±2.5V, SR
VS = ±2.5V, SR+
SUPPLY VOLTAGE (±V)
2.5
35
PHASE MARGIN (DEG)
40
50
55
60
4.5
80
1723 G41
45
3.5
35 5.5
46
65
70
75
TA = 25°C
AV = –1
VIN = –20dBm
RG = RF = 500 RL = 500
CL = 5pF
CL = 25pF
CL = 55pF
RL = 500
RL = 500
RL = 150
RL = 150
RL = 150
SUPPLY VOLTAGE (±V)
2.5
GAIN BANDWIDTH (MHz)
215
4
1723 G42
200
190
3 3.5 4.5
185
180
220
210
205
195
5 5.5 6
TA = 25°C
AV = –1
VIN = –20dBm
RG = RF = 500
CL = 25pF
CL = 25pF
RL = 150
RL = 500
CL = 5pF
CL = 5pF
CL = 55pF
CL = 55pF
LT1722/LT1723/LT1724 SR / SR \ \ SR‘ ’ - ,_ ‘ J ',>~ -‘ —_§E ‘ ‘ W: \ I I ,, ¢ usz.anu\ , I WHH \ W” ‘ 32.2mm I ”2“” ’ , / ,2 r l 7 ——- —- / Rl=EUU$L3RD I , I I / I , \ I ’ \( I am,“ / \ H , ’ RLMEDHZN IRL=500$2 v / Rpm —-—- x x H L7 LJUW
LT1722/LT1723/LT1724
11
172234fb
TYPICAL PERFORMANCE CHARACTERISTICS
Harmonic Distortion vs Frequency
AV = 2, VO = 0.2VP-P
Harmonic Distortion vs Frequency
AV = 2, VO = 0.2VP-P
Harmonic Distortion vs Frequency
AV = 1, VO = 2VP-P
Harmonic Distortion vs Frequency
AV = 1, VO = 2VP-P
Harmonic Distortion vs Frequency
AV = 2, VO = 2VP-P
Slew Rate vs Supply Voltage
Harmonic Distortion vs Frequency
AV = 1, VO = 0.2VP-P
Harmonic Distortion vs Frequency
AV = 1, VO = 0.2VP-P
SUPPLY VOLTAGE (±V)
2
50
SLEW RATE (V/µs)
55
65
70
SR+
SR+
SR
SR
75
344.5 6.5
1723 G25
60
2.5 3.5 55.5 6
80 VIN_P-P = VS, VOUT_MES
AT 2/3 OF VIN_P-P
VIN = ±1.5V, VOUT_MES AT ±1V
TA = 25°C
AV = –1
RF = RG = RL = 500
FREQUENCY (MHz)
0.1
–100
HARMONIC DISTORTION (dBc)
–90
–80
–70
–60
–40
110
1723 G26
–50
VS = ±5V
AV = 1
RF = 0
RIN = 0
VO = 0.2VP-P
RL = 150, 2ND
RL = 500, 2ND
RL = 500, 3RD
RL = 150, 3RD
FREQUENCY (MHz)
0.1
–100
HARMONIC DISTORTION (dBc)
–90
–80
–70
–60
–40
110
1723 G27
–50
VS = 5V
AV = 1
RF = 0
RIN = 0
VO = 0.2VP-P
RL = 150, 2ND
RL = 500, 2ND
RL = 150, 3RD
RL = 500, 3RD
FREQUENCY (MHz)
0.1
–100
HARMONIC DISTORTION (dBc)
–90
–80
–70
–60
–40
110
1723 G28
–50
VS = ±5V
AV = 2
RF = 500
VO = 0.2VP-P
RL = 150, 2ND
RL = 150, 3RD
RL = 500, 2ND
RL = 500, 3RD
FREQUENCY (MHz)
0.1
–100
HARMONIC DISTORTION (dBc)
–90
–80
–70
–60
–40
110
1723 G29
–50
VS = 5V
AV = 2
RF = 500
VO = 0.2VP-P
RL = 150, 2ND
RL = 150, 3RD
RL = 500, 2ND
RL = 500, 3RD
FREQUENCY (MHz)
0.1
–100
HARMONIC DISTORTION (dBc)
–90
–80
–70
–60
–40
110
1723 G30
–50
VS = ±5V
AV = 1
RF = 0
RIN = 500
VO = 2VP-P
RL = 150, 3RD
RL = 500, 3RD
RL = 150, 2ND
RL = 500, 2ND
FREQUENCY (MHz)
0.1
–100
HARMONIC DISTORTION (dBc)
–90
–80
–70
–60
–40
110
1723 G31
–50
VS = 5V
AV = 1
RF = 0
RIN = 500
VO = 2VP-P
RL = 150, 3RD
RL = 500, 3RD
RL = 150, 2ND
RL = 500, 2ND
FREQUENCY (MHz)
0.1
–100
HARMONIC DISTORTION (dBc)
–90
–80
–70
–60
–40
110
1723 G32
–50
VS = ±5V
AV = 2
RF = 500
VO = 2VP-P
RL = 150, 3RD
RL = 500, 3RD
RL = 500, 2ND
RL = 150, 2ND
LT1722/LT1723/LT1724 L7Hߤߤ
LT1722/LT1723/LT1724
12
172234fb
TYPICAL PERFORMANCE CHARACTERISTICS
Large-Signal Transient, AV = 1 Small-Signal Transient, AV = 1 Small-Signal Transient, AV = 1
Large-Signal Transient, AV = –1 Small-Signal Transient, AV = –1
Harmonic Distortion vs Frequency
AV = 2, VO = 2VP-P Settling Time vs Output Step
FREQUENCY (MHz)
0.1
–100
HARMONIC DISTORTION (dBc)
–90
–80
–70
–60
–40
110
1723 G33
–50
VS = 5V
AV = 2
RF = 500
VO = 2VP-P
RL = 150, 3RD
RL = 500, 3RD
RL = 500, 2ND
RL = 150, 2ND
SETTLING TIME (ns)
60
OUTPUT STEP (V)
0
1.5
2.0
140
1723 G43
–0.5
–1.0
–3.0 80 100 120
70 90 110 130
–2.0
3.0
2.5
1.0
0.5
–1.5
–2.5
VS = ±5V
AV = –1
RF = 500
CF = 0pF
0.1% SETTLING
0.1% SETTLING
0.01% SETTLING
0.01% SETTLING
Small-Signal Transient, AV = –1
1V/DIV
AV = 1
RS = 500
RF = 0
50ns/DIV
1723 G34
50mV/DIV
AV = 1
RS = 0
RF = 0
CL = 0pF
50ns/DIV
1723 G35
50mV/DIV
AV = 1
RS = 0
RF = 0
CL = 100pF
50ns/DIV
1723 G36
1V/DIV
AV = –1
RG = 500
RF = 500
50ns/DIV
1723 G37
50mV/DIV
AV = –1
RG = 500
RF = 500
CL = 0pF
50ns/DIV
1723 G38
50mV/DIV
AV = –1
RG = 500
RF = 500
CL = 100pF
50ns/DIV
1723 G39
LT1722/LT1723/LT1724 Rm A A ‘N —’\M—D— —|:|—wv— K R K L7 LJUW
LT1722/LT1723/LT1724
13
172234fb
The LT1722/LT1723/LT1724 may be inserted directly into
many operational amplifi er applications improving both DC
and AC performance, as well as noise and distortion.
Layout and Passive Components
The LT1722/LT1723/LT1724 amplifi ers are more tolerant
of less than ideal layouts than other high speed amplifi ers.
For maximum performance (for example, fast settling time)
use a ground plane, short lead lengths and RF quality
bypass capacitors (0.01µF to 0.1µF). For high drive current
applications, use low ESR supply bypass capacitors (1µF
to 10µF tantalum). The output/input parasitic coupling
should be minimized when high frequency performance
is required.
The parallel combination of the feedback resistor and gain
setting resistor on the inverting input combine with the
input capacitance to form a pole that can cause peaking
or even oscillations. In parallel with the feedback resistor,
a capacitor of value:
C
F > RG • CIN/RF
should be used to cancel the input pole and optimize
dynamic performance. For unity-gain applications where
a feedback resistor is used, such as an I-to-V converter,
CF should be fi ve times greater than CIN; an optimum
value for CF is 10pF.
Input Considerations
Each of the LT1722/LT1723/LT1724 inputs is protected with
back-to-back diodes across the bases of the NPN input
devices. If greater than 0.7V differential input voltages are
anticipated, the input current must be limited to less than
10mA with an external series resistor. Each input also has
two ESD clamp diodes—one to each supply. If an input is
driven beyond the supply, limit the current with an external
resistor to less than 10mA. The input stage protection
circuit is shown in Figure 1.
The input currents of the LT1722/LT1723/LT1724 are
typically in the tens of nA range due to the bias current
cancellation technique used at the input. As the input
offset current can be greater than either input current,
APPLICATIONS INFORMATION
Figure 1. Input Stage Protection
adding resistance to balance source resistance is not
recommended. The value of the source resistor should
be below 12k as it actually degrades DC accuracy and
also increases noise.
Total Input Noise
The total input noise of the LT1722/LT1723/LT1724 is
optimized for a source resistance between 0.8k and 12k.
Within this range, the total input noise is dominated by
the noise of the source resistance itself. When the source
resistance is below 0.8k, voltage noise of the amplifi er
dominates. When the source resistance is above 12k, the
input noise current is the dominant contributor.
Capacitive Loading
The
LT1722/LT1723/LT1724
drive capacitive loads up to
100pF with unity gain. As the capacitive load increases,
both the bandwidth and the phase margin decrease causing
peaking in the frequency response and overshoot in the
transient response. When there is a need to drive a larger
capacitive load, a 25 series resistance assures stability
with any value of load capacitor. A feedback capacitor also
helps to reduce any peaking.
Power Dissipation
The LT1722/LT1723/LT1724 combine high speed and
large output drive in a small package. Maximum junction
temperature (TJ) is calculated from the ambient temperature
(TA), power dissipation per amplifi er (PD) and number of
amplifi ers (n) as follows:
T
J = TA + (n • PDθJA)
D1
D3
+IN
+IN
D4
D5
D6
1723 F01
D2
I1I2
R
Q1
REXT Q2
VS+
VS
IN
–IN
REXT
LT1722/LT1723/LT1724 3! f {KT Fr: L7LJCUEN2
LT1722/LT1723/LT1724
14
172234fb
SIMPLIFIED SCHEMATIC
APPLICATIONS INFORMATION
Power dissipation is composed of two parts. The fi rst is
due to the quiescent supply current and the second is due
to on-chip dissipation caused by the load current.
Worst-case instantaneous power dissipation for a given
resistive load in one amplifi er occurs at the maximum
supply current and when the output voltage is at half of
either supply voltage (or the maximum swing if less than
half supply voltage).
Therefore PD(MAX) in one amplifi er is:
P
D(MAX) = (V+ – V)(IS(MAX)) + (V+/2)2/RL
or
P
D(MAX) = (V+ – V)(IS(MAX)) +
(V+ – VO(MAX))(VO(MAX)/RL)
Example. Worst-case conditions are: both op amps in
the LT1723IS8 are at TA = 85°C, VS = ±5V, RL = 150,
VOUT = 2.5V.
P
D(MAX) = 2 •[(10V)(5.95mA) + (2.5V)2/150] = 203mW
T
J(MAX) = 85°C + (203mW)(190°C/W) = 124°C
which is less than the absolute maximum rating at 150°C.
Circuit Operation
The
LT1722/LT1723/LT1724
circuit topology is a voltage
feedback amplifi er. The operation of the circuit can be
understood by referring to the Simplifi ed Schematic. The
rst stage is a folded cascode formed by the transistors
Q1 through Q4. A degeneration resistor, R, is used in the
input stage. The current mirror Q5, Q6 is bootstrapped
by Q7. The capacitor, C, assures the bandwidth and the
slew rate performance. The output stage is formed by
complementary emitter followers, Q8 through Q11. The
diodes D1 and D2 protect against input reversed biasing.
The remaining part of the circuit assures optimum voltage
and current biases for all stages.
Low noise, reduced current supply, high speed and
DC accurate parameters are distinctive features of the
LT1722/LT1723/LT1724
.
Q2
+IN Q1
D1
D2
R
?–IN
R2
Q6
Q7
Q9
Q10
VS+
VS
OUT
1723 SS
Q11
Q8
Q4
C
VBIAS
I3I4
I5
I2
I1
R1
Q5
Q3
LT1722/LT1723/LT1724 4—; A we 177* @; gfi i E » 1 L7 LJUW
LT1722/LT1723/LT1724
15
172234fb
PACKAGE DESCRIPTION
1.50 – 1.75
(NOTE 4)
2.80 BSC
0.30 – 0.45 TYP
5 PLCS (NOTE 3)
DATUM ‘A’
0.09 – 0.20
(NOTE 3) S5 TSOT-23 0302 REV B
PIN ONE
2.90 BSC
(NOTE 4)
0.95 BSC
1.90 BSC
0.80 0.90
1.00 MAX 0.01 – 0.10
0.20 BSC
0.30 – 0.50 REF
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
3.85 MAX
0.62
MAX
0.95
REF
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
1.4 MIN
2.62 REF
1.22 REF
S5 Package
5-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1635)
LT1722/LT1723/LT1724 nw . 50 Inch) ][|Dfi][fi: TH H H H T LRDDDJ T l ” 7H H H H HHHi H 7% 3%: i DUDE: fig: HHL L HH * 77) Tfifi L7HHW
LT1722/LT1723/LT1724
16
172234fb
MS8 Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660 Rev F)
MSOP (MS8) 0307 REV F
0.53 ± 0.152
(.021 ± .006)
SEATING
PLANE
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.18
(.007)
0.254
(.010)
1.10
(.043)
MAX
0.22 – 0.38
(.009 – .015)
TYP
0.1016 ± 0.0508
(.004 ± .002)
0.86
(.034)
REF
0.65
(.0256)
BSC
0° – 6° TYP
DETAIL “A”
DETAIL “A”
GAUGE PLANE
12
34
4.90 ± 0.152
(.193 ± .006)
8765
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
0.52
(.0205)
REF
5.23
(.206)
MIN
3.20 – 3.45
(.126 .136)
0.889 ± 0.127
(.035 ± .005)
RECOMMENDED SOLDER PAD LAYOUT
0.42 ± 0.038
(.0165 ± .0015)
TYP
0.65
(.0256)
BSC
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.016 – .050
(0.406 – 1.270)
.010 – .020
(0.254 – 0.508)s 45°
0°– 8° TYP
.008 – .010
(0.203 0.254)
SO8 0303
.053 – .069
(1.346 1.752)
.014 – .019
(0.355 – 0.483)
TYP
.004 – .010
(0.101 0.254)
.050
(1.270)
BSC
1234
.150 – .157
(3.810 – 3.988)
NOTE 3
8765
.189 – .197
(4.801 – 5.004)
NOTE 3
.228 – .244
(5.791 – 6.197)
.245
MIN .160 ±.005
RECOMMENDED SOLDER PAD LAYOUT
.045 ±.005
.050 BSC
.030 ±.005
TYP
INCHES
(MILLIMETERS)
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
PACKAGE DESCRIPTION
LT1722/LT1723/LT1724 Hjflmill HHHHHHH gnaw * * ,7H H H H H H H 7:“ 7 7 :LJ H4 Em; HLi J iJLLii T L7 LJUW
LT1722/LT1723/LT1724
17
172234fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PACKAGE DESCRIPTION
S Package
14-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
1
N
234
.150 – .157
(3.810 – 3.988)
NOTE 3
14 13
.337 – .344
(8.560 – 8.738)
NOTE 3
.228 – .244
(5.791 – 6.197)
12 11 10 9
567
N/2
8
.016 – .050
(0.406 – 1.270)
.010 – .020
(0.254 – 0.508)s 45°
0° – 8° TYP
.008 – .010
(0.203 0.254)
S14 0502
.053 – .069
(1.346 – 1.752)
.014 – .019
(0.355 – 0.483)
TYP
.004 – .010
(0.101 0.254)
.050
(1.270)
BSC
.245
MIN
N
1 2 3 N/2
.160 ±.005
RECOMMENDED SOLDER PAD LAYOUT
.045 ±.005
.050 BSC
.030 ±.005
TYP
INCHES
(MILLIMETERS)
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
LT1722/LT1723/LT1724 L7LJCUEN2
LT1722/LT1723/LT1724
18
172234fb
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2002
LT 0909 REV B • PRINTED IN USA
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TYPICAL APPLICATION
PART NUMBER DESCRIPTION COMMENTS
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LT1809/LT1810 Single/Dual, Low Distortion 180MHz Rail-to-Rail Amplifi ers 2.5V Operation, –90dBc at 5MHz Distortion
LT1812/LT1813/LT1814 Single/Dual/Quad, 3mA, 750V/µs Amplifi ers 5V Operation, 3.6mA Supply Current, 40mA Min Output Current
LT6202/LT6203/LT6204 Single/Dual/Quad, 100MHz, Low Noise Rail-to-Rail Op Amps 2nV/Hz, 2.5mA on Single 3V Supply
4- to 2-Wire Local Echo Cancellation Differential Receiver Amplifi er
n:1
(n = 1)
VL
100
LINE
50
50
1k 1k
VR
LINE
RECEIVER
10pF
2k
1k 1k
2k 10pF
1723 TA03
RL
n2
+
+
+
+
VD
LINE
DRIVER
1/2 LT1723
1/2 LT1723
1/2 LT1739
1/2 LT1739

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