FIN1019 Datasheet by ON Semiconductor

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— FAIRCHILD — SEM‘CUNDUCTUHYM ”mgr ‘ r Rmnl‘: y «I: u m (N) '1: :Ium ,u‘ *1qu :i m
© 2001 Fairchild Semiconductor Corporation DS500506 www.fairchildsemi.com
April 2001
Revised September 2001
FIN1019 3.3V LVDS High Speed Differential Driver/Receiver
FIN1019
3.3V LVDS High Speed Differential Driver/Receiver
General Description
This driver and receiver pair are designed for high speed
interconnects utilizing Low Voltage Differential Signaling
(LVDS) technology. The driver translates LVTTL signals to
LVDS levels with a typical differential output swing of
350mV and the receiver translates LVDS signals, with a
typical differential input threshold of 100mV, into LVTTL
levels. LVDS technology provides low EMI at ultra low
power dissipation even at high frequencies. This device is
ideal for high speed clock or data transfer.
Features
Greater than 400Mbs data rate
3.3V power supply operation
0.5ns maximum differential pulse skew
2.5ns maximum propagation delay
Low power dissipation
Power-Off protection
100mV receiver input sensitivity
Fail safe protection open-circuit, shorted and terminated
conditions
Meets or exceeds the TIA/EIA-644 LVDS standard
Flow-through pinout simplifies PCB layout
14-Lead SOIC and TSSOP packages save space
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Function Table
H = HIGH Logic Level L = LOW Logic Level X = Don’t Care
Z = High Impedance Fail Safe = Open, Shorted, Terminated
Connection Diagram
Pin Descriptions
Order Number Package Number Package Description
FIN1019M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
FIN1019MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Inputs Outputs
RIN+RINRE ROUT
LHL L
HLL H
XXH Z
Fail Safe Condition L H
DIN DE DOUT+DOUT
LHLH
HHHL
XLZZ
OpenCircuit or Z H L H
Pin Name Description
DIN LVTTL Data Input
DOUT+Non-inverting LVDS Output
DOUTInverting LVDS Output
DE Driver Enable (LVTTL, Active HIGH)
RIN+Non-Inverting LVDS Input
RINInverting LVDS Input
ROUT LVTTL Receiver Output
RE Receiver Enable (LVTTL, Active LOW)
VCC Power Supply
GND Ground
NC No Connect
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FIN1019
Absolute Maximum Ratings(Note 1) Recommended Operating
Conditions
Note 1: The Absolute Maximum Ratings: are those values beyond which
damage to the device may occur. The databook specifications should be
met, without exception, to ensure that the system design is reliable over its
power supply, temperature and output/input loading variables. Fairchild
does not recommend operation of circuits outside databook specification.
DC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Supply Voltage (VCC)0.5V to +4.6V
LVTTL DC Input Voltage (DIN, DE, RE)0.5V to +6V
LVDS DC Input Voltage (RIN+, RIN)0.5V to 4.7V
LVTTL DC Output Voltage (ROUT)0.5V to +6V
LVDS DC Output Voltage (DOUT+, DOUT)0.5V to 4.7V
LVDS Driver Short Circuit Current (IOSD) Continuous
LVTTL DC Output Current (IO) 16 mA
Storage Temperature Range (TSTG)65°C to +150°C
Max Junction Temperature (TJ)150°C
Lead Temperature (TL)
(Soldering, 10 seconds) 260°C
ESD (Human Body Model) 6500V
ESD (Machine Model) 300V
Supply Voltage (VCC) 3.0V to 3.6V
Input Voltage (VIN) 0 to VCC
Magnitude of Differential Voltage
(|VID|) 100 mV to VCC
Common-Mode Input Voltage (VIC) 0.05V to 2.35V
Operating Temperature (TA)40°C to +85°C
Symbol Parameter Test Conditions Min Typ Max Units
(Note 2)
LVDS Differential Driver Characteristics
VOD Output Differential Voltage 250 350 450 mV
VOD VOD Magnitude Change from 25 mV
Differential LOW-to-HIGH RL = 100, See Figure 1
VOS Offset Voltage 1.125 1.25 1.375 V
VOS Offset Magnitude Change from 25 mV
Differential LOW-to-HIGH
IOZD Disabled Output Leakage Current VOUT = VCC or GND, DE = 0V ±20 µA
IOFF Power Off Output Current VCC = 0V, VOUT = 0V or 3.6V ±20 µA
IOS Short Circuit Output Current VOUT = 0V, DE = VCC 8mA
VOD = 0V, DE = VCC ±8
LVTTL Driver Characteristics
VOH Output HIGH Voltage IOH = 100 µA, RE = 0V, VCC 0.2
V
See Figure 6 and Table 1
IOH = 8 mA, RE = 0V, VID = 400 mV 2.4
VID = 400 mV, VIC = 1.2V, see Figure 6
VOL Output LOW Voltage IOL = 100 µA, RE = 0V, VID = 400 mV 0.2
V
See Figure 6 and Table 1
IOL = 8 mA, RE = 0V, VID = 400 mV 0.5
VID = 400 mV, VIC = 1.2V, see Figure 6
IOZ Disabled Output Leakage Current VOUT = VCC or GND, RE = VCC ±20 µA
LVDS Receiver Characteristics
VTH Differential Input Threshold HIGH See Figure 6 and Table 1 100 mV
VTL Differential Input Threshold LOW See Figure 6 and Table 1 100 mV
IIN Input Current VIN = 0V or VCC ±20 µA
II(OFF) Power-OFF Input Current VCC = 0V, VIN = 0V or 3.6V ±20 µA
LVTTL Driver and Control Signals Characteristics
VIH Input HIGH Voltage 2.0 VCC V
VIL Input LOW Voltage GND 0.8 V
IIN Input Current VIN = 0V or VCC ±20 µA
II(OFF) Power-OFF Input Current VCC = 0V, VIN = 0V or 3.6V ±20 µA
VIK Input Clamp Voltage IIK = 18 mA 1.5 V
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FIN1019
DC Electrical Characteristics (Continued)
Note 2: All typical values are at TA = 25°C and with VCC = 3.3V.
AC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Note 3: All typical values are at TA = 25°C and with VCC = 5V.
Note 4: tSK(PP) is the magnitude of the difference in propagation delay times between any specified terminals of two devices switching in the same direction
(either LOW-to-HIGH or HIGH-to-LOW) when both devices operate with the same supply voltage, same temperature, and have identical test circuits.
Device Characteristics
ICC Power Supply Current Driver Enabled, Driver Load: RL = 100 12.5 mA
Receiver Disabled, No Receiver Load
Driver Enabled, Driver Load: RL = 100 ,
12.5 mAReceiver Enabled, (RIN+ = 1V and RIN = 1.4V)
or (RIN+ = 1.4V and ROUT = 1V)
Driver Disabled, Receiver Enabled,
7.0 mA(RIN+ = 1V and RIN = 1.4V) or
(RIN+ = 1.4V and RIN = 1V)
Driver Disabled, Receiver Disabled 7.0 mA
CIN Input Capacitance Any LVTTL or LVDS Input 4 pF
COUT Output Capacitance Any LVTTL or LVDS Output 6 pF
Symbol Parameter Test Conditions Min Typ Max Units
(Note 3)
Driver Timing Characteristics
tPLHD Differential Propagation Delay 0.5 1.5 ns
LOW-to-HIGH
tPHLD Differential Propagation Delay 0.5 1.5 ns
HIGH-to-LOW RL = 100 , CL = 10 pF,
tTLHD Differential Output Rise Time (20% to 80%) See Figure 2 and Figure 3 0.4 1.0 ns
tTHLD Differential Output Fall Time (80% to 20%) 0.4 1.0 ns
tSK(P) Pulse Skew |tPLH - tPHL|0.5 ns
tSK(PP) Part-to-Part Skew (Note 4) 1.0 ns
tZHD Differential Output Enable Time from Z to HIGH RL = 100, CL = 10 pF, 5.0 ns
tZLD Differential Output Enable Time from Z to LOW See Figure 4 and Figure 5 5.0 ns
tHZD Differential Output Disable Time from HIGH to Z 5.0 ns
tLZD Differential Output Disable Time from LOW to Z 5.0 ns
Receiver Timing Characteristics
tPLH Propagation Delay LOW-to-HIGH 0.9 2.5 ns
tPHL Propagation Delay HIGH-to-LOW 0.9 2.5 ns
tTLH Output Rise time (20% to 80%) |VID| = 400 mV, CL = 10 pF, 0.5 ns
tTHL Output Fall time (80% to 20%) See Figure 6 and Figure 7 0.5 ns
tSK(P) Pulse Skew | tPLH - tPHL | 0.5 ns
tSK(PP) Part-to-Part Skew (Note 4) 1.0 ns
tZH LVTTL Output Enable Time from Z to HIGH 5.0 ns
tZL LVTTL Output Enable Time from Z to LOW RL = 500 , CL = 10 pF, 5.0 ns
tHZ LVTTL Output Disable Time from HIGH to Z See Figure 8 5.0 ns
tLZ LVTTL Output Disable Time from LOW to Z 5.0 ns
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FIN1019
FIGURE 1. Differential Driver DC Test Circuit
Note A: Input pulses have frequency = 10 MHz, tR or tF = 2 ns
Note B: CL includes all probe and fixture capacitances
FIGURE 2. Differential Driver Propagation Delay and
Transition Time Test Circuit
FIGURE 3. AC Waveforms for Differential Driver
Note B: Input pulses have the frequency = 10 MHz, tR or tF = 2 ns
Note A: CL includes all probe and fixture capacitances
FIGURE 4. Differential Driver Enable and
Disable Test Circuit
FIGURE 5. Enable and Disable AC Waveforms
Inputs (Noxe A) R‘N- W \v‘cwwwayz .5 \ J_ -
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FIN1019
Note A: Input pulses have frequency = 10 MHz, tR or tF = 1ns
Note B: CL includes all probe and fixture capacitance
FIGURE 6. Differential Receiver Voltage Definitions and Propagation Delay and Transition Time Test Circuit
TABLE 1. Receiver Minimum and Maximum Input Threshold Test Voltages
Applied Voltages (V) Resulting Differential Resulting Common Mode
Input Voltage (mV) Input Voltage (V)
VIA VIB VID VIC
1.25 1.15 100 1.2
1.15 1.25 100 1.2
2.4 2.3 100 2.35
2.3 2.4 100 2.35
0.1 0 100 0.05
00.1 100 0.05
1.5 0.9 600 1.2
0.9 1.5 600 1.2
2.4 1.8 600 2.1
1.8 2.4 600 2.1
0.6 0 600 0.3
00.6 600 0.3
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FIN1019
FIGURE 7. LVDS Input to LVTTL Output AC Waveforms
Test Circuit for LVTTL Outputs
Voltage Waveforms Enable and Disable Times
FIGURE 8. LVTTL Outputs Test Circuit and AC Waveforms
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FIN1019
DC / AC Typical Performance Curves
Drivers
FIGURE 9. Output High Voltage vs.
Power Supply Voltage
FIGURE 10. Output Low Voltage vs.
Power Supply Voltage
FIGURE 11. Output Short Circuit Current vs.
Power Supply Voltage FIGURE 12. Differential Output Voltage vs.
Power Supply Voltage
FIGURE 13. Differential Output Voltage vs.
Load Resistor FIGURE 14. Offset Voltage vs.
Power Supply Voltage
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FIN1019
DC / AC Typical Performance Curves (Continued)
FIGURE 15. Power Supply Current vs.
Frequency FIGURE 16. Power Supply Current vs.
Power Supply Voltage
FIGURE 17. Power Supply Current vs.
Ambient Temperature FIGURE 18. Differential Propagation Delay vs.
Power Supply
FIGURE 19. Differential Propagation Delay vs.
Ambient Temperature FIGURE 20. Differential Skew (tPLH - tPHL) vs.
Power Supply Voltage
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FIN1019
DC / AC Typical Performance Curves (Continued)
FIGURE 21. Differential Pulse Skew (tPLH - tPHL) vs.
Ambient Temperature FIGURE 22. Transition Time vs.
Power Supply Voltage
FIGURE 23. Transition Times vs.
Ambient Temperature
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FIN1019
DC / AC Typical Performance Curves
Receiver
FIGURE 24. Output High Voltage vs.
Power Supply Voltage FIGURE 25. Output Low Voltage vs.
Power Supply Voltage
FIGURE 26. Output Short Circuit Current vs.
Power Supply Voltage FIGURE 27. Power Supply Current vs.
Frequency
FIGURE 28. Power Supply Current vs.
Power Supply Voltage FIGURE 29. Power Supply Current vs.
Ambient Temperature
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FIN1019
DC / AC Typical Performance Curves (Continued)
FIGURE 30. Differential Propagation Delay vs.
Power Supply Voltage FIGURE 31. Differential Propagation Delay vs.
Ambient Temperature
FIGURE 32. Differential Skew (tPHL - tPHL) vs.
Power Supply Voltage FIGURE 33. Differential Skew (tPLH - tPHL) vs.
Ambient Temperature
FIGURE 34. Differential Propagation Delay vs.
Differential Input Voltage
FIGURE 35. Differential Propagation Delay vs.
Common-Mode Voltage
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FIN1019
DC / AC Typical Performance Curves (Continued)
FIGURE 36. Transition Time vs.
Power Supply Voltage FIGURE 37. Transition Time vs.
Ambient Temperature
FIGURE 38. Differential Propagation Delay vs.
Load FIGURE 39. Transition Time vs.
Load
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FIN1019
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M14A
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FIN1019 3.3V LVDS High Speed Differential Driver/Receiver
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC14
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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