ADM705-708 Datasheet by Analog Devices Inc.

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ANALOG DEVICES
Low Cost Microprocessor
Supervisory Circuits
Data Sheet ADM705/ADM706/ADM707/ADM708
Rev. H Document Feedback
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FEATURES
Guaranteed RESET valid with VCC = 1 V
190 μA quiescent current
Precision supply voltage monitor
4.65 V (ADM705/ADM707)
4.40 V (ADM706/ADM708)
200 ms reset pulse width
Debounced TTL/CMOS manual reset input (MR)
Independent watchdog timer (ADM705/ADM706)
1.60 sec timeout (ADM705/ADM706)
Active high reset output (ADM707/ADM708)
Voltage monitor for power fail or low battery warning
Superior upgrade for MAX705 to MAX708
APPLICATIONS
Microprocessor systems
Computers
Controllers
Intelligent instruments
Critical microprocessor supply monitoring
FUNCTIONAL BLOCK DIAGRAMS
WATCHDOG
TRANSITION
DETECTOR
WATCHDOG
INPUT (WDI)
POWER-FAIL
INPUT (PFI) POWER-FAIL
OUTPUT (PFO)
WATCHDOG
OUTPUT (WDO)
RESET
*VOLTAGE REFERENCE = 4.65V (ADM705), 4.40V (ADM706)
ADM705/
ADM706
RESET AND
WATCHDOG
TIMEBASE
RESET
GENERATOR
MR
V
CC
250μA
V
CC
WATCHDOG
TIMER
4.65V*
1.25V
00088-001
Figure 1. ADM705/ADM706
1.25V
POWER-FAIL
INPUT (PFI)
RESET
* VOLTAGE REFERENCE = 4.65V (ADM707), 4.40V (ADM708)
ADM707/
ADM708
RESET
GENERATOR
MR
V
CC
250μA
V
CC
RESET
00088-002
4.65V*
POWER-FAIL
OUTPUT (PFO)
Figure 2. ADM707/ADM708
GENERAL DESCRIPTION
The ADM705/ADM706/ADM707/ADM708 microprocessor
supervisory circuits are suitable for monitoring 5 V power
supplies/batteries and microprocessor activity.
The ADM705/ADM706 provide power-supply monitoring
circuitry that generate a reset output during power-up, power-
down, and brownout conditions. The reset output remains
operational with VCC as low as 1 V. Independent watchdog
monitoring circuitry is also provided. This is activated if the
watchdog input has not been toggled within 1.60 sec.
In addition, there is a 1.25 V threshold detector to warn of
power failures, to detect low battery conditions, or to monitor an
additional power supply. An active low, debounced manual reset
input (MR) is also included.
The ADM705 and ADM706 are identical except for the reset
threshold monitor levels, which are 4.65 V and 4.40 V, respectively.
The ADM707 and ADM708 provide a similar functionality to
the ADM705 and ADM706 and only differ in that a watchdog
timer function is not available. Instead, an active high reset
output (RESET) is available as well as the active low reset output
(RESET). The ADM707 and ADM708 are identical except for
the reset threshold monitor levels, which are 4.65 V and 4.40 V,
respectively.
All devices are available in narrow 8-lead PDIP and 8-lead SOIC
packages.
RES]; 1‘ RESE 1‘
ADM705/ADM706/ADM707/ADM708 Data Sheet
Rev. H | Page 2 of 12
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagrams ............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 4
ESD Caution .................................................................................. 4
Pin Configurations and Function Descriptions ........................... 5
Typical Performance Characteristics ............................................. 6
Circuit Information .......................................................................... 8
Power Fail RESET Output ............................................................8
Manual Reset ..................................................................................8
Watchdog Timer (ADM705/ADM706) .....................................8
Power Fail Comparator .................................................................8
Valid RESET Below 1 V VCC ........................................................9
Applications Information .............................................................. 10
Monitoring Additional Supply Levels ...................................... 10
Microprocessor with Bidirectional RESET ............................. 10
Outline Dimensions ....................................................................... 11
Ordering Guide .......................................................................... 12
REVISION HISTORY
1/16—Rev. G to Rev. H
Changes to Table 3 ............................................................................ 5
Changes to Power Fail Comparator Section and Figure 15 ........ 8
Changes to Figure 16 ........................................................................ 9
Changes to Figure 18 and Figure 20 ............................................. 10
Updated Outline Dimensions ....................................................... 12
Changes to Ordering Guide .......................................................... 12
3/08Rev. F to Rev. G
Changes to Applications .................................................................. 1
Changes to Table 2 ............................................................................ 4
Changes to Figure 9 .......................................................................... 6
Changes to Figure 10, Figure 11, and Figure 12 ........................... 7
Changes to Figure 14 ........................................................................ 8
Changes to Ordering Guide .......................................................... 12
2/07Rev. E to Rev. F
Updated Format .................................................................. Universal
Changes to Watchdog Timeout Period .......................................... 3
Replaced Pin Configurations and Function Descriptions Section .. 5
7/06Rev. D to Rev. E
Added RM-8 (MSOP) Package ......................................... Universal
Changes to Table 2 ............................................................................. 4
Updated Outline Dimensions ....................................................... 12
Changes to Ordering Guide .......................................................... 12
11/05Rev. C to Rev. D
Updated Format .................................................................. Universal
Deleted Figure 2 ................................................................................. 4
Updated Outline Dimensions ....................................................... 11
Changes to Ordering Guide .......................................................... 12
8/02Rev. B to Rev. C
Removed RM-8 (µSOIC) Package .................................... Universal
Updated N-8 and R-8 Packages ....................................................... 8
Table L RESET WDO E‘Elgw x x PFO
Data Sheet ADM705/ADM706/ADM707/ADM708
Rev. H | Page 3 of 12
SPECIFICATIONS
VCC = 4.75 V to 5.5 V, TA = TMIN to TMAX, unless otherwise noted.
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
POWER SUPPLY
VCC Operating Voltage Range 1.0 5.5 V
Supply Current 190 250 µA
LOGIC OUTPUT
Reset Threshold 4.5 4.65 4.75 V ADM705/ADM707
4.25
4.40
4.50
V
ADM706/ADM708
Reset Threshold Hysteresis 40 mV
RESET PULSE WIDTH 160 200 280 ms
RESET OUTPUT VOLTAGE
VCC1.5 V ISOURCE = 800 µA
0.4 V ISINK = 3.2 mA
0.3 V VCC = 1 V, ISINK = 50 µA
0.3 V VCC = 1.2 V, ISINK = 100 µA
RESET OUTPUT VOLTAGE VCC1.5 V ADM707/ADM708, ISOURCE = 800 µA
0.4 V ADM707/ADM708, ISINK = 1.2 mA
WATCHDOG TIMEOUT PERIOD (tWD) 1.00 1.60 2.25 sec VIL = 0.4 V, VIH = VCC × 0.8, WDI = VCC
WDI Pulse Width (tWP)
50 ns
WATCHDOG INPUT
WDI Input Threshold
Logic Low 0.8 V
Logic High 3.5 V
WDI Input Current 50 150 µA WDI = 0 V
150 −50 µA WDI = 0 V
WDO OUTPUT VOLTAGE
VCC1.5 V ISOURCE = 800 µA
0.4 V ISINK = 1.2 mA
MANUAL RESET INPUT
MR Pull-Up Current
100 250 600 µA MR = 0 V
MR Pulse Width 150 ns
MR INPUT THRESHOLD
Logic Low 0.8
V
Logic High 2.0 V
MR TO RESET OUTPUT DELAY 250 ns
POWER FAIL INPUT
PFI Input Threshold 1.2 1.25 1.3 V
PFI Input Current 25 +0.01 +25 nA
PFO OUTPUT VOLTAGE VCC1.5 V ISOURCE = 800 µA
0.4
V
I
SINK
= 3.2 mA
ESD CAUTION A M ESD (elenroskatic discharge) sensmve device. Charged dewces and mum boavds can dlschavge wnhoux dexecuon Akhough um produu feamve: patemed 0v pvopnemy pvotemon wcmuy, damage may occur on dewces xumeued m mgh energy ESD, Thevehve, pvopev ESD pvecauuons Would be \aken m mm performante degradanon m ‘05; a! funcmnamy
ADM705/ADM706/ADM707/ADM708 Data Sheet
Rev. H | Page 4 of 12
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 2.
Parameter Rating
VCC −0.3 V to +6 V
All Other Inputs −0.3 V to VCC + 0.3 V
Input Current
VCC 20 mA
GND 20 mA
Digital Output Current 20 mA
Power Dissipation, N-8 PDIP
727 mW
θJA Thermal Impedance 135°C/W
Power Dissipation, R-8 SOIC 470 mW
θJA Thermal Impedance 110°C/W
Power Dissipation, RM-8 MSOP 900 mW
θJA Thermal Impedance 206°C/W
Operating Temperature Range
Industrial (Version A) −40°C to +85°C
Lead Temperature (Soldering, 10 sec) 300°C
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C
Storage Temperature Range −65°C to +150°C
ESD Rating >4.5 kV
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
j_l__l_j CECE npuL PFI ei‘her ive Mg ic
Data Sheet ADM705/ADM706/ADM707/ADM708
Rev. H | Page 5 of 12
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
RESET
ADM705/
ADM706
TOP VIEW
(Not to Scale)
1
2
3
45
8
7
6
00088-003
MR
PFO
WDI
WDO
V
CC
GND
PFI
Figure 3. ADM705/ADM706 PDIP/SOIC
Pin Configuration
RESET
ADM707/
ADM708
TOP VIEW
(Not to Scale)
1
2
3
4 5
8
7
6
00088-004
MR
PFO
NC
V
CC
GND
PFI
NC = NO CONNECT
RESET
Figure 4. ADM707/ADM708 PDIP/SOIC
Pin Configuration
PFO
ADM708
TOP VIEW
(Not to Scale)
1
2
3
45
8
7
6
00088-005
RESET
GND
PFI
NC
RESET
MR
V
CC
NC = NO CONNECT
Figure 5. ADM708 MSOP
Pin Configuration
Table 3. Pin Function Descriptions
Mnemonic
Pin Number
Description
ADM705/
ADM706
(PDIP, SOIC)
ADM707/
ADM708
(PDIP, SOIC)
ADM708
(MSOP)
MR 1 1 3 Manual Reset Input. When this pin is taken below 0.8 V, a reset is generated. MR can be
driven from TTL, CMOS logic, or from a manual reset switch as it is internally debounced.
An internal 250 μA pull-up current holds the input high when floating.
VCC 2 2 4 5 V Power Supply Input. Place a 0.1 μF decoupling capacitor between the VCC and GND pins.
GND 3 3 5 0 V Ground Reference for All Signals.
PFI 4 4 6 Power Fail Input. PFI is the noninverting input to the power fail comparator. When PFI is
less than 1.25 V, PFO goes low. If unused, PFI must be connected to GND.
PFO 5 5 7 Power Fail Output. PFO is the output from the power fail comparator. It goes low when
PFI is less than 1.25 V.
WDI 6 Not
applicable
Not
applicable
Watchdog Input. WDI is a three-level input. If WDI remains either high or low for longer
than the watchdog timeout period, the watchdog output (WDO) goes low. The timer
resets with each transition at the WDI input. Either a high to low or a low to high transition
clears the counter. The internal timer is also cleared whenever reset is asserted. The
watchdog timer is disabled when WDI is left floating or connected to a three-state buffer.
NC Not
applicable
6 8 No Connect.
RESET 7 7 1 Logic Output. RESET goes low for 200 ms when triggered. It can be triggered either by
VCC being below the reset threshold or by a low signal on the manual reset input (MR).
RESET remains low whenever VCC is below the reset threshold (4.65 V in ADM705/ADM707,
4.40 V in ADM706/ADM708). It remains low for 200 ms after VCC goes above the reset
threshold or MR goes from low to high. A watchdog timeout does not trigger RESET unless
WDO is connected to MR.
WDO 8 Not
applicable
Not
applicable
Watchdog Output. WDO remains low until the watchdog timer is cleared. WDO also
goes low during low line conditions. Whenever VCC is below the reset threshold, WDO
goes low if the internal WDO remains low. As soon as VCC goes above the reset threshold,
WDO goes high.
RESET Not
applicable
8 2 Logic Output. RESET is an active high output suitable for systems that use active high
reset logic. It is the inverse of RESET.
ADM705/ADM706/ADM707/ADM708 Data Sheet
Rev. H | Page 6 of 12
TYPICAL PERFORMANCE CHARACTERISTICS
10
0%
100
90
1V
4.50VA1
1V
RESET
00088-012
500msHO
VCC
Figure 6. RESET Output Voltage vs. Supply Voltage
100
500msH
O
1V
4.50VA1
1V
V
CC
RESET
00088-013
90
10
0%
Figure 7. ADM707/ADM708 RESET Output Voltage vs. Supply Voltage
1.2V
0V
5V
1.3V
PFI
PFO
V
CC
= 5V
T
A
= 25°C
00088-014
500ns/DIV
Figure 8. PFI Comparator Assertion Response Time
1.3V
4.4V
0V
1.2V
PFO
PFI
00088-015
500ns/DIV
V
CC
= 5V
T
A
= 25°C
Figure 9. PFI Comparator Deassertion Response Time
5V
0V
5V
0V
00088-016
100ns/DIV
RESET RESET
V
CC
= V
RT
T
A
= 25°C
Figure 10. RESET, RESET Assertion
5V
0V
5V
0V
RESET
00088-017
100ns/DIV
RESET
V
CC
= V
RT
T
A
= 25°C
Figure 11. RESET, RESET Deassertion
RiESET
Data Sheet ADM705/ADM706/ADM707/ADM708
Rev. H | Page 7 of 12
4V
V
CC
5V
0V
5V
RESET
T
A
= 25°C
2μs/DIV
00088-018
Figure 12. ADM705/ADM707 RESET Response Time
INFORM FAIL RESET r mpply puwemp, 111: RE " ‘ In addiuun to RES}; 1‘ u avmlab MR cuvc The MR led ilhm the tumout penud ( watchdog output (wuo wpo RESET soul WDO htghtuluw RESET going 10 Rhsh’t‘ \wo whether or not the watchdog tuner has timed out. Norm RESET watchd \wo t+tt¢ le t..- «a» m \ t t \ mug MR on the cumpamtur output (PFO nput PFC) recumm ml mpur
ADM705/ADM706/ADM707/ADM708 Data Sheet
Rev. H | Page 8 of 12
CIRCUIT INFORMATION
POWER FAIL RESET OUTPUT
RESET is an active low output that provides a reset signal to
the microprocessor whenever the VCC input is below the reset
threshold. An internal timer holds RESET low for 200 ms after
the voltage on VCC rises above the threshold. This functions as a
power-on reset signal for the microprocessor. It allows time for
both the power supply and the microprocessor to stabilize after
power-up. The RESET output is guaranteed to remain valid (low)
with VCC as low as 1 V. This ensures that the microprocessor is
held in a stable shutdown condition as the power supply voltage
ramps up.
In addition to RESET, an active high RESET output is also available
on the ADM707/ADM708. This is the complement of RESET
and is useful for processors requiring an active high reset signal.
MANUAL RESET
The manual reset input (MR) allows other reset sources, such as
a manual reset switch, to generate a processor reset. The input is
effectively debounced by the timeout period (200 ms typically).
The MR input is TTL-/CMOS-compatible, so it can also be driven
by any logic reset output.
Figure 13. RESET, MR, and WDO Timing
WATCHDOG TIMER (ADM705/ADM706)
The watchdog timer circuit can monitor the activity of the micro-
processor to check that it is not stalled in an indefinite loop. An
output line on the processor toggles the watchdog input (WDI)
line. If this line is not toggled within the timeout period (1.60 sec),
then the watchdog output (WDO) goes low. The WDO can be
connected to a nonmaskable interrupt (NMI) on the processor;
therefore, if the watchdog timer times out, an interrupt is gen-
erated. The interrupt service routine then rectifies the problem.
If a RESET signal is required when a timeout occurs, the WDO
must connect to the manual reset input (MR).
The watchdog timer is cleared by either a high to low or a low to
high transition on WDI. It is also cleared by RESET going low;
therefore, the watchdog timeout period begins after RESET
goes high.
When VCC falls below the reset threshold, WDO is forced low,
whether or not the watchdog timer has timed out. Normally, this
generates an interrupt, but it is overridden by RESET going low.
The watchdog monitor can be deactivated by floating the WDI.
The WDO can then be used as a low line output because it goes
low only when VCC falls below the reset threshold.
t
WP
WDI
WDO
RESET
t
RS
RESET EXTERNALLY
TRIGGERED BY MR
t
WD
t
WD
t
WD
00088-008
Figure 14. Watchdog Timing
POWER FAIL COMPARATOR
The power fail comparator is an independent comparator that
can monitor the input power supply. The comparator inverting
input is internally connected to a 1.25 V reference voltage. The
noninverting input is available at the PFI input. This input can
monitor the input power supply via a resistive divider network.
When the voltage on the PFI input drops below 1.25 V, t h e
comparator output (PFO) goes low, indicating a power failure. For
early warning of power failure, the comparator monitors the
preregulator input by choosing an appropriate resistive divider
network. The PFO output can interrupt the processor so a
shutdown procedure is implemented before power is lost.
As the voltage on the PFI pin is limited to VCC + 0.3 V, i t i s
recommended to connect the PFI pin with a Schottky diode to
the RESET pin as shown in Figure 15. This helps clamping the
PFI pin voltage during device power up and operation.
INPUT
POWER
R1
R2
POWER-FAIL
INPUT
1.25V
PFI
PFO POWER-FAIL
OUTPUT
ADM705/ADM706/
ADM707/ADM708
00088-009
RESET
OUTPUT
RESET
Figure 15. Power Fail Comparator
Data Sheet ADM705/ADM706/ADM707/ADM708
Rev. H | Page 9 of 12
Adding Hysteresis to the Power Fail Comparator
For increased noise immunity, hysteresis can be added to the
power fail comparator. Because the comparator circuit is
noninverting, hysteresis can be added by connecting a resistor
between the PFO output and the PFI input as shown in Figure 16.
7
V
TO 15V
INPUT
POWER
TO
MICROPROCESSOR
NMI
R3
5V
V
CC
R1
R2
1.25V
PFI
PFO
ADP3367
5V
0V 0V V
L
V
IN
V
H
+
00088-010
PFO
ADM705/ADM706/
ADM707/ADM708
RESET
TO
MICROPROCESSOR
RESET
Figure 16. Adding Hysteresis to the Power Fail Comparator
When PFO is low, Resistor R3 sinks current from the summing
junction at the PFI pin. When PFO is high, Resistor R3 sources
current into the PFI summing junction. This results in differing
trip levels for the comparator. Further noise immunity can be
achieved by connecting a capacitor between PFI and GND. The
equations calculate the hysteresis are as follows:
R1
R3R2
R3R2
VH125.1
R3
V
R2
R1V CC
L
25.1
25.1
25.1
R2
R2R1
VMID 25.1
VALID RESET BELOW 1 V VCC
The ADM705/ADM706/ADM707/ADM708 are guaranteed to
provide a valid reset level with VCC as low as 1 V (see the Typical
Performance Characteristics section). As VCC drops below 1 V,
the internal transistor does not have sufficient drive to hold the
voltage RESET at 0 V. A pull-down resistor can connect externally,
as shown in Figure 17, to hold the line low if required.
ADM705/ADM706/
ADM707/ADM708
GND
RESET
R1
00088-011
Figure 17. RESET Valid Below 1 V
ADM705/ADM706/ADM707/ADM708 Data Sheet
Rev. H | Page 10 of 12
APPLICATIONS INFORMATION
A typical application circuit is shown in Figure 18. The un-
regulated dc input supply is monitored using PFI via the resistive
divider network. Resistor R1 and Resistor R2 must be selected
so when the supply voltage drops below the desired level (such
as 8 V), the voltage on PFI drops below the 1.25 V threshold,
thereby generating an interrupt to the microprocessor. Monitoring
the preregulator input provides additional time to execute an
orderly shutdown procedure before power is lost.
7V
TO 15V
INPUT
POWER
MICROPROCESSOR
5
V
V
CC
R1
R2
1.25V
PFI
PFO
ADP3367
+
00088-020
RESET
INTERRUPT
RESET
ADM705/ADM706/
ADM707/ADM708
Figure 18. Typical Application Circuit
Microprocessor activity is monitored using WDI. This is driven
using an output line from the processor. The software routines
toggle this line at least once every 1.60 seconds. If a problem occurs
and this line is not toggled, WDO goes low and a nonmaskable
interrupt is generated. This interrupt routine can clear the problem.
If, in the event of inactivity on the WDI line, a system reset is
required, WDO must connect to MR as shown in Figure 19.
ADM705/
ADM706
RESET
GND
I/O LINE
MICROPROCESSOR
MR
WDI
WDO
RESET
00088-021
Figure 19. RESET From WDO
MONITORING ADDITIONAL SUPPLY LEVELS
It is possible to use the power fail comparator to monitor a
second supply as shown in Figure 20. The two sensing resistors,
R1 and R2, are selected so the voltage on PFI drops below 1.25 V at
the minimum acceptable input supply. PFO can connect to MR so
a reset is generated when the supply drops out of tolerance. In
this case, if either supply drops out of tolerance, a reset is generated.
ADM705/
ADM706
RESET
GND
MR
PFI
PFO
RESET
V
CC
R1
R2
V
X
5V
00088-022
MICROPROCESSOR
Figure 20. Monitoring 5 V and an Additional Supply, VX
MICROPROCESSOR WITH BIDIRECTIONAL RESET
To prevent contention for microprocessors with a bidirectional
reset line, a current limiting resistor must be inserted between
the ADM705/ADM706/ADM707/ADM708 RESET output pin
and the microprocessor RESET pin. This limits the current to a
safe level if there are conflicting output reset levels. A suitable
resistor value is 4.7 kΩ. If the reset output is required for other
uses, it must be buffered, as shown in Figure 21.
ADM70x
RESET
GND
RESET
GND
BUFFERED
RESET
5V
VCC
00088-023
MICROPROCESSOR
Figure 21. Bidirectional Input/Output RESET
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Data Sheet ADM705/ADM706/ADM707/ADM708
Rev. H | Page 11 of 12
OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MS-001-BA
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
SEATING
PLANE
0.015
(0.38)
MIN
0.210
(5.33)
MAX
PIN 1
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
8
14
5
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.100 (2.54)
BSC
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
0.060 (1.52)
MAX
0.430 (10.92)
MAX
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
PLANE
0.005 (0.13)
MIN
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 22. 8-Lead Plastic Dual-in-Line Package [PDIP]
Narrow Body
(N-8)
Dimensions shown in inches and (millimeters)
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099) × 45°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
41
8 5
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2440)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AA
Figure 23. 8-Lead Standard Small Outline Package [SOIC_N]
(R-8)
Dimensions shown in millimeters and (inches)
monnm 5 Analug nuim, Inn All my“; Itsevvedv Tvidemivks and ANALOG DEVICES www.ana|ug.cnm
ADM705/ADM706/ADM707/ADM708 Data Sheet
Rev. H | Page 12 of 12
COMPLIANT TO JEDEC STANDARDS MO-187-AA
0.80
0.55
0.40
4
8
1
5
0.65 BSC
0.40
0.25
1.10 MAX
3.20
3.00
2.80
COPLANARITY
0.10
0.23
0.09
3.20
3.00
2.80
5.15
4.90
4.65
PIN 1
IDENTIFIER
15° MAX
0.95
0.85
0.75
0.15
0.05
10-07-2009-B
Figure 24. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
ORDERING GUIDE
Model1 Temperature Range Package Description Package Option Branding
ADM705AN −40°C to +85°C 8-Lead Plastic Dual-in-Line Package [PDIP] N-8
ADM705ANZ −40°C to +85°C 8-Lead Plastic Dual-in-Line Package [PDIP] N-8
ADM705AR −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
ADM705ARREEL −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
ADM705ARREEL7 −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
ADM705ARZ −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
ADM705ARZREEL −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
ADM705ARZREEL7 −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
ADM706ANZ
−40°C to +85°C
8-Lead Plastic Dual-in-Line Package [PDIP]
N-8
ADM706AR −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
ADM706AR-REEL −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
ADM706AR-REEL7 −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
ADM706ARZ −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
ADM706ARZ-REEL
−40°C to +85°C
8-Lead Standard Small Outline Package [SOIC_N]
R-8
ADM706ARZ-REEL7 −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
ADM707ANZ −40°C to +85°C 8-Lead Plastic Dual-in-Line Package [PDIP] N-8
ADM707AR −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
ADM707AR-REEL −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
ADM707ARZ −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
ADM707ARZ-REEL −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
ADM708ANZ −40°C to +85°C 8-Lead Plastic Dual-in-Line Package [PDIP] N-8
ADM708AR −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
ADM708AR-REEL −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
ADM708ARZ −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
ADM708ARZ-REEL −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
ADM708ARMZ 40°C to +85°C 8-Lead Mini Small Outline Package [MSOP] RM-8 M8F
ADM708ARMZ-REEL −40°C to +85°C 8-Lead Mini Small Outline Package [MSOP] RM-8 M8F
1 Z = RoHS Compliant Part.
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registered trademarks are the property of their respective owners.
D00088-0-1/16(H)

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