MCP73833,4 Datasheet by Microchip Technology

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Q ‘MICROCHIP MCP73833/4
© 2009 Microchip Technology Inc. DS22005B-page 1
MCP73833/4
Features
Complete Linear Charge Management Controller
- Integrated Pass Transistor
- Integrated Current Sense
- Integrated Reverse Discharge Protection
Constant Current / Constant Voltage Operation
with Thermal Regulation
High Accuracy Preset Voltage Regulation:
- 4.2V, 4.35V, 4.4V, or 4.5V, + 0.75%
Programmable Charge Current: 1A Maximum
Preconditioning of Deeply Depleted Cells
- Selectable Current Ratio
- Selectable Voltage Threshold
Automatic End-of-Charge Control
- Selectable Current Threshold
- Selectable Safety Time Period
Automatic Recharge
- Selectable Voltage Threshold
Two Charge Status Outputs
Cell Temperature Monitor
Low-Dropout Linear Regulator Mode
Automatic Power-Down when Input Power
Removed
Under Voltage Lockout
Numerous Selectable Options Available for a
Variety of Applications:
- Refer to Section 1.0 “Electrical
Characteristics” for Selectable Options
- Refer to the Product Identification System for
Standard Options
Available Packages:
- DFN-10 (3 mm x 3 mm)
- MSOP-10
Applications
Lithium-Ion / Lithium-Polymer Battery Chargers
Personal Data Assistants
Cellular Telephones
Digital Cameras
MP3 Players
Bluetooth Headsets
USB Chargers
Description
The MCP73833/4 is a highly advanced linear charge
management controller for use in space-limited, cost
sensitive applications. The MCP73833/4 is available in
a 10-Lead, 3 mm x 3 mm DFN package or a 10-Lead,
MSOP package. Along with its small physical size, the
low number of external components required makes
the MCP73833/4 ideally suited for portable
applications. For applications charging from a USB
port, the MCP73833/4 can adhere to all the
specifications governing the USB power bus.
The MCP73833/4 employs a constant current/constant
voltage charge algorithm with selectable precondition-
ing and charge termination. The constant voltage
regulation is fixed with four available options: 4.20V,
4.35V, 4.40V, or 4.50V, to accomodate new, emerging
battery charging requirements. The constant current
value is set with one external resistor. The MCP73833/
4 limits the charge current based on die temperature
during high power or high ambient conditions. This
thermal regulation optimizes the charge cycle time
while maintaining device reliability.
Several options are available for the preconditioning
threshold, preconditioning current value, charge
termination value, and automatic recharge threshold.
The preconditioning value and charge termination
value are set as a ratio, or percentage, of the
programmed constant current value. Preconditioning
can be set to 100%. Refer to Section 1.0 “Electrical
Characteristics” for available options and the
“Product Indentification System” for standard
options.
The MCP73833/4 is fully specified over the ambient
temperature range of -40°C to +85°C.
Package Types
DFN-10
MSOP-10
VDD
STAT1
STAT2
VSS
VBAT
THERM
PG(TE)
PROG
2
3
4
5
9
8
7
6
VDD VBAT
110
STAT1
V
DD
STAT2
V
BAT
THERM
1
2
3
4
10
9
8
7PG
(TE)
V
BAT
V
DD
EP
11
56PROG
V
SS
Stand-Alone Linear Li-Ion / Li-Polymer Charge
Management Controller
MCP73833/4
DS22005B-page 2 © 2009 Microchip Technology Inc.
Typical Application
Functional Block Diagram
STAT1
VDD
VSS
PROG
VBAT +
-
Single
Li-Ion
Cell
1,2
MCP73833
6
9,10
7
F
1A Li-Ion Battery Charger
5
VIN
470Ω
470Ω
470Ω
STAT2
PG
THERM
T
4
38
F
1kΩ10 kΩ
+
-
Reference
Generator
VREF (1.21V)
VDD
STAT1
PROG
VBAT
G=0.001
VSS
Direction
Control
54 kΩ
121 kΩUVLO
+
-
PRECONDITION
A
+
-
TERMINATIO N
+
-
111 kΩ
+
-
CA
10 kΩ
157.3 kΩ
6kΩ
48 kΩ
470.6 kΩ
CHARG E
+
-
+
-
VA
72.7 kΩ
310 kΩ
A
G=0.001 1kΩ
+
-
CURRENT
LIMIT
10 µA
+
-LTVT
+
-HTVT470.6kΩ
121 kΩ
THERM
50 µA
Charge
Control,
Timer,
and
Status
Logic
STAT2
PG (TE)
+
-
LDO
1MΩ
175 kΩSHDN
© 2009 Microchip Technology Inc. DS22005B-page 3
MCP73833/4
1.0 ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings
VDD........................................................................7.0V
All Inputs and Outputs w.r.t. VSS .....-0.3 to (VDD+0.3)V
Maximum Junction Temperature, TJ. Internally Limited
Storage temperature ..........................-65°C to +150°C
ESD protection on all pins:
Human Body Model (HBM)
(1.5 kΩ in Series with 100 pF)............................... 4kV
Machine Model (MM)
(200 pF, No Series Resistance) ...........................300V
*Notice: Stresses above those listed under “Maximum
Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of
the device at those or any other conditions above those
indicated in the operational listings of this specification
is not implied. Exposure to maximum rating conditions
for extended periods may affect device reliability.
DC CHARACTERISTICS
Electrical Specifications: Unless otherwise specified, all limits apply for VDD= [VREG(Typical)+0.3V] to 6V, TA=-40°C to 85°C.
Typical values are at +25°C, VDD= [VREG(Typical)+1.0V]
Parameters Sym Min Typ Max Units Conditions
Supply Input
Supply Voltage VDD 3.75 6 V Charging
VREG(Typ-
ical)+0.3V
6 V Charge Complete, Standby
Supply Current ISS 2000 3000 µA Charging
150 300 µA Charge Complete
100 300 µA Standby (No Battery or PROG
Floating)
50 100 µA Shutdown (VDD < VBAT
, or
VDD < VSTOP)
UVLO Start Threshold VSTART 3.4 3.55 3.7 V VDD Low-to-High
UVLO Stop Threshold VSTOP 3.3 3.45 3.6 V VDD High-to-Low
UVLO Hysteresis VHYS 100 — mV
Voltage Regulation (Constant Voltage Mode, System Test Mode)
Regulated Output Voltage VREG 4.168 4.20 4.232 V VDD=[VREG(Typical)+1V]
4.318 4.35 4.382 V IOUT=10 mA
4.367 4.40 4.433 V TA=-5°C to +55°C
4.467 4.50 4.533 V
Line Regulation |(ΔVBAT/VBAT)
/ΔVDD|
0.10 0.30 %/V VDD=[VREG(Typical)+1V] to
6V, IOUT=10 mA
Load Regulation VBAT/ VBAT| 0.10 0.30 % IOUT=10 mA to 100 mA
VDD=[VREG(Typical)+1V]
Supply Ripple Attenuation PSRR 58 dB IOUT=10 mA, 10Hz to 1 kHz
—47— dBI
OUT=10 mA, 10Hz to 10 kHz
—25— dBI
OUT=10 mA, 10Hz to 1 MHz
Current Regulation (Fast Charge Constant Current Mode)
Fast Charge Current Regulation IREG 90 100 110 mA PROG = 10 kΩ
900 1000 1100 mA PROG = 1.0 kΩ
TA=-5°C to +55°C
Maximum Output Current Limit IMAX 1200 mA PROG < 833Ω
\ A
MCP73833/4
DS22005B-page 4 © 2009 Microchip Technology Inc.
Preconditioning Current Regulation (Trickle Charge Constant Current Mode)
Precondition Current Ratio IPREG / IREG 7.5 10 12.5 % PROG = 1.0 kΩ to 10 kΩ
15 20 25 % TA=-5°C to +55°C
30 40 50 %
100 — %
Precondition Voltage Threshold
Ratio
VPTH / VREG 64 66.5 70 % VBAT Low-to-High
69 71.5 75 %
Precondition Hysteresis VPHYS 100 mV VBAT High-to-Low
Charge Termination
Charge Termination Current Ratio ITERM / IREG 3.75 5 6.25 % PROG = 1.0 kΩ to 10 kΩ
5.6 7.5 9.4 % TA=-5°C to +55°C
7.5 10 12.5 %
15 20 25 %
Automatic Recharge
Recharge Voltage Threshold Ratio VRTH / VREG 94.0 % VBAT High-to-Low
96.5 — %
Pass Transistor ON-Resistance
ON-Resistance RDSON 300 — mΩVDD = 3.75V
TJ = 105°C
Battery Discharge Current
Output Reverse Leakage Current IDISCHARGE 0.15 2 µA PROG Floating
—0.252 µAV
DD < VBAT
—0.152 µAV
DD < VSTOP
-5.5 -15 µA Charge Complete
Status Indicators - STAT1, STAT2, PG
Sink Current ISINK —1525mA
Low Output Voltage VOL —0.41 VI
SINK = 4 mA
Input Leakage Current ILK 0.01 1 µA High Impedance, 6V on pin
PROG Input
Charge Impedance Range RPROG 1—20kΩ
Standy Impedance RPROG 70 — 200 kΩMinimum Impedance for
Standby
Thermistor Bias
Thermistor Current Source ITHERM 47 50 53 µA 2 kΩ < RTHERM < 50 kΩ
Thermistor Comparator
Upper Trip Threshold VT1 1.20 1.23 1.26 V VTHERM Low-to-High
Upper Trip Point Hysteresis VT1HYS —-50— mV
Lower Trip Threshold VT2 0.235 0.25 0.265 V VTHERM High-to-Low
Lower Trip Point Hysteresis VT2HYS —50—mV
System Test (LDO) Mode
Input High Voltage Level VIH (VDD-0.1) —— V
THERM Input Sink Current ISINK 3 6 20 µA Stand-by or system test mode
Bypass Capacitance CBAT 1—µFI
OUT < 250 mA
4.7 µF IOUT > 250 mA
DC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise specified, all limits apply for VDD= [VREG(Typical)+0.3V] to 6V, TA=-40°C to 85°C.
Typical values are at +25°C, VDD= [VREG(Typical)+1.0V]
Parameters Sym Min Typ Max Units Conditions
© 2009 Microchip Technology Inc. DS22005B-page 5
MCP73833/4
TEMPERATURE SPECIFICATIONS
Automatic Power Down
Automatic Power Down Entry
Threshold
VPD —V
BAT +
50 mV
V 2.3V < VBAT < VREG
VDD Falling
Automatic Power Down Exit Thresh-
old
VPDEXIT —V
BAT +
150 mV
V 2.3V < VBAT < VREG
VDD Rising
Timer Enable Input (TE)
Input High Voltage Level VIH 2.0 — V
Input Low Voltage Level VIL ——0.6 V
Input Leakage Current ILK —0.011 µAV
TE = 6V
Thermal Shutdown
Die Temperature TSD 150 — °C
Die Temperature Hysteresis TSDHYS —10°C
DC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise specified, all limits apply for VDD= [VREG(Typical)+0.3V] to 6V, TA=-40°C to 85°C.
Typical values are at +25°C, VDD= [VREG(Typical)+1.0V]
Parameters Sym Min Typ Max Units Conditions
AC CHARACTERISTICS
Electrical Specifications: Unless otherwise specified, all limits apply for VDD= [VREG(Typical)+0.3V] to 6V, TA=-40°C to 85°C.
Typical values are at +25°C, VDD= [VREG(Typical)+1.0V]
Parameters Sym Min Typ Max Units Conditions
UVLO Start Delay tSTART —— 5 msV
DD Low-to-High
Current Regulation
Transition Time Out of Preconditioning tDELAY —— 1 msV
BAT<VPTH to VBAT>VPTH
Current Rise Time Out of Preconditioning tRISE —— 1 msI
OUT Rising to 90% of IREG
Preconditioning Comparator Filter Time tPRECON 0.4 1.3 3.2 ms Average VBAT Rise/Fall
Termination Comparator Filter Time tTERM 0.4 1.3 3.2 ms Average IOUT Falling
Charge Comparator Filter Time tCHARGE 0.4 1.3 3.2 ms Average VBAT Falling
Thermistor Comparator Filter Time tTHERM 0.4 1.3 3.2 ms Average THERM Rise/Fall
Elapsed Timer
Elapsed Timer Period tELAPSED 0 0 0 Hours Timer Disabled
3.6 4.0 4.4 Hours
5.4 6.0 6.6 Hours
7.2 8.0 8.8 Hours
Status Indicators
Status Output turn-off tOFF 200 µs ISINK = 1 mA to 0 mA
Status Output turn-on tON 200 µs ISINK = 0 mA to 1 mA
Electrical Specifications: Unless otherwise specified, all limits apply for VDD= [VREG(Typical)+0.3V] to 6V.
Typical values are at +25°C, VDD= [VREG(Typical)+1.0V]
Parameters Symbol Min Typ Max Units Conditions
Temperature Ranges
Specified Temperature Range TA-40 — +85 °C
Operating Temperature Range TA-40 — +125 °C
Storage Temperature Range TA-65 — +150 °C
Thermal Package Resistances
Thermal Resistance, MSOP-10 θJA 113 °C/W 4-Layer JC51-7 Standard
Board, Natural Convection
Thermal Resistance, DFN-10, 3 mm x 3 mm θJA 41 °C/W 4-Layer JC51-7 Standard
Board, Natural Convection
MCP73833/4
DS22005B-page 6 © 2009 Microchip Technology Inc.
NOTES:
© 2009 Microchip Technology Inc. DS22005B-page 7
MCP73833/4
2.0 TYPICAL PERFORMANCE CURVES
Note: Unless otherwise indicated, VDD = 5.2V, VREG = 4.20V, IOUT = 10 mA and TA= +25°C, Constant-voltage mode.
FIGURE 2-1: Battery Regulation Voltage
(VBAT) vs. Supply Voltage (VDD).
FIGURE 2-2: Battery Regulation Voltage
(VBAT) vs. Ambient Temperature (TA).
FIGURE 2-3: Output Leakage Current
(IDISCHARGE) vs. Battery Regulation Voltage
(VBAT).
FIGURE 2-4: Charge Current (IOUT) vs.
Programming Resistor (RPROG).
FIGURE 2-5: Charge Current (IOUT) vs.
Supply Voltage (VDD).
FIGURE 2-6: Charge Current (IOUT) vs.
Supply Voltage (VDD).
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
4.170
4.175
4.180
4.185
4.190
4.195
4.200
4.205
4.210
4.50 4.75 5.00 5.25 5.50 5.75 6.00
Supply Voltage (V)
Battery Regulation Voltage
(V)
MCP73833
IOUT = 10 mA
IOUT = 100 mA
IOUT = 500 mA
IOUT = 900 mA
4.160
4.170
4.180
4.190
4.200
4.210
4.220
-40
-30
-20
-10
0
10
20
30
40
50
60
70
80
Ambient Temperature (°C)
Battery Regulation Voltage (V)
MCP73833 IOUT = 10 mA
IOUT = 100 mA
IOUT = 500 mA
IOUT = 900 mA
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
3.00 3.20 3.40 3.60 3.80 4.00 4.20
Battery Regulation Voltage (V)
Output Leakage Current (PA)
+85°C
-40°C
+25°C
10
100
1000
1 3 5 7 9 11 13 15 17 19 21
Programming Resistor (k:)
Charge Current (mA)
96
97
98
99
100
101
102
103
104
4.50 4.75 5.00 5.25 5.50 5.75 6.00
Supply Voltage (V)
Charge Current (mA)
RPROG = 10 k:
986
988
990
992
994
996
998
1000
1002
1004
4.50 4.75 5.00 5.25 5.50 5.75 6.00
Supply Voltage (V)
Charge Current (mA)
RPROG = 1 k:
MCP73833/4
DS22005B-page 8 © 2009 Microchip Technology Inc.
TYPICAL PERFORMANCE CURVES (Continued)
Note: Unless otherwise indicated, VDD = 5.2V, VREG = 4.20V, IOUT = 10 mA and TA= +25°C, Constant-voltage mode.
FIGURE 2-7: Charge Current (IOUT) vs.
Junction Temperature (TJ).
FIGURE 2-8: Charge Current (IOUT) vs.
Junction Temperature (TJ).
FIGURE 2-9: Thermistor Bias Current
(ITHRERM) vs. Supply Voltage (VDD).
FIGURE 2-10: Thermistor Bias Current
(ITHRERM) vs. Ambient Temperature (TA).
FIGURE 2-11: Power Supply Ripple
Rejection (PSRR).
FIGURE 2-12: Power Supply Ripple
Rejection (PSRR).
0
20
40
60
80
100
120
25
35
45
55
65
75
85
95
105
115
125
135
145
155
Junction Temperature (°C)
Charge Current (mA)
RPROG = 10 k:
0
200
400
600
800
1000
1200
25
35
45
55
65
75
85
95
105
115
125
135
145
155
Junction Temperature (°C)
Charge Current (mA)
RPROG = 1 k:
48.0
48.5
49.0
49.5
50.0
50.5
51.0
51.5
52.0
4.50 4.75 5.00 5.25 5.50 5.75 6.00
Supply Voltage (V)
Thermistor Bias Current (PA)
48.0
48.5
49.0
49.5
50.0
50.5
51.0
51.5
52.0
-40
-30
-20
-10
0
10
20
30
40
50
60
70
80
Ambient Temperature (°C)
Thermistor Bias Current (µA)
-70
-60
-50
-40
-30
-20
-10
0
0.01 0.1 1 10 100 1000
Frequency (kHz)
Attenuation (dB)
VAC = 100 mVp-p
IOUT = 10 mA
COUT = 4.7 µF, X7R
Ceramic
-60
-50
-40
-30
-20
-10
0
0.01 0.1 1 10 100 1000
Frequency (kHz)
Attenuation (dB)
VAC = 100 mVp-p
IOUT = 100 mA
COUT = 4.7 µF, X7R
Ceramic
© 2009 Microchip Technology Inc. DS22005B-page 9
MCP73833/4
TYPICAL PERFORMANCE CURVES (Continued)
Note: Unless otherwise indicated, VDD = 5.2V, VREG = 4.20V, IOUT = 10 mA and TA= +25°C, Constant-voltage mode.
FIGURE 2-13: Line Transient Response.
FIGURE 2-14: Line Transient Response.
FIGURE 2-15: Load Transient Response.
FIGURE 2-16: Load Transient Response.
FIGURE 2-17: Complete Charge Cycle
(180 mA Li-Ion Battery).
FIGURE 2-18: Charge Cycle Start -
Preconditioning (180 mAh Li-Ion Battery).
-2
0
2
4
6
8
10
12
14
0
20
40
60
80
100
120
140
160
180
200
Time (µs)
Source Voltage (V)
-0.30
-0.25
-0.20
-0.15
-0.10
-0.05
0.00
0.05
0.10
Output Ripple (V)
IOUT = 10 mA
COUT = 4.7 µF, X7R
Ceramic
-2
0
2
4
6
8
10
12
14
0
20
40
60
80
100
120
140
160
180
200
Time (µs)
Source Voltage (V)
-0.30
-0.25
-0.20
-0.15
-0.10
-0.05
0.00
0.05
0.10
Output Ripple (V)
IOUT = 100 mA
COUT = 4.7 µF, X7R
Ceramic
-0.05
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0
20
40
60
80
100
120
140
160
180
200
Time (µs)
Output Current (A)
-0.12
-0.10
-0.08
-0.06
-0.04
-0.02
0.00
0.02
0.04
Output Ripple (V)
COUT = 4.7 µF, X7R
Ceramic
-0.20
0.00
0.20
0.40
0.60
0.80
1.00
1.20
1.40
0
20
40
60
80
100
120
140
160
180
200
Time (µs)
Output Current (A)
-0.30
-0.25
-0.20
-0.15
-0.10
-0.05
0.00
0.05
0.10
Output Ripple (V)
COUT = 4.7 µF, X7R
Ceramic
0.0
1.0
2.0
3.0
4.0
5.0
0
30
60
90
120
150
180
210
Time (Minutes)
Battery Voltage (V)
0
40
80
120
160
200
Charge Current (A)
MCP73833-FCI/MF
VDD = 5.2V
RPROG = 10.0 k:
0.0
1.0
2.0
3.0
4.0
5.0
0246810
Time (Minutes)
Battery Voltage (V)
0
40
80
120
160
200
Charge Current (A)
MCP73833-FCI/MF
VDD = 5.2V
RPROG = 10.0 k:
MCP73833/4
DS22005B-page 10 © 2009 Microchip Technology Inc.
NOTES:
© 2009 Microchip Technology Inc. DS22005B-page 11
MCP73833/4
3.0 PIN DESCRIPTIONS
Descriptions of the pins are listed in Table 3-1.
TABLE 3-1: PIN FUNCTION TABLE
3.1 Battery Management Input Supply
(VDD)
A supply voltage of [VREG (typical) + 0.3V] to 6V is
recommended. Bypass to VSS with a minimum of 1 µF.
3.2 Charge Status Outputs (STAT1,
STAT2)
STAT1 and STAT2 are open-drain logic outputs for con-
nection to a LED for charge status indication.
Alternatively, a pull-up resistor can be applied for
interfacing to a host microcontroller.
3.3 Battery Management 0V Reference
(VSS)
Connect to negative terminal of battery and input
supply.
3.4 Current Regulation Set (PROG)
Preconditioning, fast charge, and termination currents
are scaled by placing a resistor from PROG to VSS.
The charge management controller can be disabled by
allowing the PROG input to float.
3.5 Power Good Indication (PG)
MCP73833 Only
The power good (PG) option is a pseudo open-drain
output. The PG output can sink current, but not source
current. However, there is a diode path back to the
input, and, as such, the PG output should only be
pulled up to the input. The PG output is low whenever
the input to the MCP73833 is above the UVLO
threshold and greater than the battery voltage.
3.6 Timer Enable Input (TE)
MCP73834 Only
The timer enable (TE) input option is used to enable or
disable the internal timer. A low signal on this pin
enables the internal timer and a high signal disables
the internal timer. The TE input can be used to disable
the timer when the charger is supplying current to
charge the battery and power the system load. The TE
input is compatible with 1.8V logic.
3.7 Thermistor Input (THERM)
An internal 50 µA current source provides the bias for
most common 10 kΩ negative-temperature coefficient
thermistors (NTC). The MCP73833/4 compares the
voltage at the THERM pin to factory set thersholds of
1.20V and 0.25V, typically.
3.8 Battery Charge Control Output
(VBAT)
Connect to positive terminal of battery. Drain terminal
of internal P-channel MOSFET pass transistor. Bypass
to VSS with a minimum of 1 µF to ensure loop stability
when the battery is disconnected.
3.9 Exposed Thermal Pad (EP)
There is an internal electrical connection between the
Exposed Thermal Pad (EP) and the VSS pin; they must
be connected to the same potential.
Pin No. Symbol Function
DFN-10 MSOP-10
11 V
DD Battery Management Input Supply
22 V
DD Battery Management Input Supply
3 3 STAT1 Charge Status Output
4 4 STAT2 Charge Status Output
55 V
SS Battery Management 0V Reference
6 6 PROG Current Regulation Set and Charge Control Enable
77 PG,
TE MCP73833: Power Good output, MCP73834: Timer Enable input
8 8 THERM Thermistor input
99 V
BAT Battery Charge Control Output
10 10 VBAT Battery Charge Control Output
11 EP Exposed Thermal Pad (EP); must be connected to VSS.
MCP73833/4
DS22005B-page 12 © 2009 Microchip Technology Inc.
NOTES:
TIT:
© 2009 Microchip Technology Inc. DS22005B-page 13
MCP73833/4
4.0 FUNCTIONAL DESCRIPTION
The MCP73833/4 is a highly advanced linear charge
management controller. Refer to the functional block
diagram and Figure 4-1 that depicts the operational
flow algorithm from charge initiation to completion and
automatic recharge.
FIGURE 4-1: Flow Chart.
VBAT < VPTH
* Continuously Monitored
Timer Expired
SHUTDOWN MODE *
VDD < VUVLO
VDD < VBAT
STAT1 = HI-Z
STAT2 = HI-Z
PG = HI-Z
STANDBY MODE *
VBAT (VREG + 100 mv)
PROG > 200 kΩ
STAT1 = HI-Z
STAT2 = HI-Z
PG = LOW
SYSTEM TEST (LDO) MODE
VTHERM > (VDD - 100 mv)
PROG > 20 kΩ
STAT1 = LOW
STAT2 = LOW
PG = LOW
Timer Suspended
TEMPERATURE FAULT
No Charge Current
STAT1 = Hi-Z
STAT2 = Hi-Z
PG = LOW
Timer Suspended
TIMER FAULT
No Charge Current
STAT1 = Hi-Z
STAT2 = Hi-Z
PG = LOW
Timer Suspended
PRECONDITIONING MODE
Charge Current (IPREG
STAT1 = LOW
STAT2 = Hi-Z
PG = LOW
Timer Reset
FAST CHARGE MODE
Charge Current (IREG
STAT1 = LOW
STAT2 = Hi-Z
PG = LOW
Timer Enabled
CONSTANT VOLTAGE MODE
Charge Voltage (VREG
STAT1 = LOW
STAT2 = Hi-Z
PG = LOW
CHARGE COMPLETE MODE
No Charge Current
STAT1 = HI-Z
STAT2 = LOW
PG = LOW
Timer Reset
VBAT > VPTH
VBAT = VREG
VBAT < ITERM
Timer Expired
VBAT > VPTH
VBAT < VRTH
MCP73833/4
DS22005B-page 14 © 2009 Microchip Technology Inc.
4.1 Under Voltage Lockout (UVLO)
An internal under voltage lockout (UVLO) circuit
monitors the input voltage and keeps the charger in
shutdown mode until the input supply rises above the
UVLO threshold. The UVLO circuitry has a built-in
hysteresis of 100 mV.
In the event a battery is present when the input power
is applied, the input supply must rise +150 mV above
the battery voltage before the MCP73833/4 becomes
operational.
The UVLO circuit places the device in shutdown mode
if the input supply falls to within +50 mV of the battery
voltage.
The UVLO circuit is always active. At any time the input
supply is below the UVLO threshold or within +50 mV
of the voltage at the VBAT pin, the MCP73833/4 is
placed in a shutdown mode.
During any UVLO condition, the battery reverse
discharge current shall be less than 2 µA.
4.2 Charge Qualification
For a charge cycle to begin, all UVLO conditions must
be met and a battery or output load must be present.
A charge current programming resistor must be
connected from PROG to VSS. If the PROG pin is open
or floating, the MCP73833/4 is disabled and the battery
reverse discharge current is less than 2 µA. In this
manner, the PROG pin acts as a charge enable and
can be used as a manual shutdown.
If the input supply voltage is above the UVLO
threshold, but below VREG(Typical)+0.3V, the
MCP73833/4 will pulse the STAT1 and PG outputs as
the device determines if a battery is present.
4.3 Preconditioning
If the voltage at the VBAT pin is less than the
preconditioning threshold, the MCP73833/4 enters a
preconditioning or trickle charge mode. The
preconditioning threshold is factory set. Refer to
Section 1.0 “Electrical Characteristics” for
preconditioning threshold options.
In this mode, the MCP73833/4 supplies a percentage
of the charge current (established with the value of the
resistor connected to the PROG pin) to the battery. The
percentage or ratio of the current is factory set. Refer to
Section 1.0 “Electrical Characteristics” for
preconditioning current options.
When the voltage at the VBAT pin rises above the pre-
conditioning threshold, the MCP73833/4 enters the
constant current or fast charge mode.
4.4 Constant Current - Fast Charge
Mode
During the constant current mode, the programmed
charge current is supplied to the battery or load. The
charge current is established using a single resistor
from PROG to VSS. The program resistor and the
charge current are calculated using Equation 4-1:
EQUATION 4-1:
Constant current mode is maintained until the voltage
at the VBAT pin reaches the regulation voltage, VREG
.
When constant current mode is invoked, the internal
timer is reset.
4.4.1 TIMER EXPIRED DURING
CONSTANT CURRENT - FAST
CHARGE MODE
If the internal timer expires before the recharge voltage
threshold is reached, a timer fault is indicated and the
charge cycle terminates. The MCP73833/4 remains in
this condition until the battery is removed, the input
power is removed, or the PROG pin is opened. If the
battery is removed or the PROG pin is opened, the
MCP73833/4 enters the Standby mode where it
remains until a battery is reinserted or the PROG pin is
reconnected. If the input power is removed, the
MCP73833/4 is in Shutdown. When the input power is
reapplied, a normal start-up sequence ensues.
4.5 Constant Voltage Mode
When the voltage at the VBAT pin reaches the
regulation voltage, VREG
, constant voltage regulation
begins. The regulation voltage is factory set to 4.20V,
4.35V, 4.40V, or 4.50V with a tolerance of ± 0.75%.
4.6 Charge Termination
The charge cycle is terminated when, during constant
voltage mode, the average charge current diminishes
below a percentage of the programmed charge current
(established with the value of the resistor connected to
the PROG pin) or the internal timer has expired. A 1 ms
filter time on the termination comparator ensures that
transient load conditions do not result in premature
charge cycle termination. The percentage or ratio of the
current is factory set. The timer period is factory set
and can be disabled. Refer to Section 1.0 “Electrical
Characteristics” for charge termination current ratio
and timer period options.
The charge current is latched off and the MCP73833/4
enters a charge complete mode.
IREG 1000V
RPROG
-----------------=
Where:
RPROG = kilo-ohms
IREG = milliampere
© 2009 Microchip Technology Inc. DS22005B-page 15
MCP73833/4
4.7 Automatic Recharge
The MCP73833/4 continuously monitors the voltage at
the VBAT pin in the charge complete mode. If the
voltage drops below the recharge threshold, another
charge cycle begins and current is once again supplied
to the battery or load. The recharge threshold is factory
set. Refer to Section 1.0 “Electrical Characteristics”
for recharge threshold options.
4.8 Thermal Regulation
The MCP73833/4 limits the charge current based on
the die temperature. The thermal regulation optimizes
the charge cycle time while maintaining device
reliability. Figure 4-2 depicts the thermal regulation for
the MCP73833/4.
FIGURE 4-2: Thermal Regulation.
4.9 Thermal Shutdown
The MCP73833/4 suspends charge if the die
temperature exceeds +150°C. Charging will resume
when the die temperature has cooled by approximately
+10°C. The thermal shutdown is a secondary safety
feature in the event that there is a failure within the
thermal regulation circuitry.
0
200
400
600
800
1000
1200
25
35
45
55
65
75
85
95
105
115
125
135
145
155
Junction Temperature (°C)
Charge Current (mA)
RPROG = 1 kΩ
MCP73833/4
DS22005B-page 16 © 2009 Microchip Technology Inc.
NOTES:
© 2009 Microchip Technology Inc. DS22005B-page 17
MCP73833/4
5.0 DETAILED DESCRIPTION
5.1 Analog Circuitry
5.1.1 BATTERY MANAGEMENT INPUT
SUPPLY (VDD)
The VDD input is the input supply to the MCP73833/4.
The MCP73833/4 automatically enters a Power-down
mode if the voltage on the VDD input falls below the
UVLO voltage (VSTOP). This feature prevents draining
the battery pack when the VDD supply is not present.
5.1.2 CURRENT REGULATION SET
(PROG)
Fast charge current regulation can be scaled by placing
a programming resistor (RPROG) from the PROG input
to VSS. The program resistor and the charge current
are calculated using the Equation 5-1:
EQUATION 5-1:
The preconditioning trickle-charge current and the
charge termination current are ratiometric to the fast
charge current based on the selected device options.
5.1.3 BATTERY CHARGE CONTROL
OUTPUT (VBAT)
The battery charge control output is the drain terminal
of an internal P-channel MOSFET. The MCP73833/4
provides constant current and voltage regulation to the
battery pack by controlling this MOSFET in the linear
region. The battery charge control output should be
connected to the positive terminal of the battery pack.
5.1.4 TEMPERATURE QUALIFICATION
(THERM)
The MCP73833/4 continuously monitors battery
temperature during a charge cycle by measuring the
voltage between the THERM and VSS pins. An internal
50 µA current source provides the bias for most
common 10 kΩ negative-temperature coefficient
(NTC) or positive-temperature coefficient (PTC)
thermistors.The current source is controlled, avoiding
measurement sensitivity to fluctuations in the supply
voltage (VDD). The MCP73833/4 compares the voltage
at the THERM pin to factory set thersholds of 1.20V
and 0.25V, typically. Once a volage outside the
thresholds is detected during a charge cycle, the
MCP73833/4 immediately suspends the charge cycle.
The MCP73833/4 suspends charge by turning off the
pass transistor and holding the timer value. The charge
cycle resumes when the voltage at the THERM pin
returns to the normal range.
If temperature monitoring is not required, place a
standard 10 kΩ resistor from THERM to VSS.
5.1.4.1 System Test (LDO) Mode
The MCP73833/4 can be placed in a system test mode.
In this mode, the MCP73833/4 operates as a low
dropout linear regulator (LDO). The output voltage is
regulated to the factory set voltage regulation option.
The available output current is limitted to the
programmed fast charge current. For stability, the VBAT
output must be bypassed to VSS with a minimum
capacitance of 1 µF for output currents up to 250 mA.
A minimum capacitance of 4.7 µF is required for output
currents above 250 mA.
The system test mode is entered by driving the THERM
input greater than (VDD-100 mV) with no battery
connected to the output. In this mode, the MCP73833/
4 can be used to power the system without a battery
present.
5.2 Digital Circuitry
5.2.1 STATUS INDICATORS AND POWER
GOOD (PG - OPTION)
The charge status outputs have two different states:
Low (L), and High Impedance (Hi-Z). The charge status
outputs can be used to illuminate LEDs. Optionally, the
charge status outputs can be used as an interface to a
host microcontroller. Table 5-1 summarize the state of
the status outputs during a charge cycle.
IREG 1000V
RPROG
-----------------=
Where:
RPROG = kilo-ohms
IREG = milliampere
Note 1: ITHERM is disabled during shutdown,
stand-by, and system test modes.
2: A pull-down current source on the
THERM input is active only in stand-by
and system test modes.
3: During system test mode, the PROG
input sets the available output current
limit.
4: System test mode shall be exited by
releasing the THERM input or cycling
input power.
TABLE 5-1: STATUS OUTPUTS
Charge Cycle State STAT1 STAT2 PG
Shutdown Hi-Z Hi-Z Hi-Z
Standby Hi-Z Hi-Z L
Charge in Progress L Hi-Z L
Charge Complete (EOC) Hi-Z L L
Temperature Fault Hi-Z Hi-Z L
Timer Fault Hi-Z Hi-Z L
System Test Mode L L L
MCP73833/4
DS22005B-page 18 © 2009 Microchip Technology Inc.
5.2.2 POWER GOOD (PG) OPTION
The power good (PG) option is a pseudo open-drain
output. The PG output can sink current, but not source
current. However, there is a diode path back to the
input, and as such, the PG output should only be pulled
up to the input. The PG output is low whenever the
input to the MCP73833 is above the UVLO threshold
and greater than the battery voltage. If the supply
voltage is above the UVLO, but below
VREG(Typical)+0.3V, the MCP73833 will pulse the PG
output as the device determines if a battery is present.
5.2.3 TIMER ENABLE (TE) OPTION
The timer enable (TE) input option is used to enable or
disable the internal timer. A low signal on this pin
enables the internal timer and a high signal disables
the internal timer. The TE input can be used to disable
the timer when the charger is supplying current to
charge the battery and power the system load. The TE
input is compatible with 1.8V logic.
5.2.4 DEVICE DISABLE (PROG)
The current regulation set input pin (PROG) can be
used to terminate a charge at any time during the
charge cycle, as well as to initiate a charge cycle or
initiate a recharge cycle.
Placing a programming resistor from the PROG input to
VSS enables the device. Allowing the PROG input to
float or by applying a logic-high input signal, disables
the device and terminates a charge cycle. When
disabled, the device’s supply current is reduced to
100 µA, typically.
@GEE
© 2009 Microchip Technology Inc. DS22005B-page 19
MCP73833/4
6.0 APPLICATIONS
The MCP73833/4 is designed to operate in conjunction
with a host microcontroller or in stand-alone
applications. The MCP73833/4 provides the preferred
charge algorithm for Lithium-Ion and Lithium-Polymer
cells Constant-current followed by Constant-voltage.
Figure 6-1 depicts a typical stand-alone application
circuit, while Figures 6-2 and 6-3 depict the
accompanying charge profile.
FIGURE 6-1: Typical Application Circuit.
FIGURE 6-2: Typical Charge Profile with
Thermal Regulation (1700 mAh Li-Ion Battery).
FIGURE 6-3: Typical Charge Cycle Start
with Thermal Regulation (1700 mAh Li-Ion
Battery).
6.1 Application Circuit Design
Due to the low efficiency of linear charging, the most
important factors are thermal design and cost, which
are a direct function of the input voltage, output current
and thermal impedance between the battery charger
and the ambient cooling air. The worst-case scenario is
when the device has transitioned from the
Preconditioning mode to the Constant-current mode. In
this situation, the battery charger has to dissipate the
maximum power. A trade-off must be made between
the charge current, cost and thermal requirements of
the charger.
6.1.1 COMPONENT SELECTION
Selection of the external components in Figure 6-1 is
crucial to the integrity and reliability of the charging
system. The following discussion is intended as a guide
for the component selection process.
6.1.1.1 Current Programming Resistor
(RPROG)
The preferred fast charge current for Lithium-Ion cells
is at the 1C rate, with an absolute maximum current at
the 2C rate. For example, a 500 mAh battery pack has
a preferred fast charge current of 500 mA. Charging at
this rate provides the shortest charge cycle times
without degradation to the battery pack performance or
life.
STAT1
VDD
VSS
PROG
VBAT +
-
Single
Li-Ion
Cell
1,2
MCP73833
6
9,10
7
Li-Ion Battery Charger
5
STAT2
PG
THERM
4
38
CIN
Regulated
Wall Cube
RPROG
RLED
COUT
LED
RLED
RLED
LED LED
RT1
10 kΩT
RT2
0.0
1.0
2.0
3.0
4.0
5.0
0
20
40
60
80
100
120
140
160
Time (Minutes)
Battery Voltage (V)
0.00
0.40
0.80
1.20
1.60
2.00
Charge Current (A)
MCP73833-FCI/MF
VDD = 5.2V
RPROG = 1.00 k:
0.0
1.0
2.0
3.0
4.0
5.0
0
2
4
6
8
10
Time (Minutes)
Battery Voltage (V)
0.00
0.40
0.80
1.20
1.60
2.00
Charge Current (A)
MCP73833-FCI/MF
VDD = 5.2V
RPROG = 1.00 k:
MCP73833/4
DS22005B-page 20 © 2009 Microchip Technology Inc.
6.1.1.2 Thermal Considerations
The worst-case power dissipation in the battery char-
ger occurs when the input voltage is at the maximum
and the device has transitioned from the
Preconditioning mode to the Constant-current mode. In
this case, the power dissipation is:
Power dissipation with a 5V, ±10% input voltage source
is:
This power dissipation with the battery charger in the
MSOP-10 package will cause thermal regulation to be
entered as depicted in Figure 6-3. Alternatively, the
DFN-10 (3 mm x 3 mm) package could be utilized to
reduce charge cycle times.
6.1.1.3 External Capacitors
The MCP73833/4 is stable with or without a battery
load. In order to maintain good AC stability in the
Constant-voltage mode, a minimum capacitance of
4.7 µF is recommended to bypass the VBAT pin to VSS.
This capacitance provides compensation when there is
no battery load. In addition, the battery and
interconnections appear inductive at high frequencies.
These elements are in the control feedback loop during
Constant-voltage mode. Therefore, the bypass
capacitance may be necessary to compensate for the
inductive nature of the battery pack.
Virtually any good quality output filter capacitor can be
used, independent of the capacitor’s minimum
Effective Series Resistance (ESR) value. The actual
value of the capacitor (and its associated ESR)
depends on the output load current. A 4.7 µF ceramic,
tantalum or aluminum electrolytic capacitor at the
output is usually sufficient to ensure stability for output
currents up to a 500 mA.
6.1.1.4 Reverse-Blocking Protection
The MCP73833/4 provides protection from a faulted or
shorted input. Without the protection, a faulted or
shorted input would discharge the battery pack through
the body diode of the internal pass transistor.
6.1.1.5 Charge Inhibit
The current regulation set input pin (PROG) can be
used to terminate a charge at any time during the
charge cycle, as well as to initiate a charge cycle or
initiate a recharge cycle.
Placing a programming resistor from the PROG input to
VSS enables the device. Allowing the PROG input to
float or by applying a logic-high input signal, disables
the device and terminates a charge cycle. When
disabled, the device’s supply current is reduced to
100 µA, typically.
6.1.1.6 Temperature Monitoring
The charge temperature window can be set by placing
fixed value resistors in series-parallel with a thermistor.
The resistance values of RT1 and RT2 can be
calculated with the following equations in order to set
the temperature window of interest.
For NTC thermistors:
For example, by utilizing a 10 kΩ at 25C NTC
thermistor with a sensitivity index, β, of 3892, the
charge temperature range can be set to 0C - 50C by
placing a 1.54 kΩ resistor in series (RT1), and a
69.8 kΩ resistor in parallel (RT2) with the thermistor as
depicted in Figure 6-1.
6.1.1.7 Charge Status Interface
A status output provides information on the state of
charge. The output can be used to illuminate external
LEDs or interface to a host microcontroller. Refer to
Table 5-1 for a summary of the state of the status
output during a charge cycle.
PowerDissipation VDDMAX VPTHMIN
()IREGMAX
×=
Where:
VDDMAX = the maximum input voltage
IREGMAX = the maximum fast charge current
VPTHMIN = the minimum transition threshold
voltage
PowerDissipation 5.5V2.7V()550mA×1.54W==
24k
Ω
RT1
RT2 RCOLD
×
RT2 RCOLD
+
---------------------------------+=
5k
Ω
RT1
RT2RHOT
×
RT2RHOT
+
-----------------------------+=
Where:
RT1 = the fixed series resistance
RT2 = the fixed parallel resistance
RCOLD = the thermistor resistance at the
lower temperature of interest
RHOT = the thermistor resistance at the
upper temperature of interest
Lfifi JP 1%
© 2009 Microchip Technology Inc. DS22005B-page 21
MCP73833/4
6.2 PCB Layout Issues
For optimum voltage regulation, place the battery pack
as close as possible to the device’s VBAT and VSS pins,
recommended to minimize voltage drops along the
high current-carrying PCB traces.
If the PCB layout is used as a heatsink, adding many
vias in the heatsink pad can help conduct more heat to
the backplane of the PCB, thus reducing the maximum
junction temperature. Figures 6-4 and 6-5 depict a
typical layout with PCB heatsinking.
FIGURE 6-4: Typical Layout (Top).
FIGURE 6-5: Typical Layout (Bottom).
MCP73833
VBAT
VDD
VSS
CIN COUT
THERM
PG
STAT1
STAT2
RPROG
VBAT
VSS
VDD
MCP73833/4
DS22005B-page 22 © 2009 Microchip Technology Inc.
NOTES:
WNW EMU MCP738337AMl/MF AAAA NNN
© 2009 Microchip Technology Inc. DS22005B-page 23
MCP73833/4
7.0 PACKAGING INFORMATION
7.1 Package Marking Information
10-Lead MSOP Example:
XXXXXX
YWWNNN
833AMI
918256
Legend: XX...X Customer-specific information
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
*This package is Pb-free. The Pb-free JEDEC designator ( )
can be found on the outer packaging for this package.
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
3
e
3
e
Part Number * Marking
Code Part Number * Marking
Code
MCP73833-AMI/MF AAAA
MCP73833-BZI/MF AAAB
MCP73833-FCI/MF AAAC MCP73834-FCI/MF BAAC
MCP73833-GPI/MF AAAD MCP73834-GPI/MF BAAD
MCP73833-NVI/MF AAAF MCP73834-NVI/MF BAAF
MCP73833-6SI/MF AAAH MCP73834-6SI/MF BAAH
MCP73833-CNI/MF AAAK MCP73834-CNI/MF BAAK
* Consult Factory for Alternative Device Options.
Part Number * Marking
Code Part Number * Marking
Code
MCP73833-AMI/UN 833AMI
MCP73833-BZI/UN 833BZI
MCP73833-FCI/UN 833FCI MCP73834-FCI/UN 834FCI
MCP73833-GPI/UN 833GPI MCP73834-GPI/UN 834GPI
MCP73833-NVI/UN 833NVI MCP73834-NVI/UN 834NVI
MCP73833-CNI/UN 833CNI MCP73834-CNI/UN 834CNI
* Consult Factory for Alternative Device Options.
10-Lead DFN (3x3)
XXXX
YYWW
NNN
Example:
AAAA
0918
256
wa—Z P/
MCP73833/4
DS22005B-page 24 © 2009 Microchip Technology Inc.
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6!&($ 6 
%  ./0
79%  :  
%"$$    .
0%%* + ,2
75%  +/0
,# ""5%   +. :
7;"% , +/0
,# "";"% ,  .: .
0%%;"% ( : . +
0%%5% 5 +  .
0%%%,# "" <  = =
D
N
NOTE 1 12
E
b
e
N
L
E2
NOTE 1
1
2
D2
K
EXPOSED
PAD
BOTTOM VIEW
TOP VIEW
A3 A1
A
NOTE 2
  ) 0>+/
© 2009 Microchip Technology Inc. DS22005B-page 25
MCP73833/4
&' ()*#'($
%
  !"#$%!&'(!%&! %(%")%%%"
 &  ","%!"&"$ %!  "$ %!   %#".&& "
+ & "%,-.
/01 / & %#%! ))%!%% 
,21 $& '! !)%!%%'$$&%!  
% 2%& %!%*") '  %*$%%"%
%%133)))&&3*
4% 55,,
& 5&% 6 67 8
6!&($ 6 
%  ./0
79%  = = 
""**  . :. .
%"$$   = .
7;"% , /0
""*;"% , +/0
75%  +/0
2%5% 5  > :
2%% 5 .,2
2% I? = :?
5"* : = +
5";"% ( . = ++
D
E
E1
N
NOTE 1
12
b
e
A
A1
A2 c
L
L1
φ
  ) 0/
MCP73833/4
DS22005B-page 26 © 2009 Microchip Technology Inc.
NOTES:
© 2009 Microchip Technology Inc. DS22005B-page 27
MCP73833/4
APPENDIX A: REVISION HISTORY
Revision B (May 2009)
The following is the list of modifications:
1. Added the MCP73833-6SI/MF and
MCP73834-6SI/MF10-lead DFN packages.
2. Updated DFN pinout.
3. Updated Package Outline Drawings.
4. Updated Appendix A Revision History.
Revision A (September 2006)
Original Release of this Document.
MCP73833/4
DS22005B-page 28 © 2009 Microchip Technology Inc.
NOTES:
PART NO. xx v X/ T 4‘ 3‘2? 3‘2? ‘2? Rb? MCP73833-AMl/MF 95.5%
© 2009 Microchip Technology Inc. DS22005B-page 29
MCP73833/4
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Device: MCP73833: 1A Fully Integrated Charger,
PG function on pin 7
MCP73833T: 1A Fully Integrated Charger,
PG function on pin 7
(Tape and Reel)
MCP73834: 1A Fully Integrated Charger,
TE function on pin 7
MCP73834T: 1A Fully Integrated Charger,
TE function on pin 7
(Tape and Reel)
Output Options * * * Refer to table below for different operational options.
* * Consult Factory for Alternative Device Options.
Temperature: I = -40°C to +85°C
Package Type: MF = Plastic Dual Flat No Lead (DFN)
(3x3x0.9 mm Body), 10-lead
UN = Plastic Micro Small Outline Package (MSOP),
10-lead
PART NO. XX
Output
Device
Options*
X/
Temp.
XX
Package
Examples: * *
a) MCP73833-AMI/UN: 10-lead MSOP pkg.
b) MCP73833-BZI/UN: 10-lead MSOP pkg.
c) MCP73833-CNI/MF: 10-lead DFN pkg.
d) MCP73833-FCI/UN: 10-lead MSOP pkg.
e) MCP73833-GPI/UN: 10-lead MSOP pkg.
f) MCP73833-NVI/MF: 10-lead DFN pkg.
g) MCP73833-6SI/MF: 10-lead DFN pkg.
a) MCP73834-CNI/MF: 10-lead DFN pkg.
b) MCP73834-FCI/UN: 10-lead MSOP pkg.
c) MCP73834-GPI/UN: 10-lead MSOP pkg.
d) MCP73834-NVI/MF: 10-lead DFN pkg.
e) MCP73834-6SI/MF: 10-lead DFN pkg.
* * Consult Factory for Alternative Device Options
Part Number VREG IPREG/IREG VPTH/VREG ITERM/IREG VRTH/VREG Timer Period
MCP73833-AMI/MF 4.20V 10% 71.5% 7.5% 96.5% 0 hours
MCP73833-BZI/MF 4.20V 100% N/A 7.5% 96.5% 0 hours
MCP73833-CNI/MF 4.20V 10% 71.5% 20% 94% 4 hours
MCP73833-FCI/MF 4.20V 10% 71.5% 7.5% 96.5% 6 hours
MCP73833-GPI/MF 4.20V 100% N/A 7.5% 96.5% 6 hours
MCP73833-NVI/MF 4.35V 10% 71.5% 7.5% 96.5% 6 hours
MCP73833-6SI/MF 4.50V 10% 71.5% 7.5% 96.5% 6 hours
MCP73833-AMI/UN 4.20V 10% 71.5% 7.5% 96.5% 0 hours
MCP73833-FCI/UN 4.20V 10% 71.5% 7.5% 96.5% 6 hours
MCP73834-BZI/MF 4.20V 100% N/A 7.5% 96.5% 0 hours
MCP73834-CNI/MF 4.20V 10% 71.5% 20% 94% 4 hours
MCP73834-FCI/MF 4.20V 10% 71.5% 7.5% 96.5% 6 hours
MCP73834-NVI/MF 4.35V 10% 71.5% 7.5% 96.5% 6 hours
MCP73834-6SI/MF 4.50V 10% 71.5% 7.5% 96.5% 6 hours
MCP73834-FCI/UN 4.20V 10% 71.5% 7.5% 96.5% 6 hours
MCP73833/4
DS22005B-page 30 © 2009 Microchip Technology Inc.
NOTES:
QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV = ISO/TS 1694922002 =
© 2009 Microchip Technology Inc. DS22005B-page 31
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, rfPIC, SmartShunt and UNI/O are registered
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
FilterLab, Hampshire, Linear Active Thermistor, MXDEV,
MXLAB, SEEVAL, SmartSensor and The Embedded Control
Solutions Company are registered trademarks of Microchip
Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, In-Circuit Serial
Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, nanoWatt XLP,
PICkit, PICDEM, PICDEM.net, PICtail, PIC32 logo, PowerCal,
PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select
Mode, Total Endurance, TSHARC, WiperLock and ZENA are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2009, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Note the following details of the code protection feature on Microchip devices:
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
Q ‘MICROCHIP AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE
DS22005B-page 32 © 2009 Microchip Technology Inc.
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WORLDWIDE SALES AND SERVICE
03/26/09

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