TPS78628KTTR Datasheet by Texas Instruments

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I TEXAS INSTRUMENTS Frequency (Hz)
0.00
0.10
0.20
0.30
0.40
0.50
0.60
0.70
0.80
Frequency (Hz)
100 10k 100k1k
Output Spectral Noise Density (µVÖHz)
IOUT = 1 mA
IOUT = 1.5 A
VIN = 5.5 V
COUT = 2.2 µF
CNR = 0.1 µF
0
10
20
30
40
50
60
70
80
f (Hz)
1 10k 10M1k
Ripple Rejection − (dB)
IOUT = 1 mA
IOUT = 1.5 A
VIN = 4 V
COUT = 10 µF
CNR = 0.01 µF
10 100 100k 1M
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TPS786
SLVS389M SEPTEMBER 2002REVISED SEPTEMBER 2015
TPS786 Ultralow-Noise, High-PSRR, Fast, RF, 1.5-A
Low-Dropout Linear Regulators
1 Features 3 Description
The TPS786 family of low-dropout (LDO) low-power
1 1.5-A Low-Dropout Regulator With Enable linear voltage regulators features high power-supply
Available in Fixed and Adjustable (1.2 V to 5.5 V) rejection ratio (PSRR), ultralow noise, fast start-up,
Output Versions and excellent line and load transient responses in
High PSRR (49 dB at 10 kHz) small outline, SOT223-6 and DDPAK-5 packages.
Each device in the family is stable, with a small 1-μF
Ultralow Noise (48 μVRMS, TPS78630) ceramic capacitor on the output. The family uses an
Fast Start-Up Time (50 μs) advanced, proprietary BiCMOS fabrication process to
Stable With a 1-μF Ceramic Capacitor yield extremely low dropout voltages (for example,
390 mV at 1.5 A). Each device achieves fast start-up
Excellent Load and Line Transient Response times (approximately 50 μs with a 0.001-μF bypass
Very Low Dropout Voltage (390 mV at Full Load, capacitor) while consuming very low quiescent
TPS78630) current (265 μA, typical). Moreover, when the device
3 × 3 SON PowerPAD™, 6-Pin SOT223 and 5-Pin is placed in standby mode, the supply current is
DDPAK Package reduced to less than 1 μA. The TPS78630 exhibits
approximately 48 μVRMS of output voltage at 3-V
output noise with a 0.1-μF bypass capacitor.
2 Applications Applications with analog components that are noise
RF: VCOs, Receivers, ADCs sensitive, such as portable RF electronics, benefit
• Audio from the high PSRR, low noise features, and the fast
response time.
• Bluetooth®, Wireless LAN
Cellular and Cordless Telephones Device Information(1)
Handheld Organizers, PDAs PART NUMBER PACKAGE BODY SIZE (NOM)
TO-263 (5) 10.16 mm × 8.42 mm
TPS786 SOT-223 (6) 6.50 mm × 3.50 mm
SON (8) 3.00 mm × 3.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Ripple Rejection vs Frequency Output Spectral Noise Density vs
Frequency
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
l TEXAS INSTRUMENTS
TPS786
SLVS389M SEPTEMBER 2002REVISED SEPTEMBER 2015
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Table of Contents
1 Features.................................................................. 18 Application and Implementation ........................ 13
8.1 Application Information............................................ 13
2 Applications ........................................................... 18.2 Typical Application .................................................. 14
3 Description ............................................................. 19 Power Supply Recommendations...................... 16
4 Revision History..................................................... 210 Layout................................................................... 16
5 Pin Configuration and Functions......................... 310.1 Layout Guidelines ................................................. 16
6 Specifications......................................................... 410.2 Layout Examples................................................... 16
6.1 Absolute Maximum Ratings ...................................... 410.3 Regulator Mounting............................................... 17
6.2 ESD Ratings.............................................................. 410.4 Power Dissipation ................................................. 17
6.3 Recommended Operating Conditions....................... 411 Device and Documentation Support ................. 21
6.4 Thermal Information.................................................. 511.1 Device Support...................................................... 21
6.5 Electrical Characteristics........................................... 611.2 Documentation Support ........................................ 21
6.6 Typical Characteristics.............................................. 711.3 Community Resources.......................................... 21
7 Detailed Description............................................ 11 11.4 Trademarks........................................................... 21
7.1 Overview ................................................................. 11 11.5 Electrostatic Discharge Caution............................ 21
7.2 Functional Block Diagrams ..................................... 11 11.6 Glossary................................................................ 22
7.3 Feature Description................................................. 12 12 Mechanical, Packaging, and Orderable
7.4 Device Functional Modes........................................ 12 Information ........................................................... 22
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision L (October 2010) to Revision M Page
Added ESD Ratings table, Feature Description section, Device Functional Modes,Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section ................................................................................................. 1
Updated Thermal Information................................................................................................................................................. 5
Changes from Revision K (August, 2010) to Revision L Page
Corrected typo in Figure 34.................................................................................................................................................. 20
Changes from Revision J (May, 2009) to Revision K Page
Replaced the Dissipation Ratings table with the Thermal Information Table......................................................................... 5
Revised section .................................................................................................................................................................... 17
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*9 TEXAS INSTRUMENTS 11:11
1
2
3
4
5
EN
IN
GND
OUT
NR/FB
1
2
3
4
5
6
GND
NR/FB
OUT
GND
IN
EN
TPS786
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SLVS389M SEPTEMBER 2002REVISED SEPTEMBER 2015
5 Pin Configuration and Functions
DCQ Package DRB Package
6-Pin SOT-223 8-SON
Top View Top View
KTT Package
5-Pin TO-263
Top View
Pin Functions
PIN I/O DESCRIPTION
NAME SOT-223 TO-263 SON
Noise-reduction pin for fixed versions only. An external bypass capacitor, connected to this
NR 5 5 5 terminal, in conjunction with an internal resistor, creates a low-pass filter to further reduce
regulator noise.
The EN terminal is an input that enables or shuts down the device. When EN is a logic high,
EN 1 1 8 I the device is enabled. When the device is a logic low, the device is in shutdown mode.
FB 5 5 5 I Feedback input voltage for the adjustable device.
GND 3, 6 3, TAB 6 Regulator ground
IN 2 2 1, 2 I Input supply
OUT 4 4 3, 4 O Regulator output
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VIN –0.3 6 V
VEN –0.3 VIN + 0.3 V
VOUT 6 V
Peak output current Internally limited
Continuous total power dissipation See Thermal Information
Junction temperature, TJ–40 150 °C
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
VALUE UNIT
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±2000
V(ESD) Electrostatic discharge V
Charged device model (CDM), per JEDEC specification JESD22-C101, all ±500
pins(2)
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating junction temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VIN Input supply voltage 2.7 5.5 V
IOUT Output current 0 1.5 A
TJOperating junction temperature –40 125 °C
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6.4 Thermal Information
TPS786(3)
THERMAL METRIC(1)(2) DRB (SON) DCQ (S0T-223) KTT (TO-263) UNIT
8 PINS 6 PINS 5 PINS
RθJA Junction-to-ambient thermal resistance 41.1 54.2 40.7 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 49.1 33.3 43.1 °C/W
RθJB Junction-to-board thermal resistance 16.6 8.9 21.5 °C/W
ψJT Junction-to-top characterization parameter 0.7 2.6 9.4 °C/W
ψJB Junction-to-board characterization parameter 16.8 8.8 20 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 5.2 N/A 2.1 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
(2) For thermal estimates of this device based on PCB copper area, see the TI PCB Thermal Calculator.
(3) Thermal data for the DRB, DCQ, and DRV packages are derived by thermal simulations based on JEDEC-standard methodology as
specified in the JESD51 series. The following assumptions are used in the simulations:
(a) i. DRB: The exposed pad is connected to the PCB ground layer through a 2×2 thermal via array.
.ii. DCQ: The exposed pad is connected to the PCB ground layer through a 3×2 thermal via array.
.iii. KTT: The exposed pad is connected to the PCB ground layer through a 5×4 thermal via array.
(b) i. DRB: The top and bottom copper layers are assumed to have a 20% thermal conductivity of copper representing a 20% copper
coverage.
.ii. DCQ: Each of top and bottom copper layers has a dedicated pattern for 20% copper coverage.
.iii. KTT: The top and bottom copper layers are assumed to have a 20% thermal conductivity of copper representing a 20% copper
coverage.
(c) These data were generated with only a single device at the center of a JEDEC high-K (2s2p) board with 3 inches × 3 inches copper
area. To understand the effects of the copper area on thermal performance, see the Power Dissipation and Estimating Junction
Temperature sections of this data sheet.
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6.5 Electrical Characteristics
Over recommended operating temperature range (TJ= –40°C to 125°C), VEN = VIN, VIN = VOUT(nom) + 1 V(1), IOUT = 1 mA,
COUT = 10 μF, and CNR = 0.01 μF, unless otherwise noted. Typical values are at 25°C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Input voltage, VIN(1) 2.7 5.5 V
Internal reference, VFB (TPS78601) 1.200 1.225 1.250 V
Continuous output current IOUT 0 1.5 A
Output voltage range TPS78601 1.225 5.5 – VDO V
TPS78601(2) 0μAIOUT 1.5 A, VOUT + 1 V VIN 5.5 V(1) (0.98)VOUT VOUT (1.02)VOUT V
Output Fixed VOUT 0μAIOUT 1.5 A, VOUT + 1 V VIN 5.5 V(1) –2% 2%
voltage Accuracy < 5 V
Fixed VOUT 0μAIOUT 1.5 A, VOUT + 1 V VIN 5.5 V(1) –3% 3%
= 5 V
Output voltage line regulation (ΔVOUT%/VIN)(1) VOUT + 1 V VIN 5.5 V 5 12 %/V
Load regulation (ΔVOUT%/VOUT) 0 μAIOUT 1.5 A 7 mV
TPS78628 IOUT = 1.5 A 410 580
TPS78630 IOUT = 1.5 A 390 550
Dropout voltage(3) mV
VIN = VOUT(nom) – 0.1 V TPS78633 IOUT = 1.5 A 340 510
TPS78650 IOUT = 1.5 A 310 470
Output current limit VOUT = 0 V 2.4 4.2 A
Ground pin current 0 μAIOUT 1.5 A 260 385 μA
Shutdown current(4) VEN = 0 V, 2.7 V VIN 5.5 V 0.07 1 μA
FB pin current VFB = 1.225 V 1 μA
f = 100 Hz, IOUT = 10 mA 59
f = 100 Hz, IOUT = 1.5 A 52
Power-supply ripple rejection TPS78630 dB
f = 10 kHz, IOUT = 1.5 A 49
f = 100 kHz, IOUT = 1.5 A 32
CNR = 0.001 μF 66
CNR = 0.0047 μF 51
BW = 100 Hz to 100 kHz,
Output noise voltage (TPS78630) μVRMS
IOUT = 1.5 A CNR = 0.01 μF 49
CNR = 0.1 μF 48
CNR = 0.001 μF 50
Time, start-up (TPS78630) RL= 2 , COUT = 1 μF CNR = 0.0047 μF 75 μs
CNR = 0.01 μF 110
High-level enable input voltage 2.7 V VIN 5.5 V 1.7 VIN V
Low-level enable input voltage 2.7 V VIN 5.5 V 0 0.7 V
EN pin current VEN = 0 –1 1 μA
UVLO threshold VCC rising 2.25 2.65 V
UVLO hysteresis 100 mV
(1) Minimum VIN = VOUT + VDO or 2.7 V, whichever is greater. The TPS78650 is tested at VIN = 5.5 V.
(2) Tolerance of external resistors not included in this specification.
(3) Dropout is not measured for TPS78618 or TPS78625 because minimum VIN = 2.7 V.
(4) For adjustable version, this applies only after VIN is applied; then VEN transitions high to low.
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l TEXAS INSTRUMENTS 2793 ‘ ‘ / 3 \\ 25 mm) mm 350 w w w w s \ §§ ,/ \ 25 n r c; Frequency [m ”b HHH \‘HHH 3” HH \‘HHH S \W Hi HH \ \ \ HHHH \ A ‘== \ Z X x V . fi§~~. aux Fmfluzncy Ml) quuenCy w»
0.0
0.1
0.2
0.3
0.4
0.5
0.6
Frequency (Hz)
100 10k 100k1k
Output Spectral Noise Density (µVÖHz)
IOUT = 1 mA
IOUT = 1.5 A
VIN = 5.5 V
COUT = 10 µF
CNR = 0.1 µF
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Frequency (Hz)
100 10k 100k1k
Output Spectral Noise Density − (µVÖHz)
VIN = 5.5 V
COUT = 10 µF
IOUT = 1.5 A
CNR = 0.1 µF
CNR = 0.01 µF
CNR = 0.0047 µF
CNR = 0.001 µF
290
300
310
320
330
340
350
−40 −25 −10 5 20 35 50 65 80 95 110 125
IGND (µA)
TJ(°C)
VIN = 3.8 V
COUT = 10 µF
IOUT = 1 mA
IOUT = 1.5 A
0.00
0.10
0.20
0.30
0.40
0.50
0.60
0.70
0.80
Frequency (Hz)
100 10k 100k1k
Output Spectral Noise Density (µVÖHz)
IOUT = 1 mA
IOUT = 1.5 A
VIN = 5.5 V
COUT = 2.2 µF
CNR = 0.1 µF
0
1
2
3
4
5
−40 −25 −10 5 20 35 50 65 80 95 110 125
VOUT (V)
TJ(°C)
IOUT = 1 mA
2.798
2.794
2.790
2.782
2.778
IOUT = 1.5 A
VIN = 3.8 V
COUT = 10 µF
2.786
2.95
2.96
2.97
2.98
2.99
3.00
3.01
3.02
3.03
3.04
3.05
0.0 0.3 0.6 0.9 1.2 1.5
VOUT (V)
IOUT (A)
VIN = 4 V
COUT = 10 µF
TJ= 25°C
TPS786
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SLVS389M SEPTEMBER 2002REVISED SEPTEMBER 2015
6.6 Typical Characteristics
Figure 1. TPS78630 Output Voltage vs Output Current Figure 2. TPS78628 Output Voltage vs Junction
Temperature
Figure 4. TPS78630 Output Spectral Noise Density vs
Figure 3. TPS78628 Ground Current vs Junction Frequency
Temperature
Figure 5. TPS78630 Output Spectral Noise Density vs Figure 6. TPS78630 Output Spectral Noise Density vs
Frequency Frequency
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i TEXAS INSTRUMENTS ”ouwxxx Cm n n K 6» uM uM mm Hm) ”Hum ‘ m. "MNIIIIIHHIII Illllmmluu. III. NIIIIIHHIII uM mu)
0
10
20
30
40
50
60
70
80
f (Hz)
1 10k 10M1k
Ripple Rejection (dB)
IOUT = 1 mA
IOUT = 1.5 A
VIN = 4 V
COUT = 2.2 µF
CNR = 0.01 µF
10 100 100k 1M
0
10
20
30
40
50
60
70
80
f (Hz)
1 10k 10M1k
Ripple Rejection (dB)
IOUT = 1 mA
IOUT = 1.5 A
VIN = 4 V
COUT = 2.2 µF
CNR = 0.1 µF
10 100 100k 1M
0
10
20
30
40
50
60
70
80
f (Hz)
1 10k 10M1k
Ripple Rejection − (dB)
IOUT = 1 mA
IOUT = 1.5 A
VIN = 4 V
COUT = 10 µF
CNR = 0.01 µF
10 100 100k 1M
0
10
20
30
40
50
60
70
80
f (Hz)
1 10k 10M1k
Ripple Rejection (dB)
IOUT = 1 mA
IOUT = 1.5 A
VIN = 4 V
COUT = 10 µF
CNR = 0.1 µF
10 100 100k 1M
0
10
20
30
40
50
60
70
80
RMS Output Noise (µVRMS)
CNR ( F)µ
IOUT = 1.5 A
COUT = 10 µF
BW = 100 Hz to 100 kHz
0.001 µF 0.01 µF 0.1 µF0.0047 µF
0
100
200
300
400
500
600
−40 −25 −10 5 20 35 50 65 80 95 110 125
VDO (mV)
TJ(°C)
VIN = 2.7 V
COUT = 10 µF
IOUT = 1.5 A
TPS786
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Typical Characteristics (continued)
Figure 7. TPS78630 Root Mean Squared Output Noise vs Figure 8. TPS78628 Dropout Voltage vs Junction
Bypass Capacitance Temperature
Figure 9. TPS78630 Ripple Rejection vs Frequency Figure 10. TPS78630 Ripple Rejection vs Frequency
Figure 12. TPS78630 Ripple Rejection vs Frequency
Figure 11. TPS78630 Ripple Rejection vs Frequency
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l TEXAS INSTRUMENTS mm uuu mm sy suo n : mm >< law="" (may="" m="" m="">
0
100
200
300
400
500
600
0 200 400 600 800 1000 1200 1400
VDO (mV)
IOUT (mA)
TJ= 125°C
TJ= −40°C
TJ= 25°C
0
50
100
150
200
250
300
350
400
450
500
2.5 3.0 3.5 4.0 4.5 5.0
VDO (mV)
VIN (V)
TJ= 125°C
TJ= −40°C
TJ= 25°C
IOUT = 1.5 A
COUT = 10 µF
CNR = 0.01 µF
DVOUT (mV)
t (µs)
2
1
−1
−75
−150
0
0
75
150
IOUT (A)
3002001000 400 500 600 700 800 900 1000
VIN = 3.8 V
COUT = 10 µF
CNR = 0.01 µF
di
dt
1.5 A
µs
Time (µs)
4.0
3.5
2.5
0.5
0
3.0
1.0
1.5
2.0
VOUT (V)
4000 800 1200 1600 2000
VOUT = 2.5 V
RL= 1.6 W
CNR = 0.01 µF
VIN
VOUT
5
4
2
−30
−60
3
0
30
60
VIN (V)
t (µs)
6040200 80 100 120 140 160 180 200
IOUT = 1.5 A
COUT = 10 µF
CNR = 0.01 µF
dv
dt
1 V
µs
DVOUT (mV)
t(µs)
6
5
3
−40
−80
4
0
40
80
6040200 80 100 120 140 160 180 200
IOUT = 1.5 A
COUT = 10 µF
CNR = 0.01 µF
dv
dt
1 V
µs
VIN (V)
DVOUT (mV)
TPS786
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Typical Characteristics (continued)
Figure 13. TPS78618 Line Transient Response Figure 14. TPS78630 Line Transient Response
Figure 15. TPS78628 Load Transient Response Figure 16. TPS78625 Power Up and Power Down
Figure 17. TPS78630 Dropout Voltage vs Output Current Figure 18. TPS78601 Dropout Voltage vs Input Voltage
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l TEXAS INSTRUMENTS Vow mu Iom mm) mu low (MA) mu 'om (MA) usr
0
0.25
0.50
0.75
1
1.25
1.50
1.75
2
2.25
2.50
2.75
3
0 100 200 300 400 500 600
t (µs)
VIN = 4 V,
COUT = 10 µF,
IIN = 1.5 A
Enable
CNR =
0.01 µF
CNR =
0.001 µF
CNR =
0.0047 µF
VOUT (V)
ESR − Equivalent Series Resistance ( )W
IOUT (mA)
Region of
Instability
100
10
1
0.1
0.01
COUT = 2.2 µF
Region of Stability
1 500 1000 150030 125
ESR − Equivalent Series Resistance ( )W
IOUT (mA)
Region of
Instability
100
10
1
0.1
0.01
COUT = 10 µF
Region of Stability
1 500 1000 150030 125
2.0
2.5
3.0
3.5
4.0
4.5
5.0
1.5 2.0 2.5 3.0 3.5 4.0
MinimumVIN (V)
VOUT (V)
TJ=+125°C
IOUT =1.5A
TJ=+25°C
ESR − Equivalent Series Resistance ( )W
IOUT (mA)
Region of
Instability
100
10
1
0.1
0.01
COUT = 1 µF
Region of Stability
1 500 1000 150030 125
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Typical Characteristics (continued)
Figure 20. TPS78630 Typical Regions of Stability Equivalent
Figure 19. Minimum Required Input Voltage vs Output Series Resistance (ESR) vs Output Current
Voltage
Figure 21. TPS78630 Typical Regions of Stability Equivalent Figure 22. TPS78630 Typical Regions of Stability Equivalent
Series Resistance (ESR) vs Output Current Series Resistance (ESR) vs Output Current
Figure 23. Start-Up
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‘5‘ TEXAS INSTRUMENTS IIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIII
Current
Sense
Thermal
Shutdown
UVLO
UVLO
R1
R2
R2= 40 kW
Overshoot
Detect
250 kW
Quickstart
Bandgap
Reference
1.225 V
IN
VIN
EN
GND
NR
OUT
300W
VREF
ILIM SHUTDOWN
Current
Sense
Thermal
Shutdown
UVLO
UVLO
R1
FB
R2
External to
the Device
Overshoot
Detect
250 kW
Quickstart
Bandgap
Reference
1.225 V
IN
VIN
EN
GND
OUT
300W
VREF
ILIM SHUTDOWN
TPS786
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7 Detailed Description
7.1 Overview
The TPS786 family of low-dropout regulators offers low dropout voltages, high PSRR, and low-output noise.
7.2 Functional Block Diagrams
Figure 24. Functional Block Diagram—Adjustable Version
Figure 25. Functional Block Diagram—Fixed Version
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7.3 Feature Description
7.3.1 Regulator Protection
The TPS786 PMOS-pass transistor has a built-in back diode that conducts reverse current when the input
voltage drops below the output voltage (for example, during power down). Current is conducted from the output
to the input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting
might be appropriate.
The TPS786 features internal current limiting and thermal protection. During normal operation, the TPS786 limits
output current to approximately 2.8 A. When current limiting engages, the output voltage scales back linearly until
the overcurrent condition ends. While current limiting is designed to prevent gross device failure, take care not to
exceed the power dissipation ratings of the package. If the temperature of the device exceeds approximately
165°C, thermal-protection circuitry shuts it down. Once the device has cooled down to below approximately
140°C, regulator operation resumes.
7.4 Device Functional Modes
Driving EN over 1.7 V turns on the regulator. Driving EN below 0.7 V puts the regulator into shutdown mode,
thus reducing the operating current to 70 nA, nominal.
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‘5‘ TEXAS INSTRUMENTS
VIN VOUT
2.2 Fm
C1
R2
2.2 Fm
IN
EN
GND
OUT
FB
TPS78601 R1
1.8V 14.0kW30.1kW
57.9kW30.1kW
33pF
15pF3.6V
OUTPUT
VOLTAGE R1R2C1
OUTPUTVOLTAGE
PROGRAMMINGGUIDE
7
1 2
1
1 2
(3 10 ) (R R )
C(R R )
-
´ ´ +
=
´
OUT
1 2
REF
V
R 1 R
V
æ ö
= - ´
ç ÷
è ø
1
OUT REF
2
R
V V 1
R
æ ö
= ´ +
ç ÷
è ø
TPS786
www.ti.com
SLVS389M SEPTEMBER 2002REVISED SEPTEMBER 2015
8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The TPS786 family of low-dropout (LDO) regulators has been optimized for use in noise-sensitive equipment.
The device features extremely low dropout voltages, high PSRR, ultralow-output noise, low quiescent current
(265 μA, typically), and enable input to reduce supply currents to less than 1 μA when the regulator is turned off.
8.1.1 Programming the TPS78601 Adjustable LDO Regulator
The output voltage of the TPS78601 adjustable regulator is programmed using an external resistor divider as
shown in Figure 26. The output voltage is calculated using Equation 1:
where
• VREF = 1.2246 V typical (the internal reference voltage) (1)
Resistors R1and R2should be chosen for approximately 40-μA divider current. Lower value resistors can be
used for improved noise performance, but the device wastes more power. Higher values should be avoided, as
leakage current at FB increases the output voltage error.
The recommended design procedure is to choose R2= 30.1 kto set the divider current at 40 μA, C1= 15 pF for
stability, and then calculate R1using Equation 2.
(2)
To improve the stability of the adjustable version, TI suggests placing a small compensation capacitor between
OUT and FB.
The approximate value of this capacitor can be calculated using Equation 3:
(3)
The suggested value of this capacitor for several resistor ratios is shown in Figure 26. If this capacitor is not used
(such as in a unity-gain configuration), then the minimum recommended output capacitor is 2.2 μF instead of 1
μF.
Figure 26. TPS78601 Adjustable LDO Regulator Programming
Copyright © 2002–2015, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Links: TPS786
l TEXAS INSTRUMENTS
VIN VOUT
2.2 Fm
0.01 Fm
2.2 Fm
IN
EN GND
OUT
NR
TPS786xx
TPS786
SLVS389M SEPTEMBER 2002REVISED SEPTEMBER 2015
www.ti.com
8.2 Typical Application
A typical application circuit is shown in Figure 27.
Figure 27. Typical Application Circuit
8.2.1 Design Requirements
Table 1 shows the design parameters for this application.
Table 1. Design Parameters
DESIGN PARAMETERS EXAMPLE VALUE
Minimum = 4 V
VIN (from DCDC) Maximum = 5.5 V
VOUT 3 V ± –1%
Minimum = 1 mA
IOUT Maximum = 1.5 A
PSRR at 1K >50 db
Noise at 1K <20 µV/Hz
8.2.2 Detailed Design Procedure
Select TPS78630 to satisfy the VOUT requirements. The fixed version of the device is chosen to save board
space and reduce BOM cost.
Use a 2.2-uF capacitor on both the input and output to satisfy the capacitor requirements. Select a 0.1-uF NR
capacitor to satisfy the noise requirement.
8.2.2.1 External Capacitor Requirements
A 2.2-μF or larger ceramic input bypass capacitor, connected between IN and GND and located close to the
TPS786, is required for stability and improves transient response, noise rejection, and ripple rejection. A higher-
value input capacitor may be necessary if large, fast-rise-time load transients are anticipated and the device is
located several inches from the power source.
Like most low-dropout regulators, the TPS786 requires an output capacitor connected between OUT and GND to
stabilize the internal control loop. The minimum recommended capacitor is 1 μF. Any 1-μF or larger ceramic
capacitor is suitable.
The internal voltage reference is a key source of noise in an LDO regulator. The TPS786 has an NR pin that is
connected to the voltage reference through a 250-kinternal resistor. The 250-kinternal resistor, in
conjunction with an external bypass capacitor connected to the NR pin, creates a low pass filter to reduce the
voltage reference noise and, therefore, the noise at the regulator output. For the regulator to operate properly,
the current flow out of the NR pin must be at a minimum, because any leakage current creates an IR drop across
the internal resistor, thus creating an output error. Therefore, the bypass capacitor must have minimal leakage
current. The bypass capacitor should be no more than 0.1-μF to ensure that it is fully charged during the
quickstart time provided by the internal switch shown in Functional Block Diagrams.
For example, the TPS78630 exhibits only 48 μVRMS of output voltage noise using a 0.1-μF ceramic bypass
capacitor and a 10-μF ceramic output capacitor. The output starts up slower as the bypass capacitance
increases due to the RC time constant at the bypass pin that is created by the internal 250-kresistor and
external capacitor.
14 Submit Documentation Feedback Copyright © 2002–2015, Texas Instruments Incorporated
Product Folder Links: TPS786
l TEXAS INSTRUMENTS mm W w Frequency (m
0
10
20
30
40
50
60
70
80
f (Hz)
1 10k 10M1k
Ripple Rejection − (dB)
IOUT = 1 mA
IOUT = 1.5 A
VIN = 4 V
COUT = 10 µF
CNR = 0.01 µF
10 100 100k 1M
0.00
0.10
0.20
0.30
0.40
0.50
0.60
0.70
0.80
Frequency (Hz)
100 10k 100k1k
Output Spectral Noise Density (µVÖHz)
IOUT = 1 mA
IOUT = 1.5 A
VIN = 5.5 V
COUT = 2.2 µF
CNR = 0.1 µF
TPS786
www.ti.com
SLVS389M SEPTEMBER 2002REVISED SEPTEMBER 2015
8.2.3 Application Curves
Figure 29. Output Spectral Noise Density vs
Figure 28. Ripple Rejection vs Frequency Frequency
Copyright © 2002–2015, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Links: TPS786
l TEXAS INSTRUMENTS WW
EN
1
2
3
4
8
7
6
5
GND PLANE
CIN
R1
R2
IN N/C
GND
VIN
VOUT
IN
OUT
OUT NR/FB
COUT
GND PLANE
TPS786
SLVS389M SEPTEMBER 2002REVISED SEPTEMBER 2015
www.ti.com
9 Power Supply Recommendations
These devices are designed to operate from an input voltage supply range from 2.7 V to 5.5 V. The input voltage
range provides adequate headroom for the device to have a regulated output. This input supply is well-regulated
and stable. If the input supply is noisy, additional input capacitors with low ESR can help improve the output
noise performance.
10 Layout
10.1 Layout Guidelines
To improve AC measurements like PSRR, output noise, and transient response, TI recommends designing the
board with separate ground planes for VIN and VOUT, with each ground plane connected only at the ground pin of
the device. In addition, the ground connection for the bypass capacitor should connect directly to the ground pin
of the device.
10.2 Layout Examples
Figure 30. Recommended Layout – Adjustable-Voltage Version
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Product Folder Links: TPS786
l TEXAS INSTRUMENTS PD (IN OUT ) OUT WW 4%
D IN OUT OUT
P V V I u
EN
1
2
3
4
8
7
6
5
GND PLANE
CIN
CNR
IN N/C
GND
VIN
VOUT
IN
OUT
OUT NR/FB
COUT
GND PLANE
TPS786
www.ti.com
SLVS389M SEPTEMBER 2002REVISED SEPTEMBER 2015
Layout Examples (continued)
Figure 31. Recommended Layout – Fixed-Voltage Version
10.3 Regulator Mounting
The tab of the SOT223-6 package is electrically connected to ground. For best thermal performance, the tab of
the surface-mount version should be soldered directly to a circuit-board copper area. Increasing the copper area
improves heat dissipation.
Solder pad footprint recommendations for the devices are presented in Application Report SBFA015,Solder Pad
Recommendations for Surface-Mount Devices, available from the TI website at www.ti.com.
10.4 Power Dissipation
Knowing the device power dissipation and proper sizing of the thermal plane that is connected to the tab or pad
is critical to avoiding thermal shutdown and ensuring reliable operation.
Power dissipation of the device depends on input voltage and load conditions and can be calculated using
Equation 4:
(4)
Power dissipation can be minimized and greater efficiency can be achieved by using the lowest possible input
voltage necessary to achieve the required output voltage regulation.
Copyright © 2002–2015, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Links: TPS786
l TEXAS INSTRUMENTS 1y
Y Y
JT J T JT D
:T =T + P·
Y Y
JB J B JB D
:T =T + P·
160
140
120
100
80
60
40
20
0
qJA ( C/W)
°
0 1 2 3 4 5 678 9 10
Board Copper Area ( )in2
DCQ
DRB
KTT
 
A
JA D
125 C T
RP
T
q 
TPS786
SLVS389M SEPTEMBER 2002REVISED SEPTEMBER 2015
www.ti.com
Power Dissipation (continued)
On the SON (DRB) package, the primary conduction path for heat is through the exposed pad to the printed-
circuit-board (PCB). The pad can be connected to ground or be left floating; however, it should be attached to an
appropriate amount of copper PCB area to ensure the device does not overheat. On both SOT-223 (DCQ) and
DDPAK (KTT) packages, the primary conduction path for heat is through the tab to the PCB. That tab should be
connected to ground. The maximum junction-to-ambient thermal resistance depends on the maximum ambient
temperature, maximum device junction temperature, and power dissipation of the device and can be calculated
using Equation 5:
(5)
Knowing the maximum RθJA, the minimum amount of PCB copper area needed for appropriate heatsinking can
be estimated using Figure 32.
Note: θJA value at board size of 9in2(that is, 3in × 3in) is a JEDEC standard.
Figure 32. θJA vs Board Size
Figure 32 shows the variation of θJA as a function of ground plane copper area in the board. It is intended only as
a guideline to demonstrate the effects of heat spreading in the ground plane and should not be used to estimate
actual thermal performance in real application environments.
NOTE
When the device is mounted on an application PCB, TI strongly recommends using ΨJT
and ΨJB, as explained in the section.
10.4.1 Estimating Junction Temperature
Using the thermal metrics ΨJT and ΨJB, as shown in the Thermal Information table, the junction temperature can
be estimated with corresponding formulas (given in Equation 6). For backwards compatibility, an older θJC,Top
parameter is listed as well.
where
• PDis the power dissipation shown by Equation 5.
• TTis the temperature at the center-top of the IC package.
• TBis the PCB temperature measured 1mm away from the IC package on the PCB surface (as Figure 34 shows). (6)
18 Submit Documentation Feedback Copyright © 2002–2015, Texas Instruments Incorporated
Product Folder Links: TPS786
l TEXAS INSTRUMENTS
35
30
25
20
15
10
5
0
Y Yand ( C/W)
JT JB °
0 2 46 8 10
Board Copper Area (in )
2
51 3 7 9
DCQ YJT
DCQ
DRB
KTT
KTT YJT
DRB YJT
YJB
TPS786
www.ti.com
SLVS389M SEPTEMBER 2002REVISED SEPTEMBER 2015
Power Dissipation (continued)
NOTE
Both TTand TBcan be measured on actual application boards using a thermo-gun (an
infrared thermometer).
For more information about measuring TTand TB, see the application note SBVA025,Using New Thermal
Metrics, available for download at www.ti.com.
By looking at Figure 33, the new thermal metrics (ΨJT and ΨJB) have very little dependency on board size. That
is, using ΨJT or ΨJB with Equation 6 is a good way to estimate TJby simply measuring TTor TB, regardless of the
application board size.
Figure 33. ΨJT and ΨJB vs Board Size
For a more detailed discussion of why TI does not recommend using θJC(top) to determine thermal characteristics,
see application report Using New Thermal Metrics,SBVA025, available for download at www.ti.com. For further
information, see application report IC Package Thermal Metrics,SPRA953, also available on the TI website.
Copyright © 2002–2015, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Links: TPS786
l TEXAS INSTRUMENTS n7 V/Vl / //. / my mama DRE wsoN, name Mcasummcrl MM: rm [mm DCO 5m 22:, name Mcasummcrl my mum >0ch 263, new; Mnasumnnnl
(a) Example DRB (VSON) Package Measurement (b) Example DCQ (SOT-223) Package Measurement
1mm
T on top
T
of IC
T on PCB
B
surface
(c) Example KTT (TO-263) Package Measurement
1mm X
X
TT
TB
1mm
T on of IC
Ttop (1)
T on PCB
B
surface(2)
TPS786
SLVS389M SEPTEMBER 2002REVISED SEPTEMBER 2015
www.ti.com
(1) TTis measured at the center of both the X- and Y-dimensional axes.
(2) TBis measured below the package lead on the PCB surface.
Figure 34. Measuring Points for TTand TB
20 Submit Documentation Feedback Copyright © 2002–2015, Texas Instruments Incorporated
Product Folder Links: TPS786
l TEXAS INSTRUMENTS
TPS786
www.ti.com
SLVS389M SEPTEMBER 2002REVISED SEPTEMBER 2015
11 Device and Documentation Support
11.1 Device Support
11.1.1 Development Support
11.1.1.1 Evaluation Modules
An evaluation module (EVM) is available to assist in the initial circuit performance evaluation using the TPS786.
This EVM, TPS78601DRBEVM Single Output LDO, can be requested at the Texas Instruments website through
the product folders or purchased directly from the TI eStore.
11.1.1.2 Spice Models
Computer simulation of circuit performance using SPICE is often useful when analyzing the performance of
analog circuits and systems. A SPICE model for the TPS786 devices are available through the product folders
under simulation models.
11.1.2 Device Nomenclature
Table 2. Ordering Information
PRODUCT VOUT(1)
TPS786xxyyyzXX is nominal output voltage (for example, 28 = 2.8 V, 285 = 2.85 V, 01 = Adjustable).
YYY is package designator.
Zis package quantity.
(1) Output voltages from 1.3 V to 5.0 V in 100-mV increments are available; minimum order quantities may apply. Contact factory for details
and availability.
11.2 Documentation Support
11.2.1 Related Documentation
For related documentation see the following:
Using New Thermal Metrics,SBVA025.
Semiconductor and IC Package Thermal Metrics,SPRA953.
Solder Pad Recommendations for Surface-Mount Devices,SBFA015.
11.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.4 Trademarks
E2E is a trademark of Texas Instruments.
PowerPAD is a trademark of Texas Instruments Inc.
Bluetooth is a registered trademark of Bluetooth SIG, Inc.
All other trademarks are the property of their respective owners.
11.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Copyright © 2002–2015, Texas Instruments Incorporated Submit Documentation Feedback 21
Product Folder Links: TPS786
l TEXAS INSTRUMENTS
TPS786
SLVS389M SEPTEMBER 2002REVISED SEPTEMBER 2015
www.ti.com
11.6 Glossary
SLYZ022 TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
22 Submit Documentation Feedback Copyright © 2002–2015, Texas Instruments Incorporated
Product Folder Links: TPS786
I TEXAS INSTRUMENTS Samples Samples Samples Samples Samples Samples Samples Samples Samples Samples Samples Samples Samples Samples Samples Samples Samples Samples Samples
PACKAGE OPTION ADDENDUM
www.ti.com 10-Dec-2020
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TPS78601DCQ ACTIVE SOT-223 DCQ 6 78 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 PS78601
TPS78601DCQR ACTIVE SOT-223 DCQ 6 2500 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 PS78601
TPS78601DCQRG4 ACTIVE SOT-223 DCQ 6 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PS78601
TPS78601DRBR ACTIVE SON DRB 8 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 OCI
TPS78601DRBT ACTIVE SON DRB 8 250 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 OCI
TPS78601KTTR ACTIVE DDPAK/
TO-263 KTT 5 500 RoHS & Green Call TI | SN Level-2-260C-1 YEAR TPS
78601
TPS78601KTTRG3 ACTIVE DDPAK/
TO-263 KTT 5 500 RoHS & Green SN Level-2-260C-1 YEAR TPS
78601
TPS78618DCQ ACTIVE SOT-223 DCQ 6 78 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PS78618
TPS78618DCQR ACTIVE SOT-223 DCQ 6 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PS78618
TPS78618KTTR ACTIVE DDPAK/
TO-263 KTT 5 500 RoHS & Green Call TI | SN Level-2-260C-1 YEAR TPS
78618
TPS78618KTTRG3 ACTIVE DDPAK/
TO-263 KTT 5 500 RoHS & Green SN Level-2-260C-1 YEAR TPS
78618
TPS78625DCQ ACTIVE SOT-223 DCQ 6 78 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PS78625
TPS78625DCQG4 ACTIVE SOT-223 DCQ 6 78 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PS78625
TPS78625DCQR ACTIVE SOT-223 DCQ 6 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PS78625
TPS78625KTTR ACTIVE DDPAK/
TO-263 KTT 5 500 RoHS & Green Call TI | SN Level-2-260C-1 YEAR TPS
78625
TPS78628DCQR ACTIVE SOT-223 DCQ 6 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PS78628
TPS78628KTTT ACTIVE DDPAK/
TO-263 KTT 5 50 RoHS & Green Call TI | SN Level-2-260C-1 YEAR -40 to 125 TPS
78628
TPS78630DCQ ACTIVE SOT-223 DCQ 6 78 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PS78630
TPS78630DCQR ACTIVE SOT-223 DCQ 6 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PS78630
I TEXAS INSTRUMENTS Samples Samples Samples Sample: Sample: Samples Samples
PACKAGE OPTION ADDENDUM
www.ti.com 10-Dec-2020
Addendum-Page 2
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TPS78630KTTT ACTIVE DDPAK/
TO-263 KTT 5 50 RoHS & Green Call TI | SN Level-2-260C-1 YEAR -40 to 125 TPS
78630
TPS78633DCQ ACTIVE SOT-223 DCQ 6 78 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PS78633
TPS78633DCQG4 ACTIVE SOT-223 DCQ 6 78 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PS78633
TPS78633DCQR ACTIVE SOT-223 DCQ 6 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PS78633
TPS78633DCQRG4 ACTIVE SOT-223 DCQ 6 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 PS78633
TPS78633KTTR ACTIVE DDPAK/
TO-263 KTT 5 500 RoHS & Green Call TI | SN Level-2-260C-1 YEAR TPS
78633
TPS78633KTTRG3 ACTIVE DDPAK/
TO-263 KTT 5 500 RoHS & Green SN Level-2-260C-1 YEAR TPS
78633
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
I TEXAS INSTRUMENTS
PACKAGE OPTION ADDENDUM
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Addendum-Page 3
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
I TEXAS INSTRUMENTS REEL DIMENSIONS TAPE DIMENSIONS ’ I‘KO '«Pt» Reel DlameIer A0 Dimension designed to accommodate the component Width Bo Dimension designed to accommodate the component Iength K0 Dimension designed to accommodate the component thickness 7 w Overau Wiotn ot the carrier Iape i P1 Pitch between successive cawty centers f T Reel Width (W1) QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE DOODOOOD ,,,,,,,,,,, ‘ User Direcllon 0' Feed SprockeI Hoies Pockel Quadrams
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TPS78601DCQR SOT-223 DCQ 6 2500 330.0 12.4 7.1 7.45 1.88 8.0 12.0 Q3
TPS78601DCQRG4 SOT-223 DCQ 6 2500 330.0 12.4 7.1 7.45 1.88 8.0 12.0 Q3
TPS78601DRBR SON DRB 8 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
TPS78601DRBT SON DRB 8 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
TPS78618DCQR SOT-223 DCQ 6 2500 330.0 12.4 7.1 7.45 1.88 8.0 12.0 Q3
TPS78625DCQR SOT-223 DCQ 6 2500 330.0 12.4 7.1 7.45 1.88 8.0 12.0 Q3
TPS78628DCQR SOT-223 DCQ 6 2500 330.0 12.4 7.1 7.45 1.88 8.0 12.0 Q3
TPS78630DCQR SOT-223 DCQ 6 2500 330.0 12.4 7.1 7.45 1.88 8.0 12.0 Q3
TPS78633DCQR SOT-223 DCQ 6 2500 330.0 12.4 7.1 7.45 1.88 8.0 12.0 Q3
PACKAGE MATERIALS INFORMATION
www.ti.com 10-Mar-2021
Pack Materials-Page 1
I TEXAS INSTRUMENTS TAPE AND REEL BOX DIMENSIONS
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS78601DCQR SOT-223 DCQ 6 2500 367.0 367.0 35.0
TPS78601DCQRG4 SOT-223 DCQ 6 2500 346.0 346.0 29.0
TPS78601DRBR SON DRB 8 3000 853.0 449.0 35.0
TPS78601DRBT SON DRB 8 250 210.0 185.0 35.0
TPS78618DCQR SOT-223 DCQ 6 2500 346.0 346.0 29.0
TPS78625DCQR SOT-223 DCQ 6 2500 346.0 346.0 29.0
TPS78628DCQR SOT-223 DCQ 6 2500 346.0 346.0 41.0
TPS78630DCQR SOT-223 DCQ 6 2500 346.0 346.0 41.0
TPS78633DCQR SOT-223 DCQ 6 2500 346.0 346.0 29.0
PACKAGE MATERIALS INFORMATION
www.ti.com 10-Mar-2021
Pack Materials-Page 2
MECHANICAL DATA KTT (R7PSFM705) PLASTiC FLANGEiMOUNT PACKAGE 15. 88 6.86 Min r i I I I I I I I I I I L M. 60 0PTi0NAL LEAD FORM 420057774/5 (Ti/i] NOTES: A. AH iinear dimensions are in miliimeters. E This drawing is subject to change without notice. C, Body dimensions do not inciude moid flash or protrusion, Mold iiash or protrusion not to exceed 0,005 (0,13) per side, & Fails within JEDEC T0—263 variation BA. except minimum iead thickness. maximum seating height, and minimum body ienqth. 41* INSTRUMENTS www.li.com
LAND PATTERN DATA KTT (R—PSFM—G5) PLASTIC FLANGE—MOUNT PACKAGE \ / Pad Geometry \ // Example Boord Layout Example stencil Design (Note C) (Note D) ‘°-7 Copper Area ms (Note F) 36 — — 35 _ _ .L .L Elana w l i H - — 4m Example f» k 1,0 Solder Musk Opening / / ("“9 E) 3,4 1 I / I —— ‘— o.o7 / All Around/ / (Note c) lzoazossJ/c 05/12 NOTES: Ad All linear dimensions are in millimeters. E. This drawing is subject to chonge without notice c. Puoiicotion iPc—SM—7az is recommended ior oitemote designs, 9. Loser cutting opertures with trapezoidal wells and also rounding corners will oiler oetler poste release. Customers should contoct their board assembly site lor stencil design recommendolions Refer to iPc—ms, E. Customers should contoct their board iotiricotion site ior soider musk loleronces between ond oround signoi pods. F This package is designed to he soldered to o lhennol pad on the board. Reier lo the Produet Dolosheel tor speciiie thermal iniormotion. v‘ia requirements, and recommended thermal pad size. For thermal pad sizes iorger thon shown o soider musk deiined pad is recommended in order to moinlcin the soiderooie pod geometry while increosing copper creo, {if Tam INSTRUMENTS wwwxi .com
MECHANICAL DATA DCQ (R7PUS’37GV3) 3‘ AST‘C SMA‘ \ 70U’ N7 NO'ES: A, AH Hmr dimensmrs c'e m ‘mmes (mummrs) £ ‘6“ WW and Mums ”mm mm w some, B TH: drawmq \s subje 0 change wan: nohce, mum W5 0 Contm‘hnq WWW m inches 5 \nteneaa flash oHow 0.008 1m max Rudy \enqih c'vd mm dimensms are ce‘ermined m H Cum hu'r/prmmswon Wax 0305 «ch. we DMEN’HJS‘ extremes m 1776 mm body exc‘uswe ‘ NW A W B are m be dammed at Dow H or rm‘c Vash‘ fie bar bnr's, gate ms, m mzcflcad Hush, bu: inmd'wg ury msymtcr between (12 my and we bunum uf U‘e mam body & Lead mm c'mcnsmn does not mam dambav prot'usiur, W MAS INSTRUMENTS www.li.com
LAND PATTERN DATA "’ \ , Rinn I‘ 7 __ DC‘W \F- Cr”); 4 ,r’\:: L :uMwL, LL ,HE ’xumwe Ruard \clymn “WW 3‘6": WWW: (Nuts D) (Note c) > ‘ ' > < flflflflk="" _="" ~§:h*elhh+}="" 4="" l,="" -="" emma="" ngr'="" puwev="" dwsswpulun="" luyuut="" .="" number="" at="" \ucuhm="" 04="" via:="" may="" vary="" 3'="" w="" somww="" mm="" m="" \="" depend'ug="" (m="" boa="" d="" \uyuul="" cuvstmnts="" \_="" so‘de'="" mcsk="" opening="" (note="" r)="" we="" :=""> \- “ ' / 3:: Geometry / (Nuts 5) N Mmr d'mflswons on; W memcturs VOTES A B W5 meinq is mm to mange when wofice C D Jub‘ an WCrSMi/EQ s 'eccm'ne'vded {or a‘iemute des‘qr‘s Loser mm; upertLres w'm trupezmdu‘ wuHs um u‘sc round 1L] come's w‘ cfle' bette' paste re‘euse Custcmers mum chuc: \rexr beard assemb‘y s'te «m Ste'vc" des'gn recommenduhcns, Cus‘cmem 57!on Emma: New board Vclbflcahon sfle for So‘cer mask m e'ance: between and amund S‘qnu‘ pads ’ P‘euse refer tn he produd data sheet for specific vwa ard herma‘ dsswpuhur reqmremerts {9m INSTRUMENTS www.li.com
GENERIC PACKAGE VIEW DRB 8 VSON - 1 mm max heigfl PLASTIC SMALL OUTLINE , N0 LEAD Images above are JUSI a representation of me package family, aclual package may vary. Refer lo the product data sheel for package details, 4203462/L ' TEXAS INSTRUMENTS
SM“ 1 w““‘+“‘ \\
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PACKAGE OUTLINE
C
8X 0.35
0.25
2.4 0.05
2X
1.95
1.65 0.05
6X 0.65
1 MAX
8X 0.5
0.3
0.05
0.00
A3.1
2.9 B
3.1
2.9
(0.2) TYP
VSON - 1 mm max heightDRB0008B
PLASTIC SMALL OUTLINE - NO LEAD
4218876/A 12/2017
PIN 1 INDEX AREA
SEATING PLANE
0.08 C
1
45
8
(OPTIONAL)
PIN 1 ID 0.1 C A B
0.05 C
THERMAL PAD
EXPOSED
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
SCALE 4.000
T» h
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EXAMPLE BOARD LAYOUT
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
8X (0.3)
(2.4)
(2.8)
6X (0.65)
(1.65)
( 0.2) VIA
TYP
(0.575)
(0.95)
8X (0.6)
(R0.05) TYP
VSON - 1 mm max heightDRB0008B
PLASTIC SMALL OUTLINE - NO LEAD
4218876/A 12/2017
SYMM
1
45
8
LAND PATTERN EXAMPLE
SCALE:20X
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
SOLDER MASK
OPENING
SOLDER MASK
METAL UNDER
SOLDER MASK
DEFINED
METAL
SOLDER MASK
OPENING
SOLDER MASK DETAILS
NON SOLDER MASK
DEFINED
(PREFERRED)
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EXAMPLE STENCIL DESIGN
(R0.05) TYP
8X (0.3)
8X (0.6)
(1.47)
(1.06)
(2.8)
(0.63)
6X (0.65)
VSON - 1 mm max heightDRB0008B
PLASTIC SMALL OUTLINE - NO LEAD
4218876/A 12/2017
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD
81% PRINTED SOLDER COVERAGE BY AREA
SCALE:25X
SYMM
1
45
8
METAL
TYP
SYMM
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