MAX1117-1119 Datasheet by Maxim Integrated

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General Description
The MAX1117/MAX1118/MAX1119 low-power, 8-bit,
dual-channel, analog-to-digital converters (ADCs) fea-
ture an internal track/hold (T/H) voltage reference
(MAX1117/MAX1119), clock, and serial interface. The
MAX1118 is specified from +2.7V to +5.5V and con-
sumes only 135µA at 100ksps. The MAX1117 is speci-
fied from +2.7V to +3.6V, and the MAX1119 is specified
from +4.5V to +5.5V, each consumes only 175µA at
100ksps.
The full-scale analog input range is determined by the
internal reference of +2.048V (MAX1117) or +4.096V
(MAX1119), or by an externally applied reference rang-
ing from +1V to VDD (MAX1118). All devices feature an
automatic shutdown mode that reduces supply current
to <1µA when the device is not in use. The 3-wire serial
interface directly connects to SPI™, QSPI™, and
MICROWIRE™ devices without external logic.
Conversions up to 100ksps are performed using an
internal clock.
The MAX1117/MAX1118/MAX1119 are available in an
8-pin SOT23 package with a footprint that is only 11%
of an 8-pin plastic DIP.
________________________Applications
Low-Power, Handheld Portable Devices
System Diagnostics
Battery-Powered Test Equipment
Solar-Powered Remote Systems
Receive Signal Strength Indicators
4mA to 20mA Powered Remote Data Acquisition
Systems
Features
Single Supply
+2.7V to +3.6V (MAX1117)
+2.7V to +5.5V (MAX1118)
+4.5V to +5.5V (MAX1119)
Internal Track/Hold: 100kHz Sampling Rate
Internal Reference
+2.048V (MAX1117)
+4.096V (MAX1119)
Reference Input Range: 0 to VDD (MAX1118)
SPI/QSPI/MICROWIRE-Compatible Serial Interface
Small 8-Pin SOT23 Package
Automatic Power-Down
Analog Input Range: 0 to VREF
Low Power
175µA at 100ksps (typ) (MAX1117/MAX1119)
135µA at 100ksps (typ) (MAX1118)
18µA at 10ksps (typ)
1µA (typ) in Power-Down Mode
MAX1117/MAX1118/MAX1119
Single-Supply, Low-Power,
2-Channel, Serial 8-Bit ADCs
________________________________________________________________ Maxim Integrated Products 1
1
2
3
4
8
7
6
5
SCLK
DOUT
CNVST
GND
( ) ARE FOR MAX1118 ONLY
CH1
CHO
VDD
MAX1117
MAX1118
MAX1119
SOT23
TOP VIEW
(REF) I.C
Pin Configuration
19-1857; Rev 0; 11/00
EVALUATION KIT
AVAILABLE
Ordering Information
PART
TEMP. RANGE
PIN-
PA CK A G E
TO P
M A RK
M A X1 1 1 7 EKA
-40°C to +85°C
8 SOT23
AADW
M A X1 1 1 8 E K A
-40°C to +85°C
8 SOT23 AADX
M A X1 1 1 9 E K A
-40°C to +85°C
8 SOT23 AADY
SPI/QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor, Corp.
Functional Diagram appears at end of data sheet.
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim's website at www.maxim-ic.com.
[VI A X IIVI
MAX1117/MAX1118/MAX1119
Single-Supply, Low-Power,
2-Channel, Serial 8-Bit ADCs
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VDD = +2.7V to +3.6V (MAX1117), VDD = +4.5V to +5.5V (MAX1119), VDD = REF = +2.7V to +5.5V (MAX1118),TA= TMIN to TMAX,
unless otherwise noted.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDD to GND...........................................................-0.3V to +6.0V
CH0,CH1, REF to GND...............................-0.3V to (VDD + 0.3V)
Digital Output to GND ................................-0.3V to (VDD + 0.3V)
Digital Input to GND ..............................................-0.3V to +6.0V
Maximum Current into Any Pin .........................................±50mA
Continuous Power Dissipation (TA= +70°C)
8-Pin SOT23 (derate 8.9mW/°C above +70°C)............714mW
Operating Temperature Range
MAX1117EKA ..................................................-40°C to + 85°C
MAX1118EKA ..................................................-40°C to + 85°C
MAX1119EKA ..................................................-40°C to + 85°C
Storage Temperature Range .............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX
DC ACCURACY
Resolution
8
Bits
Relative Accuracy (Note 1) INL
±1LSB
Differential Nonlinearity DNL
±1LSB
Offset Error
±0.5 LSB
MAX1118, REF = VDD
±1LSB
Gain Error MAX1117/MAX1119
±5%FSR
MAX1118
±5
Gain Temperature Coefficient MAX1117/MAX1119
±90 ppm/°C
Total Unadjusted Error TUE MAX1118
±0.5 ±1LSB
Channel-to-Channnel Offset
Matching
±0.1 LSB
DYNAMIC PERFORMANCE (25kHz sinewave input, VIN = VREF(pp), fSCLK = 5MHz, fsample = 100ksps, RIN = 100Ω)
Signal-to-Noise Plus Distortion
SINAD 48
dB
Total Harmonic Distortion
(Up to the 5th Harmonic) THD
-69
dB
Spurious-Free Dynamic Range SFDR
66
dB
Small Signal Bandwidth f-3dB
4MHz
ANALOG INPUT
Input Voltage Range
0V
REF
V
Input Leakage
Current VCH_ = 0 or VDD
±0.7 ±10 µA
Input Capacitance CIN
18
pF
INTERNAL REFERENCE
MAX1117
2.048
Voltage VREF MAX1119
4.096
V
MAX1117/MAX1118/MAX1119
Single-Supply, Low-Power,
2-Channel, Serial 8-Bit ADCs
_______________________________________________________________________________________ 3
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX
UNITS
EXTERNAL REFERENCE (MAX1118 ONLY)
Input Voltage Range
1.0 VDD
V
Input Current Ave, VDD = REF = +5.5V at 100ksps
10 20
µA
POWER REQUIREMENTS
MAX1118
2.7 5.5
MAX1117
2.7 5.5
Supply Voltage VDD
MAX1119
4.5 5.5
V
MAX1119, fSAMPLE = 100ksps,
zero-scale input
182 230
MAX1117/MAX1118, fSAMPLE = 100ksps,
zero-scale input
135 190
MAX1119, fSAMPLE = 10ksps,
zero-scale input
19 25
MAX1117/MAX1118, fSAMPLE = 10ksps,
zero-scale input
14 21
Supply Current (Note 2) IDD
Shutdown
0.8 10
µA
Supply Rejection Ratio PSRR Full-scale or 0 input
±0.5 ±1
LSB/V
DIGITAL INPUTS (CNVST AND SCLK)
Input High Voltage VIH
2
V
Input Low Voltage VIL
0.8
V
Input Hystersis
VHYST 0.2
V
Input Current High IIH
±10
µA
Input Current Low IIL
±10
µA
Input Capacitance CIN
2
pF
DIGITAL OUTPUT (DOUT)
Output High Voltage VOH ISOURCE = 2mA
VDD - 0.5
V
ISINK = 2mA
0.4
V
Output Low Voltage VOL ISINK = 4mA
0.8
V
Three-State Leakage Current IL
±0.01 ±10
µA
Three-State Output Capacitance
COUT
4
pF
TIMING CHARACTERISTICS (Figures 6a–6d)
CNVST High Time tcsh
100
ns
CNVST Low Time tcsi
100
ns
Conversion Time tconv
7.5
µs
Serial Clock High Time tch
75
ns
Serial Clock Low Time tcl
75
ns
Serial Clock Period tcp
200
ns
Falling of CNVST to DOUT Active
tcsd CLOAD = 100pF, Figure 1
100
ns
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.7V to +3.6V (MAX1117), VDD = +4.5V to +5.5V (MAX1119), VDD = REF = +2.7V to +5.5V (MAX1118),TA= TMIN to TMAX,
unless otherwise noted.)
sumv CURRENT wA» man mu H] 01 MAX "3 SUN” BUHHENI v . EDNVERSIIIN RATE _/ / u m u I CDNVERS 0N [kspfi m mu SUPPLV CURRENT (“m mu V40 ‘20 H0 an 60 4a 20 sumv vuLTAuE m [VI/J XI [VI
Typical Operating Characteristics
(VDD = +3V (MAX1117), VDD = +5V (MAX1119), VDD = VREF = +3V (MAX1118), fSCLK = 5MHz, fSAMPLE = 100ksps, CLOAD = 100pF,
TA = +25°C, unless otherwise noted.)
MAX1117/18/19 toc01
-1.0
-0.4
-0.6
-0.8
-0.2
0
0.2
0.4
0.6
0.8
1.0
0 10050 150 200 250 300
INTEGRAL NONLINEARITY
vs.OUTPUT CODE
OUTPUT CODE
INL (LSB)
010050 150 200 250 300
DIFFERENTIAL NONLINEARITY
vs.OUTPUT CODE
MAX1117/18/19 toc02
OUTPUT CODE
DNL (LSB)
-1.0
-0.4
-0.6
-0.8
-0.2
0
0.2
0.4
0.6
0.8
1.0
0
0.2
0.1
0.4
0.3
0.6
0.5
0.7
SHUTDOWN SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX1117/18/19 toc03
SUPPLY VOLTAGE (V)
SHUTDOWN CURRENT (μA)
2.5 3.5 4.5 5.5
0.1
0.01 0.1 1 10 100
MAX1118
SUPPLY CURRENT vs. CONVERSION RATE
1.0
MAX1117/18/19 toc04
CONVERSION (ksps)
SUPPLY CURRENT (μA)
100.0
10.0
VDD = VREF = VDIGITAL
VDD = +5V
VDD = +3V
MAX1117/18/19 toc05
0
20
40
60
80
110
120
140
160
2.5 3.5 4.5 5.5
MAX1118
SUPPLY CURRENT vs. SUPPLY VOLTAGE
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (μA)
DOUT = 00000000
VDD = VREF = VDIGITAL INPUTS
0
50
100
150
-40 -15 10 35 60 85
MAX1118 SUPPLY CURRENT
vs. TEMPERATURE
MAX1117/18/19 toc06
TEMPERATURE (°C)
SUPPLY CURRENT (μA)
DOUT = 00000000
VDD = VREF = VDIGITAL INPUTS
VDD = +5V
VDD = +3V
MAX1117/MAX1118/MAX1119
Single-Supply, Low-Power,
2-Channel, Serial 8-Bit ADCs
4 _______________________________________________________________________________________
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX
UNITS
Serial Clock Falling Edge to
DOUT tcd CLOAD = 100pF
10 100
ns
Serial Clock Rising Edge to
DOUT High-Z tchz CLOAD = 100pF, Figure 2
100 500
ns
Last Serial Clock to Next CNVST
(Successive Conversions on
CH0)
tccs
50
ns
Note 1: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range and off-
set have been calibrated.
Note 2: Input = 0, with logic input levels of 0 and VDD.
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.7V to +3.6V (MAX1117), VDD = +4.5V to +5.5V (MAX1119), VDD = REF = +2.7V to +5.5V (MAX1118),TA= TMIN to TMAX,
unless otherwise noted.)
znn an n u it; a? 5&5 23 TEM [VI I] X IIVI
MAX1117/MAX1118/MAX1119
Single-Supply, Low-Power,
2-Channel, Serial 8-Bit ADCs
_______________________________________________________________________________________ 5
Typical Operating Characteristics (continued)
(VDD = +3V (MAX1117), VDD = +5V (MAX1119), VDD = VREF = +3V (MAX1118), fSCLK = 5MHz, fSAMPLE = 100ksps, CLOAD = 100pF,
TA = +25°C, unless otherwise noted.)
0.1
0.01 0.1 1 10 100
MAX1117/MAX1119
SUPPLY CURRENT vs. CONVERSION RATE
1.0
MAX1117/18/19 toc07
CONVERSION (ksps)
SUPPLY CURRENT (μA)
100.0
10.0
MAX1119
VDD = +5V
MAX1117
VDD = +3V
0
100
50
150
200
2.5 3.5 4.5 5.5
MAX1117/MAX1119 SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX1117/18/19 toc08
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (μA)
DOUT = 00000000
VDD = VDIGITAL INPUTS
MAX1117
MAX1119
0
100
50
150
200
-40 -15 3510 60 85
MAX1117/MAX1119
SUPPLY CURRENT vs. TEMPERATURE
MAX1117/18/19 toc09
TEMPERATURE (V)
SUPPLY CURRENT (μA)
DOUT = 00000000
VDD = VDIGITAL INPUTS
MAX1117
VDD = +3V
MAX1119
VDD = +5V
5.0
5.2
5.3
5.1
5.4
5.5
2.5 3.5 4.5 5.5
CONVERSION TIME
vs. SUPPLY VOLTAGE
MAX1117/18/19 toc11
SUPPLY VOLTAGE (V)
CONVERSION TIME (μs)
5.0
5.2
5.3
5.1
5.4
5.5
-40 -15 10 35 60 85
CONVERSION TIME
vs. TEMPERATURE
MAX1117/18/19 toc12
TEMPERATURE (°C)
CONVERSION TIME (μs)
VDD = +3V
VDD = +5V
-120
-80
-100
-60
-40
-20
0
0 20k10k 30k 40k 50k
FFT PLOT
MAX1117/18/19 toc13
ANALOG INPUT FREQUENCY (Hz)
AMPLITUDE (dB)
0
-0.2
-0.4
0.2
0.4
2.5 4.53.5 5.5
MAX1118
GAIN ERROR vs. SUPPLY VOLTAGE
MAX1117/18/19 toc14
SUPPLY VOLTAGE (V)
GAIN ERROR (LSB)
VREF = 2.048V
-0.5
-0.2
-0.3
-0.4
-0.1
0
0.1
0.2
0.3
0.4
0.5
-40 10-15 356085
MAX1118
GAIN ERROR vs. TEMPERATURE
MAX1117/18/19 toc15
TEMPERATURE (°C)
GAIN ERROR (LSB)
VDD = +3V
VREF = 2.048V
-1.0
-0.6
-0.4
-0.8
-0.2
0
14532
MAX1118
GAIN ERROR vs. REFERENCE VOLTAGE
MAX1117/18/19 toc16
REFERENCE VOLTAGE (V)
GAIN ERROR (LSB)
VDD = +5.5V
SUP‘LVVULTAEEW) AMPLHUDEmB) 40 m) an um ‘20 FFT PU" ‘ W WW my 20k 30k 43v 50k mm WPUT FREUUENEY \sz [MAXIIVI
MAX1117/MAX1118/MAX1119
Single-Supply, Low-Power,
2-Channel, Serial 8-Bit ADCs
6 _______________________________________________________________________________________
Typical Operating Characteristics (continued)
(VDD = +3V (MAX1117), VDD = +5V (MAX1119), VDD = VREF = +3V (MAX1118), fSCLK = 5MHz, fSAMPLE = 100ksps, CLOAD = 100pF,
TA = +25°C, unless otherwise noted.)
-0.5
0
-0.1
0.1
-0.2
-0.3
-0.4
0.3
0.2
0.4
0.5
2.5 3.0 4.0 5.04.53.5 5.5
MAX1118
OFFSET ERROR vs. SUPPLY VOLTAGE
MAX1117/18/19 toc17
SUPPLY VOLTAGE (V)
OFFSET ERROR (LSB)
VREF = 2.048V
-0.5
0
-0.1
0.1
-0.2
-0.3
-0.4
0.3
0.2
0.4
0.5
-40 35 6010-15 85
MAX1118
OFFSET ERROR vs. TEMPERATURE
MAX1117/18/19 toc18
TEMPERATURE (°C)
OFFSET ERROR (LSB)
VDD = +3V
VREF = 2.048V
-0.5
-0.1
0.1
-0.3
0.3
-0.4
0
0.2
-0.2
0.4
0.5
14532
MAX1118
OFFSET ERROR vs. REFERENCE VOLTAGE
MAX1117/18/19 toc19
REFERENCE VOLTAGE (V)
OFFSET ERROR (LSB)
VDD = 5.5V
SUPPLY VOLTAGE (V)
0
0.6
0.8
0.4
0.2
1.2
1.0
1.4
2.5 4.53.5 5.5
MAX1117/MAX1119
GAIN ERROR vs. SUPPLY VOLTAGE
MAX1117/18/19 toc20
GAIN ERROR (%FSR)
MAX1119
VDD = +5V
MAX1117
VDD = +3V
-2.0
0
0.5
-1.0
-0.5
-1.5
1.5
1.0
2.0
-40 603510-15 85
MAX1117/MAX1119
GAIN ERROR vs. TEMPERATURE
MAX1117/18/19 toc21
TEMPERATURE (°C)
GAIN ERROR (%FSR)
MAX1116
VDD = +5V
MAX1117
VDD = +3V
-120
-80
-100
-60
-40
-20
0
0 20k10k 30k 40k 50k
FFT PLOT
MAX1117/18/19 toc22
ANALOG INPUT FREQUENCY (Hz)
AMPLITUDE (dB)
fSAMPLE = 100kHz
fIN = 25.1kHz
AIN = 0.9 x VREFp-p
-0.5
0
-0.1
0.1
-0.2
-0.3
-0.4
0.3
0.2
0.4
0.5
2.5 3.0 4.0 5.04.53.5 5.5
MAX1117/MAX1119
OFFSET ERROR vs. SUPPLY VOLTAGE
MAX1117/18/19 toc23
SUPPLY VOLTAGE (V)
OFFSET ERROR (LSB)
MAX1117
VDD = +3V MAX1119
VDD = +5V
-0.5
0
-0.1
0.1
-0.2
-0.3
-0.4
0.3
0.2
0.4
0.5
-40 -15 603510 85
MAX1117/MAX1119
OFFSET ERROR vs. TEMPERATURE
MAX1117/18/19 toc24
TEMPERATURE (°C)
OFFSET ERROR (LSB)
MAX1117
VDD = +3V
MAX1119
VDD = +5V
[VI I] X IIVI
MAX1117/MAX1118/MAX1119
Single-Supply, Low-Power,
2-Channel, Serial 8-Bit ADCs
_______________________________________________________________________________________ 7
Typical Operating Characteristics (continued)
(VDD = +3V (MAX1117), VDD = +5V (MAX1119), VDD = VREF = +3V (MAX1118), fSCLK = 5MHz, fSAMPLE = 100ksps, CLOAD = 100pF,
TA = +25°C, unless otherwise noted.)
0
10.5%
7.0%
3.5%
17.5%
21.0%
14.0%
3.980 4.020 4.1404.1004.060 4.180
REFERENCE VOLTAGE vs.
NUMBER OF PIECES
MAX1115 toc25
REFERENCE VOLTAGE (V)
0
10.5%
7.0%
3.5%
17.5%
21.0%
14.0%
1.982 2.008 2.0862.0602.034 2.112
REFERENCE VOLTAGE vs.
NUMBER OF PIECES
MAX1117/18/19 toc26
REFERENCE VOLTAGE (V)
Pin Description
PIN NAME FUNCTION
1V
DD Positive Supply Voltage
2 CH0 CH0 Analog Voltage Input
3 CH1 CH1 Analog Voltage Input
4 GND Ground
5
I.C.(REF)
Internally Connected. Connect to ground. (Reference Input, MAX1118 only.)
6 CNVST Convert/Start Input. CNVST initiates a power-up and starts a conversion on its falling edge.
7DOUT
Serial Data Output. Data is clocked out on the falling edge of SCLK. DOUT goes low at the start of a
conversion and presents the MSB at the completion of a conversion. DOUT goes high impedance
once data has been fully clocked out.
8 SCLK Serial Clock. Used for clocking out data on DOUT.
HF mput ‘5 men con- lVI/J X I [VI
MAX1117/MAX1118/MAX1119
Single-Supply, Low-Power,
2-Channel, Serial 8-Bit ADCs
8 _______________________________________________________________________________________
VDD
I/O
SCK (SK)
MISO (SI)
GND
DOUT
SCLK
CNVST
GND
VDD
0.1μF1μF
CH0
REF*
* MAX1118 ONLY
1μF
ANALOG
INPUTS
MAX1117
MAX1118
MAX1119
CPU
VDD
CH1
Figure 3. Typical Operating Circuit
GND
CHOLD
CAPACITIVE DAC
COMPARATOR
16pF
RIN
6.5kΩ
AUTOZERO
RAIL
TRACK
HOLD
CH0
CH1
Figure 4. Equivalent Input Circuit
Detailed Description
The MAX1117/MAX1118/MAX1119 ADCs use a suc-
cessive-approximation conversion technique and input
T/H circuitry to convert an analog signal to an 8-bit digi-
tal output. The SPI/QSPI/MICROWIRE compatible inter-
face directly connects to microprocessors (µPs) without
additional circuity (Figure 3).
Track/Hold
The input architecture of the ADC is illustrated in Figure
4’s equivalent-input circuit and is composed of the T/H,
the input multiplexer, the input comparator, the
switched capacitor DAC, and the auto-zero rail.
The acquisition interval begins with the falling edge of
CNVST. During the acquisition interval, the analog
inputs (CH0, CH1) are connected to the holding capac-
itor (CHOLD). Once the acquisition has completed, the
T/H switch opens and CHOLD is connected to GND,
retaining the charge on CHOLD as a sample of the sig-
nal at the analog input.
Sufficiently low source impedance is required to ensure
an accurate sample. A source impedance <1.5kΩis
recommended for accurate sample settling. A 100pF
capacitor at the ADC inputs will also improve the accu-
racy of an input sample.
Conversion Process
The MAX1117/MAX1118/MAX1119 conversion process
is internally timed. The total acquisition and conversion
process takes <7.5µs. Once an input sample has been
acquired, the comparator’s negative input is then con-
VDD
3kΩ
CLOAD
GND
DOUT
CLOAD
GND
3kΩ
DOUT
a) VOL TO VOH b) HIGH-Z to VOL AND VOH to VOL
VDD
3kΩ
CLOAD
GND
DOUT
CLOAD
GND
3kΩ
DOUT
a) VOH TO HIGH-Z b) VOL TO HIGH-Z
Figure 1. Load Circuits for Enable Time Figure 2. Load Circuits for Disable Time
[VI [I X I [VI 2| SPI MAXIM MAXIM MAXIM
MAX1117/MAX1118/MAX1119
Single-Supply, Low-Power,
2-Channel, Serial 8-Bit ADCs
_______________________________________________________________________________________ 9
nected to an autozero supply. Since the device
requires only a single supply, the negative input of the
comparator is set to equal VDD/2. The capacitive DAC
restores the positive input to VDD/2 within the limits of 8-
bit resolution. This action is equivalent to transferring a
charge QIN = 16pF x VIN from CHOLD to the binary-
weighted capacitive DAC, which in turn forms a digital
representation of the analog-input signal.
Input Voltage Range
Internal protection diodes that clamp the analog input
to VDD and GND allow the input pins (CH0, CH1) to
swing from (GND - 0.3V) to (VDD + 0.3V) without dam-
age. However, for accurate conversions, the inputs
must not exceed (VDD + 50mV) or be less than (GND -
50mV).
Input Bandwidth
The ADC’s input tracking circuitry has a 4MHz small-
signal bandwidth, so it is possible to digitize high-
speed transient events and measure periodic signals
with bandwidths exceeding the ADC’s sampling rate by
using undersampling techniques. To avoid high-fre-
quency signals being aliased into the frequency band
of interest, anti-alias filtering is recommended.
Serial Interface
The MAX1117/MAX1118/MAX1119 have a 3-wire serial
interface. The CNVST and SCLK inputs are used to
control the device, while the three-state DOUT pin is
used to access the conversion results.
The serial interface provides connection to microcon-
trollers (µCs) with SPI, QSPI, and MICROWIRE serial
interfaces at clock rates up to 5MHz. The interface sup-
ports either an idle high or low SCLK format. For SPI
and QSPI, set CPOL = CPHA = 0 or CPOL = CPHA = 1
in the SPI control registers of the µC. Figure 5 shows
the MAX1117/MAX1118/MAX1119 common serial-inter-
face connections. See Figures 6a–6d for details on the
serial interface timing and protocol.
Digital Inputs and Outputs
The MAX1117/MAX1118/MAX1119 perform conver-
sions using an internal clock. This frees the µP from the
burden of running the SAR conversion clock and allows
the conversion results to be read back at the µP’s con-
venience at any clock rate up to 5MHz.
The acquisition interval begins with the falling edge of
CNVST. CNVST can idle between conversions in either
a high or low state. If idled in a low state, CNVST must
be brought high for at least 50ns, then brought low to
initiate a conversion. To select CH1 for conversion, the
CNVST pin must be brought high and low for a second
time (Figures 6c and 6d).
After CNVST is brought low, allow 7.5μs for the conver-
sion to be completed. While the internal conversion is in
progress, DOUT is low. The MSB is present at the
DOUT pin immediately after conversion is completed.
The conversion result is clocked out at the DOUT pin
and is coded in straight binary (Figure 7). Data is
clocked out at SCLK’s falling edge in MSB-first format
at rates up to 5MHz. Once all data bits are clocked
out, DOUT goes high impedance (100ns to 500ns after
the rising edge) of the eighth SCLK pulse.
CNVST
SCLK
DOUT
I/O
SCK
MISO
+3V
SS
a) SPI
CNVST
CNVST
SCLK
DOUT
CS
SCK
MISO
+3V
SS
b) QSPI
MAX1117
MAX1118
MAX1119
MAX1117
MAX1118
MAX1119
MAX1117
MAX1118
MAX1119
SCLK
DOUT
I/O
SK
SI
c) MICROWIRE
Figure 5. Common Serial-Interface Connections
—>11 1—><——><— i/xxxxxxx%=""><714><74><7 mhxhm="">
MAX1117/MAX1118/MAX1119
Single-Supply, Low-Power,
2-Channel, Serial 8-Bit ADCs
10 ______________________________________________________________________________________
During the conversion process, SCLK is ignored. Only
after a conversion is complete will SCLK cause serial
data to be output. Falling edges on CNVST, during an
active conversion process, interrupt the current conver-
sion and cause the input multiplexer to switch to CH1.
To reinitiate a conversion on CH0, it is necessary to
allow for a conversion to be complete and all of the
data to be read out. Once a conversion has been com-
pleted, the MAX1117/MAX1118/MAX1119 will go into
AutoShutdown™ mode (<1µA typ) until the next conver-
sion is initiated.
ACTIVE POWER-DOWN MODE
CNVST
SCLK
DOUT
CH0
IDLE LOW IDLE LOW
CH0
tcsh
tconv tcp tccs
tchz
tcl
tcd
D7 (MSB) D6 D5 D4 D3 D2 D1 D0
tcsd
tch
Figure 6a. Conversion and Interface Timing, Conversion on CH0 with SCLK Idle Low
ACTIVE POWER-DOWN MODE
CNVST
SCLK
DOUT
CH0
IDLE HIGH
IDLE HIGH
CH0
tcsh
tconv tcp tccs
tchz
tcl
tcd
D7 (MSB) D6 D5 D4 D3 D2 D1 D0
tcsd
tch
Figure 6b. Conversion and Interface Timing, Conversion on CH0 with SCLK Idle High
AutoShutdown is a trademark of Maxim Integrated Products.
MAX1117/MAX1118/MAX1119
Single-Supply, Low-Power,
2-Channel, Serial 8-Bit ADCs
______________________________________________________________________________________ 11
ACTIVE POWER-DOWN MODE
CNVST
SCLK
DOUT
CH0
IDLE LOW IDLE LOW
CH0 CH1CH1
tcsh
tconv tcp tccs
tcsl
tchz
tcl
tcd
D7 (MSB) D6 D5 D4 D3 D2 D1 D0
tcsd
tch
Figure 6c. Conversion and Interface Timing, Conversion on CH1 with SCLK Idle Low
ACTIVE POWER-DOWN MODE
CNVST
SCLK
DOUT
CH0
IDLE HIGHIDLE HIGH
CH0 CH1CH1
tcsh
tconv tcp tccs
tcsl
tchz
tcl
tcd
D7 (MSB) D6 D5 D4 D3 D2 D1 D0
tcsd
tch
Figure 6d. Conversion and Interface Timing, Conversion on CH1 with SCLK Idle High
3 ‘ w \ [MAXI/III VREF [VI/J XI [VI
MAX1117/MAX1118/MAX1119
Single-Supply, Low-Power,
2-Channel, Serial 8-Bit ADCs
12 ______________________________________________________________________________________
Applications Information
Power-On Reset
When power is first applied, the MAX1117/MAX1118/
MAX1119 are in AutoShutdown state (<1μA typ). A conver-
sion can be started by toggling CNVST high to low. Powering
up the MAX1117/MAX1118/MAX1119 with CNVST low will
not start a conversion. Conversions initiated prior to the
external reference settling (MAX1118) will result in errors.
Thus, it is necessary to allow the external reference to stabi-
lize prior to initiating a conversion.
AutoShutDown and Supply Current
Requirements
The MAX1117/MAX1118/MAX1119 are designed to
automatically shutdown once a conversion is complete
without any external control. An input sample and con-
version process will typically take 5µs to complete, dur-
ing which time the supply current to the analog
sections of the device is fully on. All analog circuitry is
shutdown after a conversion completes, which results
in a supply current of <1µA (see Shutdown Current vs.
Supply Voltage Plot in the Typical Operating
Characteristics). The digital conversion result is main-
tained in a static register and is available for access
through the serial interface at any time.
The power consumption consequence of this architec-
ture is dramatic when relatively slow conversion rates
are needed. For example, at a conversion rate of
10ksps, the average supply current for the MAX1117 is
15µA, while at 1ksps it drops to 1.5µA and at 0.1ksps it
is just 0.3µA, or a miniscule 1µW of power consumption
(see Average Supply Current vs. Conversion Rate Plot
in the Typical Operating Characteristics).
External Voltage Reference (MAX1118)
Connect an external reference between +1V and VDD
at the REF pin. The DC input impedance at REF is
extremely high, consisting of leakage current only
(10nA typ). During a conversion, the reference must be
able to deliver up to 20µA average load current and
have an output impedance of 100Ωor less. If the refer-
ence has higher output impedance or is noisy, bypass
it close to the REF pin with a 10nF or larger capacitor.
Transfer Function
Figure 7 depicts the input/output transfer function.
Output coding is binary with a +2.048V reference 1LSB
= 8mV (VREF/256).
Layout, Grounding, Bypassing
For best performance, the board layout should ensure
that digital and analog signal lines are separated from
each other. Do not run analog and digital (especially
clock) lines parallel to one another or run digital lines
underneath the ADC package.
Figure 8 shows the recommended system-ground con-
nections. A single-point analog ground (star-ground
point) should be established at the ADC ground.
Connect all analog grounds to the star ground. The
ground return to the power supply for the star ground
OUTPUT CODE FULL-SCALE
TRANSITION
11111111
11111110
11111101
00000011
00000010
00000001
00000000
123
0FS
FS - 1 1/2 LSB
FS = VREF
1LSB = VREF
256
INPUT VOLTAGE (LSB)
Figure 7. Input/Output Transfer Function
GND +3V/+5V
SYSTEM POWER SUPPLIES
VDD
DGNDVDD
1μF10Ω*
0.1μF
GND
*OPTIONAL
DIGITAL
CIRCUITRY
MAX1117
MAX1118
MAX1119
Figure 8. Power-Supply Connections
MAX1117/MAX1118/MAX1119
Single-Supply, Low-Power,
2-Channel, Serial 8-Bit ADCs
______________________________________________________________________________________ 13
should be low impedance and as short as possible for
noise-free operation.
High-frequency noise in the VDD power supply may
affect the comparator in the ADC. Bypass the supply to
the star ground with a 0.1µF capacitor close to the VDD
pin of the MAX1117/MAX1118/MAX1119. Minimize
capacitor lead lengths for best supply-noise rejection. If
the power supply is noisy, a 1µF capacitor in conjunc-
tion with a 10Ωseries resistor can be connected to
form a lowpass filter.
Chip Information
TRANSISTOR COUNT: 2000
PROCESS: BiCMOS
INPUT
MULTIPLEXER
SCLK
CNVST
CH0
INPUT
TRACK
AND HOLD
INTERNAL
REFERENCE
+2.096V
OR +4.096V
8-BIT
SAR
ADC
OUTPUT
SHIFT
REGISTER
OUT
CONTROL
LOGIC AND
INTERNAL
OCSILLATOR
MAX1117
MAX1119
CH1
VDD
GND
Functional Diagrams
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MAX1117/MAX1118/MAX1119
Single-Supply, Low-Power,
2-Channel, Serial 8-Bit ADCs
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
14 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2000 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
SOT23, 8L.EPS
0
0
PACKAGE OUTLINE, SOT-23, 8L BODY
21-0078 G
1
1
MARKING
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)

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