SI7050,1,3,4,5-A20 Datasheet by Silicon Labs

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SILIEIJN LABS Ordering lnformafion: Pin Assignments HUL' W WWW
Rev. 1.15 9/18 Copyright © 2018 by Silicon Laboratories Si7050/1/3/4/5-A20
Si7050/1/3/4/5-A20
I2C TEMPERATURE SENSORS
Features
Applications
Description
The Si705x Digital Temperature Sensors offer industry-leading low power
consumption and high accuracy across the entire operating voltage and
temperature range. These monolithic CMOS ICs feature a band-gap
temperature sensor element, an analog-to-digital converter with up to 14-
bit resolution, signal processing, calibration data, and an I2C interface.
The patented use of novel signal processing and analog design enables
the sensors to maintain their accuracy over a wide temperature and
voltage range, while consuming very little current.
The temperature sensors are factory-calibrated and the calibration data is
stored in the on-chip non-volatile memory. This ensures that the sensors
are fully interchangeable, with no recalibration or software changes
required.
The Si705x devices are available in a 3x3 mm DFN package, and the
industry-standard I2C interface can operate at up to 400 kHz. Requiring
just 195 nA of average current when sampled once per second, the
Si705x can operate for several years with just a single coin cell battery.
The Si705x devices offer an accurate, low-power, factory-calibrated
digital solution ideal for measuring temperature in applications ranging
from HVAC/R and asset tracking to industrial and consumer platforms.
High Accuracy Temperature
Sensors
Si7051: ±0.1 °C (max)
Si7053: ±0.3 °C (max)
Si7054: ±0.4 °C (max)
Si7055: ±0.5 °C (max)
Si7050: ±1.0 °C (max)
Wide operating voltage
(1.9 to 3.6 V)
–40 to +125 °C operating range
Accuracy maintained over the
entire operating temperature and
voltage range
Low Power Consumption
195 nA average current @ 1 Hz
sample rate
14-bit resolution
Factory calibrated
I2C interface
3x3 mm DFN package
HVAC/R
Thermostats
White goods
Computer equipment
Portable consumer devices
Asset tracking
Cold chain storage
Battery protection
Industrial controls
Medical equipment
Patent Protected. Patents pending
Ordering Information:
See page 19.
Pin Assignments
Top View
1
DNC
2
3
6
5
4
VDD
SCLSDA
GND
DNC
Si7050l1l3l4l5-A20 -[:| E] ($9 SILICON LABS
Si7050/1/3/4/5-A20
2 Rev. 1.15
Functional Block Diagram
ADC
GND
SCL
Si705x
Temp
Sensor
SDA
Vdd
I2C Interface
1.25V
Ref
Voltage
Regulator
Calibration
Memory
Control Logic
Si7050l1l3l4l5-A20 Section 659' SILIEIJN LABS
Si7050/1/3/4/5-A20
Rev. 1.15 3
TABLE OF CONTENTS
Section Page
1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
2. Typical Application Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
3. Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
4. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
5. I2C Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
5.1. Issuing a Measurement Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
5.2. Reading and Writing User Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
5.3. Electronic Serial Number . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
5.4. Firmware Revision . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
6. Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
6.1. Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
7. Pin Descriptions: Si705x (Top View) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
8. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
9. Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
9.1. Package Outline: 3x3 6-Pin DFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
10. PCB Land Pattern and Solder Mask Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
11. Top Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
11.1. Si705x Top Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
11.2. Top Marking Explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
11.3. Si7055-A20-ZM (Matte Tin Finish Lead Frame) Top Marking . . . . . . . . . . . . . . . . .23
11.4. Si7055-A20-ZM (Matte Tin Finish Lead Frame) Top Marking Explanation . . . . . . .23
12. Additional Reference Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
Si7050l1l3l4l5-A20 abl .G ($9 SILICON LABS
Si7050/1/3/4/5-A20
4 Rev. 1.15
1. Electrical Specifications
Unless otherwise specified, all min/max specifications apply over the recommended operating conditions.
Table 1. Recommended Operating Conditions
Parameter Symbol Test Condition Min Typ Max Unit
Power Supply VDD 1.9 — 3.6 V
Operating Temperature TA–40 +125 °C
Table 2. General Specifications
1.9 < VDD <3.6 V; TA= –40 to 125 °C default conversion time unless otherwise noted.
Parameter Symbol Test Condition Min Typ Max Unit
Input Voltage High VIH SCL, SDA pins 0.7 x VDD ——V
Input Voltage Low VIL SCL, SDA pins 0.3 x VDD V
Input Voltage Range VIN SCL, SDA pins with respect to GND 0.0 VDD V
Input Leakage IIL SCL, SDA pins 1 μA
Output Voltage Low VOL SDA pin; IOL =2.5mA; VDD = 3.3 V 0.6 V
SDA pin; IOL =1.2mA;
VDD =1.9V
——0.4V
Current
Consumption
IDD Temperature conversion in progress 90 120 μA
Standby, –40 to +85 °C1—0.060.62μA
Standby, –40 to +125 °C1—0.063.8μA
Peak IDD during powerup2—3.54.0mA
Peak IDD during I2C operations3—3.54.0mA
Conversion Time tCONV 14-bit temperature 7 10.8 ms
13-bit temperature 4 6.2 ms
12-bit temperature 2.4 3.8 ms
11-bit temperature 1.5 2.4 ms
Powerup Time tPU From VDD 1.9 V to ready for a
conversion, 25 °C
—1825
ms
From VDD 1.9 V to ready for a
conversion, full temperature range
——80
After issuing a software reset
command
—515
Notes:
1. No conversion or I2C transaction in progress. Typical values measured at 25 °C.
2. Occurs once during powerup. Duration is <5 msec.
3. Occurs during I2C commands for Reset, Read/Write User Registers, Read EID, and Read Firmware Version. Duration is
<100 µs when I2C clock speed is >100 kHz (>200 kHz for 2-byte commands).
Si7050l1l3l4l5-A20 , . SILIEDN LABS
Si7050/1/3/4/5-A20
Rev. 1.15 5
Table 3. I2C Interface Specifications1
1.9 VDD 3.6 V; TA = –40 to +125 °C unless otherwise noted.
Parameter Symbol Test Condition Min Typ Max Unit
Hysteresis VHYS High-to-low versus low-to-
high transition
0.05 x VDD ——V
SCLK Frequency2fSCL 400 kHz
SCL High Time tSKH 0.6 — µs
SCL Low Time tSKL 1.3 — µs
Start Hold Time tSTH 0.6 — µs
Start Setup Time tSTS 0.6 — µs
Stop Setup Time tSPS 0.6 — µs
Bus Free Time tBUF Between Stop and Start 1.3 µs
SDA Setup Time tDS 100 — ns
SDA Hold Time tDH 100 — ns
SDA Valid Time tVD;DAT From SCL low to data valid 0.9 µs
SDA Acknowledge Valid Time tVD;ACK From SCL low to data valid 0.9 µs
Suppressed Pulse Width3tSPS 50 — ns
Notes:
1. All values are referenced to VIL and/or VIH.
2. Depending on the conversion command, the Si705x may hold the master during the conversion (clock stretch). At
above 100 kHz SCL, the Si705x may also hold the master briefly for user register and device ID transactions. At the
highest I2C speed of 400 kHz the stretching will be <10 µs.
3. Pulses up to and including 50 ns will be suppressed.
Si7050l1l3l4l5-A20 + T L SSSSSSSSSSS
Si7050/1/3/4/5-A20
6 Rev. 1.15
Figure 1. I2C Interface Timing Diagram
SCL
D6
1/fSCL tSKH
SDA
tSKL
tSTH
D5 D4 D0 R/W ACK
tDS tDH
Start Bit Stop Bit
tBUF
tSTS tVD :
ACK
tSPS
tSP
Si7050l1l3l4l5-A20 , . SILIEDN LABS
Si7050/1/3/4/5-A20
Rev. 1.15 7
Table 4. Temperature Sensor
1.9 VDD 3.6 V; TA= –40 to +125 °C default conversion time unless otherwise noted.
Parameter Symbol Test Condition Min Typ Max Unit
Operating Range –40 +125 °C
Accuracy1Si7051 — ±0.12°C
Si7053 ±0.2 ±0.3 °C
Si7054 ±0.3 ±0.4 °C
Si7055 ±0.4 ±0.5 °C
Si7050 ±0.5 ±1.0 °C
Repeatability/Noise 14-bit resolution 0.01
°C RMS
13-bit resolution 0.02
12-bit resolution 0.04
11-bit resolution 0.08
Response Time3τ63% Unmounted device 0.7 s
Si705x-EB board 5.1 s
Long Term Stability 0.01 °C/Yr
Notes:
1. 14b measurement resolution (default). Values apply to the full operating temperature and voltage range of the device.
2. ±0.1 °C: +35.8 °C to 41 °C; ±0.13 °C: 20.0 °C to 70.0 °C; ±0.25 °C: –40 °C to +125 °C.
3. Time to reach 63% of final value in response to a step change in temperature. Actual response time will vary
dependent on system thermal mass and air-flow.
Si7050l1l3l4l5-A20 ($9 SILICON LABS
Si7050/1/3/4/5-A20
8 Rev. 1.15
Table 5. Thermal Characteristics
Parameter Symbol Test Condition DFN-6 Unit
Junction to Air Thermal Resistance JA JEDEC 2-Layer board,
No Airflow
256 °C/W
Junction to Air Thermal Resistance JA JEDEC 2-Layer board,
1 m/s Airflow
224 °C/W
Junction to Air Thermal Resistance JA JEDEC 2-Layer board,
2.5 m/s Airflow
205 °C/W
Junction to Case Thermal Resistance JC JEDEC 2-Layer board 22 °C/W
Junction to Board Thermal Resistance JB JEDEC 2-Layer board 134 °C/W
Table 6. Absolute Maximum Ratings1
Parameter Symbol Test Condition Min Typ Max Unit
Ambient temperature
under bias
–55 — 125 °C
Storage Temperature2–65 — 150 °C
Voltage on I/O pins –0.3 VDD+0.3 V V
Voltage on VDD with
respect to GND
–0.3 4.2 V
ESD Tolerance HBM 2 kV
CDM — — 1.25 kV
MM — — 250 V
Notes:
1. Absolute maximum ratings are stress ratings only, operation at or beyond these conditions is not implied and may
shorten the life of the device or alter its performance.
2. Special handling considerations apply; see application note, “AN607: Si70xx Humidity and Temperature Sensor
Designer’s Guide”.
Si7050l1l3l4l5-A20 Figure 2. , . SILIEDN LABS
Si7050/1/3/4/5-A20
Rev. 1.15 9
2. Typical Application Circuits
Figure 2 demonstrates the typical application circuit for Si705x sensors.
Figure 2. Typical Application Circuit for Temperature Measurement
Si7050l1l3l4l5-A20 ($9 SILICON LABS
Si7050/1/3/4/5-A20
10 Rev. 1.15
3. Bill of Materials
Table 7. Typical Application Circuit BOM for Temperature Measurement
Reference Description Mfr Part Number Manufacturer
R1 Resistor, 10 k, ±5%, 1/16 W, 0603 CR0603-16W-103JT Venkel
R2 Resistor, 10 k, ±5%, 1/16 W, 0603 CR0603-16W-103JT Venkel
C1 Capacitor, 0.1 µF, 16 V, X7R, 0603 C0603X7R160-104M Venkel
U1 IC, Digital Temperature Sensor Si705x-A20-IM Silicon Labs
Si7050l1l3l4l5-A20 -[:| ,_‘ [—1 Figure 3. Si705x Block Diagram , . SILIEDN LABS
Si7050/1/3/4/5-A20
Rev. 1.15 11
4. Functional Description
Figure 3. Si705x Block Diagram
The Si705x Digital Temperature Sensors offer industry-leading low power consumption and high accuracy across
the entire operating voltage and temperature range. These monolithic CMOS ICs feature a band-gap temperature
sensor element, an analog-to-digital converter with up to 14-bit resolution, signal processing, calibration data, and
an I2C interface. The patented use of novel signal processing and analog design enables the sensors to maintain
their accuracy over a wide temperature and voltage range, while consuming very little current.
The temperature sensors are factory-calibrated and the calibration data is stored in the on-chip non-volatile
memory. This ensures that the sensors are fully interchangeable, with no recalibration or software changes
required.
The Si705x devices are available in a 3x3 mm DFN package, and the industry-standard I2C interface can operate
at up to 400 kHz. Requiring just 195nA of average current when sampled once per second, the Si705x can operate
for several years with just a single coin cell battery.
The Si705x devices offer an accurate, low-power, factory-calibrated digital solution ideal for measuring
temperature in applications ranging from HVAC/R and asset tracking to industrial and consumer platforms.
ADC
GND
SCL
Si705x
Temp
Sensor
SDA
Vdd
I2C Interface
1.25V
Ref
Voltage
Regulator
Calibration
Memory
Control Logic
Si7050l1l3l4l5-A20 ($9 SILICON LABS
Si7050/1/3/4/5-A20
12 Rev. 1.15
5. I2C Interface
The Si705x communicates with the host controller over a digital I2C interface. The 7-bit base slave address is
0x40. When sending commands to the device, the R/W bit is set high for a read command and low for a write
command.
Master I2C devices communicate with the Si705x using a command structure. The commands are listed in the I2C
command table. Commands other than those documented below are undefined and should not be sent to the
device. When sending commands to the device, the R/W bit is set high for a read command and low for a write
command.
Table 8. I2C Slave Address Byte
A6 A5 A4 A3 A2 A1 A0 R/W
10000000
Table 9. I2C Command Table
Command Description Command Code
Measure Temperature, Hold Master Mode 0xE3
Measure Temperature, No Hold Master Mode 0xF3
Reset 0xFE
Write User Register 1 0xE6
Read User Register 1 0xE7
Read Electronic ID 1st Byte 0xFA 0x0F
Read Electronic ID 2nd Byte 0xFC 0xC9
Read Firmware Revision 0x84 0xB8
Si7050l1l3l4l5-A20 , . SILIEDN LABS
Si7050/1/3/4/5-A20
Rev. 1.15 13
5.1. Issuing a Measurement Command
The measurement command instructs the Si705x to perform a temperature measurement. While the measurement
is in progress, the option of either clock stretching (Hold Master Mode) or Not Acknowledging read requests (No
Hold Master Mode) is available to indicate to the master that the measurement is in progress; the chosen
command code determines which mode is used.
Optionally, a checksum byte can be returned from the slave for use in checking for transmission errors. The
checksum byte will follow the least significant measurement byte if it is acknowledged by the master. The
checksum byte is not returned if the master “not acknowledges” the least significant measurement byte. The
checksum byte is calculated using a CRC generator polynomial of x8 + x5 + x4 + 1, with an initialization of 0x00.
The checksum byte is optional after initiating a temperature measurement with commands 0xE3, and 0xF3. The
checksum byte is required for reading the electronic ID with commands 0xFA 0x0F and 0xFC 0xC9. For all other
commands, the checksum byte is not supported.
In the I2C sequence diagrams in the following sections, bits produced by the master and slave are color coded as
shown:
Table 10. I2C Bit Descriptions
Name Symbol Description
START S SDA goes low while SCL high
STOP P SDA goes high while SCL high
Repeated START Sr SDA goes low while SCL high. It is allowable to generate a STOP before the
repeated start. SDA can transition to high before or after SCL goes high in
preparation for generating the START.
READ R Read bit = 0
WRITE W Write bit = 1
All other bits SDA value must remain high or low during the entire time SCL is high (this is the
set up and hold time in Figure 1)
Master Slave
Sequencetoperformameasurementandreadbackresult(HoldMasterMode)
SSlave
AddressWAMeasure
CmdASrSlave
AddressRA
Clockstretch
during
measurement

MSByteALSByteNAP

AChecksumNA P
Si7050/1l3/4/5-A20 Sequence to perform a measurement and read back result (No Hold Master Mode) Slave Measure Slave NA‘ Sr Slave Address Cmd Address Address R A MSByte A LSByte NA P l 7777777 > A Checksum NA P SILICON LABS
Si7050/1/3/4/5-A20
14 Rev. 1.15
*Note: Device will NACK the slave address byte until conversion is complete.
5.1.1. Measuring Temperature
The measure temperature commands 0xE3 and 0xF3 will perform a temperature measurement and return the
measurement value.
The results of the temperature measurement may be converted to temperature in degrees Celsius (°C) using the
following expression:
Where:
Temperature (°C) is the measured temperature value in °C
Temp_Code is the 16-bit word returned by the Si705x
A temperature measurement will always return XXXXXX00 in the LSB field.
5.2. Reading and Writing User Registers
There is one user register on the Si705x that allows the user to set the configuration of the Si705x. The procedure
for accessing that register is described below.
The checksum byte is not supported after reading a user register.
Sequencetoreadaregister
SSlave
Address WAReadReg
Cmd ASr
Slave
Address RAReadData NA P
Sequencetowritearegister
SSlaveAddress W AWriteRegCmd AWriteData AP
Temperature (C175.72Temp_Code
65536
--------------------------------------------------------46.85=
Si7050l1l3l4l5-A20 , . SILIEDN LABS
Si7050/1/3/4/5-A20
Rev. 1.15 15
5.3. Electronic Serial Number
The Si705x provides a serial number individualized for each device that can be read via the I2C serial interface.
Two I2C commands are required to access the device memory and retrieve the complete serial number. The
command sequence, and format of the serial number response is described in the figure below:
First access:
The format of the complete serial number is 64-bits in length, divided into 8 data bytes. The complete serial number
sequence is shown below:
The SNB3 field contains the device identification to distinguish between the different Silicon Labs devices. The
value of this field maps to the following devices according to this table:
0x00 or 0xFF engineering samples
50 = 0x32 = Si7050
51 = 0x33 = Si7051
53 = 0x35 = Si7053
54 = 0x36 = Si7054
55 = 0x37 = Si7055
Master Slave
SSlaveAddress W ACK 0xFA ACK 0X0F ACK
SSlaveAddress R ACK
SNA_3 ACK CRC ACK SNA_2 ACK CRC ACK
SNA_1 ACK CRC ACK SNA_0 ACK CRC NACK P
2nd access:
SSlaveAddress W ACK 0xFC ACK 0XC9 ACK
SSlaveAddress R ACK
SNB_3 ACK SNB_2 ACK CRC ACK
SNB_1 ACK SNB_0 ACK CRC NACK P
SNA_3 SNA_2 SNA_1 SNA_0 SNB_3 SNB_2 SNB_1 SNB_0
Si7050l1l3l4l5-A20 ($9 SILICON LABS
Si7050/1/3/4/5-A20
16 Rev. 1.15
5.4. Firmware Revision
The internal firmware revision can be read with the following I2C transaction:
The values in this field are encoded as follows:
0xFF = Firmware version 1.0
0x20 = Firmware version 2.0
SSlave
Address WA0x84 A0xB8A S Slave
Address
RAFWREV NA P
Si7050l1l3l4l5-A20 , . SILIEDN LABS
Si7050/1/3/4/5-A20
Rev. 1.15 17
6. Control Registers
6.1. Register Descriptions
Reset Settings = 0011_1010
Table 11. Register Summary
Register Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
User Register 1 RES1 VDDS RSVD RSVD RSVD RSVD RSVD RES0
Notes:
1. Any register not listed here is reserved and must not be written. The result of a read operation on these bits is
undefined.
2. Except where noted, reserved register bits will always read back as “1,” and are not affected by write operations. For
future compatibility, it is recommended that prior to a write operation, registers should be read. Then the values read
from the RSVD bits should be written back unchanged during the write operation.
Register 1. User Register 1
Bit D7 D6 D5 D4D3D2 D1 D0
Name RES1 VDDS RSVD RSVD RSVD RSVD RSVD RES0
Type R/W R R/W R/W R/W R/W R/W
Bit Name Function
D7; D0 RES[1:0] Measurement Resolution:
00: 14 bit
01: 12 bit
10: 13 bit
11: 11 bit
D6 VDDS VDD Status:
0: VDD OK
1: VDD Low
The minimum recommended operating voltage is 1.9 V. A transi-
tion of the VDD status bit from 0 to 1 indicates that VDD is
between 1.8 V and 1.9 V. If the VDD drops below 1.8 V, the
device will no longer operate correctly.
D5, D4, D3,
D2, D1
RSVD Reserved
Si7050l1l3l4l5-A20 ($9 SILICON LABS
Si7050/1/3/4/5-A20
18 Rev. 1.15
7. Pin Descriptions: Si705x (Top View)
Pin Name Pin # Pin Description
SDA 1 I2C data
GND 2 Ground. This pin is connected to ground on the circuit board through a trace. Do not
connect directly to GND plane.
VDD 5 Power. This pin is connected to power on the circuit board.
SCL 6 I2C clock
DNC 3,4 These pins should be soldered to pads on the PCB for mechanical stability; they can be
electrically floating or tied to VDD (do not tie to GND).
TGND Paddle This pad is connected to GND internally. This pad is the main thermal input to the on-
chip temperature sensor. The paddle should be soldered to a floating pad.
1
DNC
2
3
6
5
4
VDD
SCLSDA
GND
DNC
Si7050l1l3l4l5-A20 , . SILIEDN LABS
Si7050/1/3/4/5-A20
Rev. 1.15 19
8. Ordering Guide
Table 12. Device Ordering Guide
Part Number Description Max. Accuracy Pkg Packing Format
Si7050-A20-IM Digital temperature sensor ±1 °C DFN 6 Cut Tape
Si7050-A20-IMR Digital temperature sensor ±1 °C DFN 6 Tape and Reel
Si7051-A20-IM Digital temperature sensor ±0.1 °C DFN 6 Cut Tape
Si7051-A20-IMR Digital temperature sensor ±0.1 °C DFN 6 Tape and Reel
Si7053-A20-IM Digital temperature sensor ±0.3 °C DFN 6 Cut Tape
Si7053-A20-IMR Digital temperature sensor ±0.3 °C DFN 6 Tape and Reel
Si7054-A20-IM Digital temperature sensor ±0.4 °C DFN 6 Cut Tape
Si7054-A20-IMR Digital temperature sensor ±0.4 °C DFN 6 Tape and Reel
Si7055-A20-IM Digital temperature sensor ±0.5 °C DFN 6 Cut Tape
Si7055-A20-IMR Digital temperature sensor ±0.5 °C DFN 6 Tape and Reel
Note: The “A” denotes product revision A and “20” denotes firmware version 2.0.
Si7050l1l3l4l5-A20 H,“ [E] ($9 SILICON LABS
Si7050/1/3/4/5-A20
20 Rev. 1.15
9. Package Outline
9.1. Package Outline: 3x3 6-Pin DFN
Figure 10. 3x3 6-pin DFN
Table 13. Package Diagram Dimensions
Dimension Min Nom Max
A 0.70 0.75 0.80
A1 0.00 0.02 0.05
b 0.35 0.40 0.45
D 3.00 BSC.
D2 1.40 1.50 1.60
e 1.00 BSC.
E 3.00 BSC.
E2 2.30 2.40 2.50
L 0.35 0.40 0.45
aaa 0.10
bbb 0.10
ccc 0.05
ddd 0.10
eee 0.05
Notes:
1. All dimensions shown are in millimeters (mm).
2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
Si7050l1l3l4l5-A20 fi fi C + E—f F fif’ p, , , . SILIEDN LABS
Si7050/1/3/4/5-A20
Rev. 1.15 21
10. PCB Land Pattern and Solder Mask Design
Figure 4. Si705x PCB Land Pattern
Table 14. PCB Land Pattern Dimensions
Symbol mm
C1 2.90
E1.00
P1 1.60
P2 2.50
X1 0.45
Y1 0.85
Notes:
General
1. All dimensions shown are at Maximum Material Condition (MMC). Least Material
Condition (LMC) is calculated based on a Fabrication Allowance of 0.05 mm.
2. This Land Pattern Design is based on the IPC-7351 guidelines.
Solder Mask Design
3. All metal pads are to be non-solder mask defined (NSMD). Clearance between the
solder mask and the metal pad is to be 60 µm minimum, all the way around the
pad.
Stencil Design
4. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls
should be used to assure good solder paste release.
5. The stencil thickness should be 0.125 mm (5 mils).
6. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter pins.
7. A 2x1 array of 1.00 mm square openings on 1.30 mm pitch should be used for the
center ground pad to achieve a target solder coverage of 50%.
Card Assembly
8. The recommended card reflow profile is per the JEDEC/IPC J-STD-020
specification for Small Body Components.
Si7050l1l3l4l5-A20 \ TTTT ($9 SILICON LABS
Si7050/1/3/4/5-A20
22 Rev. 1.15
11. Top Marking
11.1. Si705x Top Marking
11.2. Top Marking Explanation
Mark Method: Laser
Pin 1 Mark: Circle = 0.30 mm Diameter (Upper-
Left Corner)
Font Size: 0.05 mm
Line 1 Mark Format: Device Code Si705
Line 2 Mark Format: TTTT Manufacturing Code from the
Assembly Purchase Order form.
Line 3 Mark Format: YY = Year
WW = Work Week
Assigned by the Assembly House.
Corresponds to the year and work
week of the assembly release.
Si7050/1/3/4/5-A20
Si7050/1/3/4/5-A20
Rev. 1.15 23
11.3. Si7055-A20-ZM (Matte Tin Finish Lead Frame) Top Marking
11.4. Si7055-A20-ZM (Matte Tin Finish Lead Frame) Top Marking Explanation
Mark Method: Laser
Pin 1 Mark: Circle = 0.30 mm Diameter (Upper-
Left Corner)
Font Size: 0.05 mm
Line 1 Mark Format: Device Code Si7055
Line 2 Mark Format: TTTT Manufacturing Code from the
Assembly Purchase Order form.
Line 3 Mark Format: YY = Year
WW = Work Week
Assigned by the Assembly House.
Corresponds to the year and work
week of the assembly release.
Si7050l1l3l4l5-A20 ($9 SILICON LABS
Si7050/1/3/4/5-A20
24 Rev. 1.15
12. Additional Reference Resources
AN607: Si70xx Humidity and Temperature Sensor Designer’s Guide
Si7050l1l3l4l5-A20 ($9 SILIEEIN LABS
Si7050/1/3/4/5-A20
Rev. 1.15 25
DOCUMENT CHANGE LIST
Revision 0.9 to Revision 1.0
Updated Section "5. I2C Interface" on page 12
Updated Table 12, “Device Ordering Guide,” on
page 19
Revision 1.0 to Revision 1.1
Added part number Si7051
Updated "9. Package Outline" on page 20
Revision 1.1 to Revision 1.11
Added new OPN: Si7055-A20-ZM with matte tin
finish lead frame
Revision 1.11 to Revision 1.12
Removed erroneous typical value for Si7051
accuracy from Table 4.
Revision 1.12 to Revision 1.13
Removed “YM0” and “YM0R” automotive qualified
part numbers from Table 12, “Device Ordering Guide,”
on page 19.
Revision 1.13 to Revision 1.14
Updated “No Hold Master Mode” diagram in "5.1.
Issuing a Measurement Command" on page 13.
Updated diagram in "5.4. Firmware Revision" on
page 16.‘
Updated notes in Table 14, “PCB Land Pattern
Dimensions,” on page 21.
Revision 1.14 to Revision 1.15
Updated Table 12, “Device Ordering Guide,” on
page 19.
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