LT4276 Datasheet by Analog Devices Inc.

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LT4276
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For more information www.linear.com/LT4276
Typical applicaTion
FeaTures DescripTion
LTPoE++/PoE+/PoE
PD Forward/Flyback Controller
The LT
®
4276 is a pin-for-pin compatible family of IEEE
802.3 and LTPoE++ Powered Device (PD) controllers. It
includes an isolated switching regulator controller capable
of synchronous operation in both forward and flyback
topologies with auxiliary power support.
The LT4276A employs the LTPoE++ classification scheme,
receiving 38.7W, 52.7W, 70W or 90W of power at the PD
RJ45 connector, and is backwards compatible with IEEE
802.3. The LT4276B is a fully 802.3at compliant, 25.5W
Type 2 (PoE+) PD. The LT4276C is a fully 802.3af compli-
ant, 13W Type 1 (PoE) PD.
The LT4276 supports both forward and flyback power
supply topologies, configurable for a wide range of PoE
applications. The flyback topology supports No-Opto
feedback. Auxiliary input voltage can be accurately sensed
with just a resistor divider connected to the AUX pin.
The LT4276 utilizes an external, low RDS(ON) N-channel
MOSFET for the Hot Swap function, maximizing power
delivery and efficiency, reducing heat dissipation, and
easing the thermal design.
LTPoE++ 70W Power Supply in a Forward Mode
applicaTions
n IEEE802.3af/at and LTPoE++
90W Powered Device
(PD) with Forward/Flyback Controller
n LT4276A Supports All of the Following Standards:
n LTPoE++ 38.7W, 52.7W, 70W and 90W
n IEEE 802.3at 25.5W Compliant
n IEEE 802.3af up to 13W Compliant
n LT4276B is IEEE 802.3at/af Compliant
n LT4276C is IEEE 802.3af Compliant
n Superior Surge Protection (100V Absolute Maximum)
n Wide Junction Temperature Range (–40°C to 125°C)
n Auxiliary Power Support as Low as 9V
n No Opto-Isolator Required for Flyback Operation
n External Hot Swap
N-Channel MOSFET for Lowest
Power Dissipation and Highest System Efficiency
n >94% End-to-End Efficiency with LT4321 Ideal Bridge
n Available in a 28-Lead 4mm × 5mm QFN Package
n High Power Wireless Data Systems
n Outdoor Security Camera Equipment
n Commercial and Public Information Displays
n High Temperature Applications L, LT, LTC, LTM, LTPoE++, Linear Technology and the Linear logo are registered trademarks of
Linear Technology Corporation. All other trademarks are the property of their respective owners.
LT4276 Family
MAX DELIVERED
POWER
LT4276
GRADE
ABC
LTPoE++ 90W l
LTPoE++ 70W l
LTPoE++ 52.7W l
LTPoE++ 38.7W l
25.5W l l
13W lll
VPORT
VPORT
RCLASS
AUX
RCLASS++
SW
VCC VCC
VIN
VCC
0.1µF
10µFBAV19WS
(TRR ≤50ns)
22µF
HS
GATE HS
SRC FFS
DLY PG
SG
ITHB
TO MICROPROCESSOR
ISEN+
ISEN
4276 TA01
GND FB31 ROSC T2PSS
100µH
AUX
37V-57V
+
+
FMMT723
20mΩ
5V
13A
+
3.3k
10k
0.1µF 100pF
10nF
100k
LT4276A
OPTO
+
LT4276 SE LED ‘39 ‘39 PM By
LT4276
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For more information www.linear.com/LT4276
pin conFiguraTionabsoluTe MaxiMuM raTings
VPORT, HSSRC, VIN Voltages .....................0.3 to 100V
HSGATE Current.................................................. ±20mA
VCC Voltage .................................................... 0.3 to 8V
RCLASS, RCLASS++
Voltages .................................0.3 to 8V (and VPORT)
SFST, FFSDLY, ITHB, T2P Voltages ......0.3 to VCC+0.3V
ISEN+, ISEN Voltages ........................................... ±0.3V
FB31 Voltage ..................................................+12V/–30V
RCLASS/RCLASS++ Current .............................. 50mA
AUX Current ........................................................ ±1.4mA
ROSC Current .....................................................±100µA
RLDCMP Current ................................................±500µA
T2P Current .........................................................2.5mA
Operating Junction Temperature Range (Note 3)
LT4276AI/LT4276BI/LT4276CI ..............40°C to 85°C
LT4276AH/LT4276BH/LT4276CH ....... 40°C to 125°C
Storage Temperature Range .................. 65°C to 150°C
(Notes 1, 2)
9 10
TOP VIEW
UFD PACKAGE
28-LEAD (4mm × 5mm) PLASTIC QFN
11 12 13
28 27 26 25 24
14
23
6
5
4
3
2
1
GND
AUX
RCLASS++/NC*
RCLASS
T2P/NC**
VCC
VCC
VCC
DNC
VCC
PG
GND
SG
ISEN+
ISEN
RLDCMP
VPORT
NC
HSGATE
HSSRC
VIN
SWVCC
VCC
ROSC
SFST
FFSDLY
ITHB
FB31
7
17
18
19
20
21
22
16
815
29
GND
TJMAX = 150°C, θJC = 3.4°C/W
EXPOSED PAD (PIN 29) IS GND, MUST BE SOLDERED TO PCB
*RCLASS++ is not connected in the LT4276B and LT4276C
**T2P is not connected in the LT4276C
orDer inForMaTion
LEAD FREE FINISH TAPE AND REEL PART MARKING* MAX PD POWER PACKAGE DESCRIPTION TEMPERATURE RANGE
LT4276AIUFD#PBF LT4276AIUFD#TRPBF 4276A 90W 28-Lead (4mm × 5mm) Plastic QFN –40°C to 85°C
LT4276AHUFD#PBF LT4276AHUFD#TRPBF 4276A 90W 28-Lead (4mm × 5mm) Plastic QFN –40°C to 125°C
LT4276BIUFD#PBF LT4276BIUFD#TRPBF 4276B 25.5W 28-Lead (4mm × 5mm) Plastic QFN –40°C to 85°C
LT4276BHUFD#PBF LT4276BHUFD#TRPBF 4276B 25.5W 28-Lead (4mm × 5mm) Plastic QFN –40°C to 125°C
LT4276CIUFD#PBF LT4276CIUFD#TRPBF 4276C 13W 28-Lead (4mm × 5mm) Plastic QFN –40°C to 85°C
LT4276CHUFD#PBF LT4276CHUFD#TRPBF 4276C 13W 28-Lead (4mm × 5mm) Plastic QFN –40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through
designated sales channels with #TRMPBF suffix.
LT42 76
LT4276
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elecTrical characTerisTics
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VPORT, HSSRC, VIN Operating Voltage At VPORT Pin l60 V
VSIG VPORT Signature Range At VPORT Pin l1.5 10 V
VCLASS VPORT Classification Range At VPORT Pin l12.5 21 V
VMARK VPORT Mark Range At VPORT Pin, After 1st Classification Event l5.6 10 V
VPORT AUX Range At VPORT Pin, VAUX ≥ 6.45V l8 60 V
Signature/Class Hysteresis Window l1.0 V
Reset Threshold l2.6 5.6 V
VHSON Hot Swap Turn-On Voltage l 35 37 V
VHSOFF Hot Swap Turn-Off Voltage l 30 31 V
Hot Swap On/Off Hysteresis Window l3 V
Supply Current
VPORT, HSSRC & VIN Supply Current VVPORT = VHSSRC = VVIN = 60V l2 mA
VPORT Supply Current During Classification VVPORT = 17.5V, RCLASS, RCLASS++ Open l0.7 1.0 1.3 mA
VPORT Supply Current During Mark Event VVPORT = VMARK after 1st Classification Event l0.4 2.2 mA
Signature and Classification
Signature Resistance VSIG (Note 4) l23.6 24.4 25.5
Signature Resistance During Mark Event VMARK (Note 4) l5.2 8.3 11.4
RCLASS/RCLASS++ Voltage –10mA ≥ IRCLASS ≥ –36mA l1.36 1.40 1.43 V
Classification Stability Time VVPORT Step to 17.5V, RCLS = 35.7Ω l2 ms
Digital Interface
VAUXT AUX Threshold VPORT = 17.5V, VIN = VHSSRC = 18.5V l6.05 6.25 6.45 V
IAUXH AUX Pin Current VAUX = 6.05V, VPORT = 17.5V, VIN = 9V, VCC = 0V l3.3 5.3 7.3 µA
T2P Output High VVCC - VT2P, –1mA Load l0.3 V
T2P Leakage VT2P = 0V l–1 1 µA
Hot Swap Control
IGPU HSGATE Pull Up Current VHSGATE - VHSSRC = 5V (Note 5) l–27 –22 –18 µA
HSGATE Voltage –10µA Load, with respect to HSSRC l10 14 V
HSGATE Pull Down Current VHSGATE - VHSSRC = 5V l400 µA
VCC Supply
VCCREG VCC Regulation Voltage l7.2 7.6 8.0 V
Feedback Amplifier
VFB FB31 Regulation Voltage l3.11 3.17 3.23 V
FB31 Pin Bias Current RLDCMP Open -0.1 µA
gm Feedback Amplifier Average Trans-
Conductance Time Average, –2µA < IITHB < 2µA l–52 –40 –26 µA/V
ISINK ITHB Average Sink Current Time Average, VFB31 = 0V l4.4 8.0 13.4 µA
Soft-Start
ISFST Charging Current VSFST = 0.5V, 3.0V l–49 –42 –36 µA
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TJ = 25°C. VVPORT = VHSSRC = VVIN = 40V, VVCC = VCCREG, ROSC, PG, and SG Open,
RFFSDLY = 5.23kΩ to GND. AUX connected to GND unless otherwise specified. (Note 2)
LT4276
LT4276
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SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Gate Outputs
PG, SG Output High Level I = –1mA lVCC –0.1 V
PG, SG Output Low Level I = 1mA l1 V
PG Rise Time, Fall Time PG = 1000pF 15 ns
SG Rise Time, Fall Time SG = 400pF 15 ns
Current Sense/Overcurrent
VFAULT Overcurrent Fault Threshold VISEN+ - VISENl125 140 155 mV
ΔVSENSE/
ΔVITHB
Current Sense Comparator Threshold with
Respect to VITHB
l–130 –111 –98 mV/V
VITHB(OS) VITHB Offset l3.03 3.17 3.33 V
Timing
fOSC Default Switching Frequency ROSC Pin Open l 200 214 223 kHz
Switching Frequency ROSC = 45.3kΩ to GND l280 300 320 kHz
fT2P LTPoE++ Signal Frequency fSW/256
tMIN Minimum PG On Time l175 250 330 ns
DMAX Maximum PG Duty Cycle l63 66 70 %
tPGDELAY PG Turn-On Delay-Flyback
PG Turn-On Delay-Forward
5.23kΩ from FFSDLY to GND
52.3kΩ from FFSDLY to GND
10.5kΩ from FFSDLY to VCC
52.3kΩ from FFSDLY to VCC
45
171
92
391
ns
ns
ns
ns
tFBDLY Feedback Amp Enable Delay Time 350 ns
tFB Feedback Amp Sense Interval 550 ns
tPGSG PG Falling to SG Rising Delay Time-Flyback
PG Falling to SG Falling Delay Time-
Forward
Resistor from FFSDLY to GND
10.5kΩ from FFSDLY to VCC
52.3kΩ from FFSDLY to VCC
20
67
301
ns
ns
ns
tSTART Start Timer (Note 6) Delay After Power Good l80 86 93 ms
tFAULT Fault Timer (Note 6) Delay After Overcurrent Fault l80 86 93 ms
IMPS MPS Current l10 12 14 mA
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TJ = 25°C. VVPORT = VHSSRC = VVIN = 40V, VVCC = VCCREG, ROSC, PG, and SG Open,
RFFSDLY = 5.23kΩ to GND. AUX connected to GND unless otherwise specified. (Note 2)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2. All voltages with respect to GND unless otherwise noted. Positive
currents are into pins; negative currents are out of pins unless otherwise
noted.
Note 3. This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature can exceed 150°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 4. Signature resistance specifications do not include resistance
added by the external diode bridge which can add as much as 1.1kΩ to the
port resistance.
Note 5. IGPU available in PoE powered operation. That is, available after
V(VPORT) > VHSON and V(AUX) < VAUXT, over the range where V(VPORT)
is between VHSOFF and 60V.
Note 6. Guaranteed by design, not subject to test.
LT4276 // 2M \\ \ Tpengw Rrrsnw L7 HEW 5
LT4276
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For more information www.linear.com/LT4276
Typical perForMance characTerisTics
VFB31 vs Temperature
Feedback Amplifier Output Current
vs VFB31
Switching Frequency
vs Temperature
Current Sense Voltage
vs Duty Cycle, ITHB
PG Delay Time vs Temperature in
Flyback Mode
PG Delay Time vs Temperature in
Forward Mode
Input Current vs Input Voltage
25k Detection Range
Signature Resistance
vs Input Voltage VCC Current vs Temperature
VPORT VOLTAGE (V)
0
0
VPORT CURRENT (mA)
0.4
0.3
0.2
0.1
0.5
6 8 102 4
4276 G01
125°C
85°C
25°C
–40°C
VPORT VOLTAGE (V)
1
23.75
SIGNATURE RESISTANCE (kΩ)
25.75
25.25
24.75
24.25
26.25
65 87 92 43
4276 G02
125°C
85°C
25°C
–40°C
TEMPERATURE (°C)
–50
0
VCC CURRENT (mA)
10
8
6
4
2
12
5025 10075 1250–25
4276 G03
214KHz
300KHz
TEMPERATURE (°C)
–50
3.162
VFB31 (V)
3.176
3.174
3.172
3.170
3.168
3.166
3.164
3.178
5025 10075 1250–25
4276 G04
FB31 VOLTAGE (V)
2.57
–15
ITHB CURRENT (µA)
10
5
–5
0
–10
15
3.17 3.37 3.57 3.772.77 2.97
4276 G05
125°C
85°C
25°C
–40°C
TEMPERATURE (°C)
–50
175
FREQUENCY (kHz)
300
275
250
225
200
325
5025 10075 1250–25
4276 G06
ROSC = 45.3k
ROSC OPEN
VITHB = 1.8V
VITHB = 2.3V
VITHB = 2.6V
VITHB = 2.9V
DUTY CYCLE (%)
0
0
V(ISEN+ - ISEN–) (mV)
140
80
100
120
60
40
20
160
4030 6050 702010
4276 G07
VITHB = 0.96V (FB31 = 0V)
TEMPERATURE (°C)
–50
0
PG DELAY TIME (ns)
200
150
100
50
250
5025 10075 1250–25
4276 G08
RFFSDLY = 5.23k
RFFSDLY = 52.3k
TPGDELAY, RFFSDLY = 10.5k
TPGSG, RFFSDLY = 10.5k
TPGSG, RFFSDLY = 52.3k
TPGDELAY, RFFSDLY = 52.3k
TEMPERATURE (°C)
–50
0
DELAY TIME (ns)
350
200
250
300
150
100
50
400
5025 10075 1250–25
4276 G09
LT4276
LT4276
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For more information www.linear.com/LT4276
pin FuncTions
GND(Pins 1, 19, Exposed Pad Pin 29): Device Ground.
Exposed Pad must be electrically and thermally connected
to PCB GND and Pin 19.
RCLASS++ (Pin 3, LT4276A Only): LTPoE++ Class Select
Input. Connect a resistor between RCLASS++ to GND per
Table 1.
AUX (Pin 2): Auxiliary Sense. Assert AUX via a resistive
divider from the auxiliary power input to set the voltage
at which the auxiliary supply takes over. Asserting AUX
pulls down HSGATE, disconnects the signature resistor
and disables classification. The AUX pin sinks IAUXH when
below its threshold voltage of VAUXT to provide hysteresis.
Connect to GND if not used.
RCLASS (Pin 4): Class Select Input. Connect a resistor
between RCLASS to GND per Table 1.
T2P (Pin 5, LT4276A and LT4276B only): PSE Type Indica-
tor. Low impedance to VCC indicates 2-event classification.
Alternating low/high impedance indicates LTPoE++ clas-
sification (LT4276A only, see Applications Information).
High impedance indicates 1-event classification. This pin
is not connected on the LT4276C. See the Applications
Information Section for pin behavior when using the AUX
pin.
DNC (Pin 22): Do Not Connect. Leave pin open.
ROSC (Pin 10): Programmable Frequency Adjustment.
Resistor to GND programs operating frequency. Leave
open for default frequency of 214kHz.
SFST (Pin 11): Soft-Start. Capacitor to GND sets soft-
start timing.
FFSDLY (Pin 12): Forward/Flyback Select and Primary
Gate Delay Adjustment. Resistor to GND adjusts gate drive
delay for a flyback topology. Resistor to VCC adjusts gate
drive delay for a forward topology.
ITHB (Pin 13): Current Threshold Control. The voltage on
this pin corresponds to the peak current of the external
FET. Note that the voltage gain from ITHB to the input of
the current sense comparator (VSENSE) is negative.
FB31 (Pin 14): Feedback Input. In flyback mode, connect
external resistive divider from the third winding feedback.
Reference voltage is 3.17V. Connect to GND in forward
mode.
RLDCMP (Pin 15): Load Compensation Adjustment. Op-
tional resistor to GND controls output voltage set point
as a function of peak switching current. Leave RLDCMP
open if load compensation is not needed.
ISEN(Pin 16): Current Sense, Negative Input. Route as
a dedicated trace to the current sense resistor.
ISEN+ (Pin 17): Current Sense, Positive Input. Route as
a dedicated trace to the current sense resistor.
SG (Pin 18): Secondary (Synchronous) Gate Drive, Output.
PG (Pin 20): Primary Gate Drive, Output.
VCC (Pins 6, 7, 8, 9, 21): Switching Regulator Controller
Supply Voltage. Connect a local 1µF ceramic capacitor
from VCC pin 21 to GND pin 19 as close as possible to
LT4276 as shown in Table 2.
SWVCC(Pin 23): Switch Driver for VCC’s Buck Regulator.
This pin drives the base of a PNP in a buck regulator to
generate VCC.
VIN (Pin 24): Buck Regulator Supply Voltage. Usually
separated from HSSRC by a pi filter.
HSSRC (Pin 25): External Hot Swap MOSFET Source.
Connect to source of the external MOSFET.
HSGATE (Pin 26): External Hot Swap MOSFET Gate Con-
trol, Output. Capacitance to GND determines inrush time.
NC (Pin 27): No Connection. Not internally connected.
VPORT (Pin 28): PD Interface Supply Voltage and External
Hot Swap MOSFET Drain Connection.
LT42 76 NSENSE w
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block DiagraM
+
+
+
+
+
+
+
+
+
SLOPE
COMP
OSC
TSD
CP
SWITCHING
REGULATOR
CONTROLLER
PD INTERFACE
CONTROLLER
START-UP
REGULATOR
INTERNAL
BUCK
CONTROLLER
1.4V
1.4V
HSGATE
HSSRC
11V
VPORT
VPORT SWVCCVIN
VCC
ITHB
SFST
FFSDLY
ROSC
ISEN+
ISEN
4276 BD
T2P
GND
PG
SG
VCC
VPORT
RCLASS
RCLASS++
AUX
VAUXT
IAUXH
FB31
RLDCMP
FEEDBACK AMP
gm = –40µA/V
LOAD
COMP
CURRENT
FAULT
COMPARATOR
CURRENT
SENSE
COMPARATOR
VFB
VFAULT
AV = 10
AV = 1
VCC
VSENSE
VITHB(OS)
AV =∆VSENSE
∆VITHB
LT4276 AVsENsE Mm
LT4276
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For more information www.linear.com/LT4276
OVERVIEW
Power over Ethernet (PoE) continues to gain popularity
as products take advantage of DC power and high speed
data available from a single RJ45 connector. The LT4276A
allows higher power while maintaining backwards compat-
ibility with existing PSE systems. The LT4276 combines
a PoE PD controller and a switching regulator controller
capable of either flyback or forward isolated power sup-
ply operation.
SIGNIFICANT DIFFERENCES FROM PREVIOUS
PRODUCTS
The LT4276 has several significant differences from pre-
vious Linear Technology products. These differences are
briefly summarized below. See Applications Information
for more detail.
ITHB Is Inverted from the Usual ITH pin
The ITHB pin voltage has an inverse relationship to the cur-
rent sense comparator threshold, VSENSE. Furthermore, the
ITHB pin offset voltage, VITHB(OS), is 3.17V. See Figure 1.
Duty-Cycle Based Soft-Start
The LT4276 uses a duty cycle ramp soft-start that injects
charge into ITHB. This allows startup without appreciable
overshoot and with inexpensive external components.
The Feedback Pin (FB31) is 3.17V rather than 1.25V
The error amp feedback voltage (VFB) is 3.17V.
applicaTions inForMaTion
Figure 1. VSENSE vs. VITHB
Flyback/Forward Mode Is Pin Selectable
The LT4276 operates in flyback mode if FFSDLY is pulled
down by a resistor to GND. It operates in forward mode
if FFSDLY is pulled up by a resistor to VCC. The value of
this resistor determines the tPGDELAY and tPGSG.
T2P Pin Polarity Is Reversed
The T2P pin pulls up to VCC when active rather than pull-
ing down to GND.
VCC Is Powered by Internally Driven Buck Regulator
The LT4276 includes a buck regulator controller that must
be used to generate the VCC supply voltage.
PoE MODES OF OPERATION
The LT4276 has several modes of operation, depending
on the input voltage sequence applied to the VPORT pin.
VSENSE
∆VSENSE
∆VITHB
VITHB
VITHB(OS)
4276 F01
Table 1. Classification Codes, Power Levels and Resistor Selection
CLASS
PD POWER
AVAILABLE PD TYPE
NOMINAL CLASS
CURRENT
LT4276 GRADE CAPABILITY RESISTOR (1%)
A B C RCLS RCLS++
0 13W Type 1 0.7mA Open Open
1 3.84W Type 1 10.5mA 150Ω Open
2 6.49W Type 1 18.5mA 80.6Ω Open
3 13W Type 1 28mA 52.3Ω Open
4 25.5W Type 2 40mA √ √ 35.7Ω Open
4* 38.7W LTPoE++ 40mA Open 35.7Ω
4* 52.7W LTPoE++ 40mA 150Ω 47.5Ω
4* 70W LTPoE++ 40mA 80.6Ω 64.9Ω
4* 90W LTPoE++ 40mA 52.3Ω 118Ω
*An LTPoE++ PD classifies as class 4 by an IEEE 802.3 compliant PSE.
LT4276 ST RK 2N AR ST MARK 2ND MAR 3RD MAR L7 LJUW
LT4276
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Figure 2. Type 1 Detect/Class Signaling Waveform
Figure 3. Type 2 Detect/Class Signaling Waveform
Figure 4. LTPoE++ Detect/Class Signaling Waveform
applicaTions inForMaTion
Detection
During detection, the PSE looks for a 25kΩ signature
resistor which identifies the device as a PD. The LT4276
signature resistor is smaller than 25k to compensate for
the additional series resistance introduced by the IEEE
required bridge.
Classification
The detection/classification process varies depending on
whether the PSE is Type 1, Type 2, or LTPoE++. A Type 1
PSE, after a successful detection, may apply a classifica-
tion probe voltage of 15.5V to 20.5V and measure current.
In 2-event classification, a Type 2 PSE probes for power
classification twice as shown in Figure 3. The LT4276A or
LT4276B recognizes this and pulls the T2P pin up to VCC to
signal the load that Type 2 power is available. Otherwise it
does not pull up on the T2P pin, indicating that only Type
1 power is available. If an LT4276A senses an LTPoE++
PSE it alternates between pulling T2P up and floating T2P
at a rate of fT2P to indicate the LTPoE++ power is available.
LTPoE++ Classification
The LT4276A allows higher power allocation while main-
taining backwards compatibility with existing PSE systems
by extending the classification signaling of IEEE 802.3.
Linear Technology PSE controllers capable of LTPoE++
are listed in the Related Parts section. IEEE PSEs classify
an LTPoE++ PD as a Type 2 PD.
Classification Resistors (RCLS and RCLS++)
The RCLS and RCLS++ resistors set the classification cur-
rent corresponding to the PD power classification. Select
the value of RCLS from Table 1 and connect the resistor
between the RCLASS pin and GND. For LTPoE++, use
the LT4276A and select the value of RCLS++ from Table
1 in addition to RCLS. The resistor tolerance must be 1%
or better to avoid degrading the overall accuracy of the
classification circuit.
Signature Corrupt During Mark
During the mark state, the LT4276 presents <11kΩ to the
port as required by the IEEE specification.
4276 F02
VPORT
VHSON
VHSOFF
VCLASSMIN
VSIGMAX
VSIGMIN
VRESET
DETECT
CLASS
POWER ON
4276 F03
VPORT
VHSON
VHSOFF
VCLASSMIN
VSIGMAX
VSIGMIN
VRESET
DETECT
1ST CLASS
1ST MARK 2ND MARK
2ND CLASS
POWER ON
4276 F04
VPORT
VHSON
VHSOFF
VCLASSMIN
VSIGMAX
VSIGMIN
VRESET
DETECT
1ST CLASS
1ST MARK 2ND MARK 3RD MARK
2ND CLASS 3RD CLASS
POWER ON
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applicaTions inForMaTion
Inrush and Powered On
Once the PSE detects and optionally classifies the PD, the
PSE then powers on the PD. When the port voltage rises
above the VHSON threshold, it begins to source IGPU out
of the HSGATE pin. This current flows into an external
capacitor (CGATE in Figure 5) that causes a voltage to ramp
up the gate of the external MOSFET. The external MOSFET
acts as a source follower and ramps the voltage up on
the output bulk capacitor (CPORT in Figure 5), thereby
determining the inrush current (IINRUSH in Figure 5). To
meet IEEE requirements, design IINRUSH to be ~100mA.
The LT4276 internal charge pump provides an N-channel
MOSFET solution, eliminating a larger and more costly
P-channel FET. The low RDS(ON) MOSFET also maximizes
power delivery and efficiency, reduces power and heat
dissipation, and eases thermal design.
Figure 5. Programming IINRUSH
Figure 6. VCC Buck Regulator
EXTERNAL VCC SUPPLY
The external VCC supply must be configured as a buck
regulator shown in Figure 6. To optimize the buck regulator,
use the external component values in Table 2 correspond-
ing to the VIN operating range. This buck regulator runs
in discontinuous mode with the inductor peak current
considerably higher than average load current on VCC.
Thus, the saturation current rating of the inductor must
exceed the values shown in Table 2. Place the capacitor, C,
as close as possible to VCC pin 21 and GND pin 19. For
optimal performance, place the external components as
close as possible to the LT4276.
LT4276
HSGATE
GND
4276 F05
VPORT HSSRC
CGATE
IGPU
3.3k
+
CPORT
VPORT
IINRUSH
IINRUSH =IGPU CPORT
CGATE
DELAY START
After the HSGATE charges up to approximately 7V above
HSSRC, fully enhancing the external Hot Swap MOSFET,
the switching regulator controller operates after a delay
of tSTART. During this delay, the LT4276 draws IMPS from
VPORT to ensure that the PSE does not DC disconnect
the PD due to Maintain Power Signature requirements.
VIN
Re
VCC
VIN
VCC
GND
SWVCC
LT4276
FMMT723
PBSS9110T
L(µH)
C(µF)
4276 F06
AUXILIARY SUPPLY OVERRIDE
If the AUX pin is held above VAUXT, the LT4276 enters
auxiliary power supply override mode. In this mode the
signature resistor is disconnected, classification is dis-
abled, and HSGATE is pulled down. The T2P pin pulls up
to VCC on the LT4276B (or the LT4276A when no RCLS++
resistor is present). The T2P pin alternates between pulling
up and floating at fT2P on the LT4276A when the RCLS++
resistor is present.
The AUX pin allows for setting the auxiliary supply turn on
(VAUXON) and turn off (VAUXOFF) voltage thresholds. The
auxiliary supply hysteresis voltage (VAUXHYS) is set by
sinking current (IAUXH) only when the AUX pin voltage is
Table 2 . Buck Regulator Component Selection
VIN C L ISAT Re
9V-57V
PoE 22µF
10µF 22µH
100µH ≥1.2A
≥300mA
20Ω
LT42 76 VAUXON VAUXOFF VAust J‘— (VAUXOFF 1W 3” — T g5 t :2.69ns/kL2-R +30ns L7 LJUW 1 1
LT4276
11
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For more information www.linear.com/LT4276
applicaTions inForMaTion
Figure 7. AUX Threshold and Hysteresis Calculation
LT4276
GND
4276 F08a
AUX
R1
VAUX
+
R2
R1=VAUXON VAUXOFF
IAUXH =VAUXHYS
IAUXH
R2 =R1
VAUXOFF
VAUXT 1
R1VAUX(MAX) VAUXT
1.4mA
SWITCHING REGULATOR CONTROLLER OPERATION
The switching regulator controller portion of the LT4276
is a current mode controller capable of implementing
either a flyback or a forward power supply. When used in
flyback mode, no opto-isolator is required for feedback
because the output voltage is sensed via the transformer’s
third winding.
Flyback Mode
The LT4276 is programmed into flyback mode by placing
a resistor RFFSDLY from the FFSDLY pin to GND. This resis-
tor must be in the range of 5.23kΩ to 52.3kΩ. If using a
potentiometer to adjust RFFSDLY, ensure the adjustment
of the potentiometer does not exceed 52.3kΩ.The value
of RFFSDLY determines tPGDELAY according to the following
equations:
t
PGDELAY
2.69ns / kΩR
FFSDLY
+30ns
tPGSG 20ns
The PG and SG relationships in flyback mode are shown
in Figure 8.
The SG pin must be connected to the secondary side
MOSFET through a gate drive transformer as shown in
Figure 9. Add a Schottky diode from PG to GND as shown
in Figure 9 to prevent PG from going negative.
Figure 8: PG and SG Relationship in Flyback Mode
Figure 9: Example PG and SG Connections in Flyback Mode
PG
SG
4276 F07
tPGDELAY
tPGon
tPGSG
PG
SGGND
LT4276
4276 F08
FFSDLY
RFFSDLY
ISEN+
ISEN
+
Forward Mode
The LT4276 is programmed into forward mode by placing
a resistor RFFSDLY from the FFSDLY pin to VCC. The RFFSDLY
resistor must be in the range of 10.5kΩ to 52.3kΩ. If using
a potentiometer to adjust RFFSDLY ensure the adjustment
of the potentiometer does not exceed 52.3kΩ.
The value of RFFSDLY determines tPGDELAY and tPGSG ac-
cording to the following equations:
tPGDELAY ≈ 7.16ns/kΩ RFFSDLY + 17ns
tPGSG ≈ 5.60ns/kΩ RFFSDLY + 7.9ns
The PG and SG relationships in forward mode are shown
in Figure 10.
less than VAUXT. Use the following equations to set VAUXON
and VAUXOFF via R1 and R2 in Figure 7. A capacitor up to
1000pF may be placed between the AUX pin and GND to
improve noise immunity.
VAUXON must be lower than VHSOFF.
LT4276 P E“ g @f I 1P3“ gt”: 115% ——$ "HE E $5; L L 4% W F \_‘ L —1 M
LT4276
12
4276fa
For more information www.linear.com/LT4276
applicaTions inForMaTion
Figure 10: PG and SG relationship in Forward Mode
In forward mode, the SG pin has the correct polarity to
drive the active clamp P-channel MOSFET through a simple
level shifter as shown in Figure 11. Add a Schottky diode
from the PG to GND as shown in Figure 11 to prevent PG
from going negative.
FEEDBACK AMPLIFIER
In the flyback mode, the feedback amplifier senses the
output voltage through the transformer’s third winding as
shown in Figure 12. The amplifier is enabled only during the
fixed interval, tFB, as shown in Figure 13. This eliminates
the opto-isolator in isolated designs, thus greatly improving
the dynamic response and stability over lifetime. Since tFB
is a fixed interval, the time-averaged transconductance,
gm, varies as a function of the user-selected switching
frequency.
PG
SG
4276 F09
tPGDELAY tPGSG
Figure 11: Example PG and SG Connections in Forward Mode
PG
VCC
VCC
SG
GND
LT4276
4276 F10
FFSDLY
RFFSDLY
ISEN+
ISEN
+
+
+
FEEDBACK
FB31 LT4276 THIRD
PRIMARY
4276 F11
SECONDARY
ITHB
PG
ISEN+
ISEN
RLDCMP
RFB2
VIN
VOUT
RSENSE
VFB
RFB1
RLDCMP
AV = 10
Figure 12: Feedback and Load Compensation Connection
Figure 13: Feedback Amplifier Timing Diagram
PG
FB31
VOLTAGE GND
SG
4276 F09
tFB
tFBDLY
VFB
FEEDBACK AMPLIFIER OUTPUT, ITHB
As shown in the Block Diagram, VSENSE is the input of
the Current Sense Comparator. VSENSE is derived from
the output of a linear amplifier whose input is the voltage
on the ITHB pin, VITHB.
This linear amplifier inverts its input, VITHB, with a gain,
ΔVSENSE/ΔVITHB, and with an offset voltage of VITHB(OS)
to yield its output, VSENSE. This relationship is shown
graphically in Figure 1. Note the slope ΔVSENSE/ΔVITHB
is a negative number and is provided in the electrical
characteristics table.
VITHB =VITHB(OS) +VSENSE ΔVSENSE
ΔVITHB
LT42 76 : 2k$2 VOUT TH‘RD NSECONDARY AVOUT TH‘RD RFBZ L7HEJWEGR 1 3
LT4276
13
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The block diagram shows VSENSE is compared against
the voltage across the current sense resistor, V(ISEN+)-
V(ISEN) modified by the internal slope compensation
voltage discussed subsequently.
LOAD COMPENSATION
As can be seen in Figure 13, the voltage on the FB31 pin
droops slightly during the flyback period. This is mostly
caused by resistances of components of the secondary
side such as: the secondary winding, RDS(ON) of the syn-
chronous MOSFET, ESR of the output capacitor, etc. These
resistances cause a feedback error that is proportional to
the current in the secondary loop at the time of feedback
sample window. To compensate for this error, the LT4276
places a voltage proportional to the peak current in the
primary winding on the RLDCMP pin.
Determining Feedback and Load Compensation
Resistors
Because the resistances of components on the secondary
side are generally not well known, an empirical method
must be used to determine the feedback and load com-
pensation resistor values.
INITIALLY SET R
FB2
=2kΩ
RFB1 RFB2
VOUT
V
FB
NTHIRD
N
SECONDARY
RFB2
Connect the resistor RLDCMP between the RLDCMP pin and
GND. RLDCMP must be at least 10kΩ. Adjust RLDCMP for
minimum change of VOUT over the full input and output load
range. A potentiometer in series with 10kΩ may be initially
used for RLDCMP and adjusted. The potentiometer+10kΩ
may then be removed, measured, and replaced with the
equivalent fixed resistor. The resulting VOUT differs from
the desired VOUT due to offset injected by load compensa-
tion. The change to RFB2 to correct this is predicted by:
ΔRFB2 =ΔVOUT
V
FB
NTHIRD
N
SECONDARY
RFB22
R
FB1
applicaTions inForMaTion
Where: ΔVOUT is the desired change to VOUT
ΔRFB2 is the required change to RFB2
NTHIRD/NSECONDARY is the transformer third
winding to secondary winding
OPTO-ISOLATOR FEEDBACK
For forward mode operation, the flyback voltage cannot be
sensed across the transformer. Thus, opto-isolator feed-
back must be used. When using opto-isolator feedback,
connect the FB31 pin to GND and leave the RLDCMP pin
open. In this condition, the feedback amplifier sinks an
average current of ISINK into the ITHB pin. An example for
feedback connections is shown in Figure 14. Note that
since ISINK is time-averaged over the switching period,
the sink current varies as a function of the user-selected
switching frequency.
Figure 14: Opto-isolator Feedback
Connections in the Forward Mode
LT4276
ITHB
4276 F13
VCC VOUT
CX
RX
FB31GND
SOFT-START
In PoE applications, a proper soft-start design is required
to prevent the PD from drawing more current than the
PSE can provide.
The soft-start time, tSFST, is approximately the time in
which the power supply output voltage, VOUT, is charg-
ing its output capacitance, COUT. This results in an inrush
current at the port of the PD, Iport_inrush. Care must be
taken in selecting tSFST to prevent the PD from drawing
more current than the PSE can provide.
LT4276 14 SFST BQUUkSZ'kHZ ( ) JMEJMLJHL L7LJCUEN2
LT4276
14
4276fa
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In the absence of an output load current, the Iport_inrush,
is approximated by the following equation:
Iport_inrush ≈ (COUT VOUT2)/(η tSFST VIN)
where η is the power supply efficiency,
VIN is the input voltage of the PD
Iport_inrush plus the port current due to the load current
must be below the current the PSE can provide. Note that
the PSE current capability depends on the PSE operating
standard.
The LT4276 contains a soft-start function that controls
tSFST by connecting an external capacitor, CSFST, between
the SFST pin and GND. The SFST pin is pulled up with ISFST
when the LT4276 begins switching. The voltage ramp on
the SFST pin is proportional to the duty cycle ramp for PG.
For flyback mode, the soft-start time is:
tSFST =600µA
nF
CSFST
ISFST
tPGon +tPGDELAY – tMIN
( )
where tPGon is the time when PG is high as shown in
Figure 8 once the power supply is in steady-state.
In forward mode, each of the back page applications sche-
matics provides a chart with tSFST vs. CSFST. Select the
application and choose a value of CSFST that corresponds
to the desired soft-start time.
CURRENT SENSE COMPARATOR
The LT4276 uses a differential current sense comparator
to reduce the effects of stray resistance and inductance
on the measurement of the primary current. ISEN+ and
ISEN must be Kelvin connected to the sense resistor pads.
Like most switching regulator controllers, the current
sense comparator begins sensing the current tMIN after
PG turns on. Then, the comparator turns PG off after the
voltage across ISEN+ and ISEN– exceeds the current
sense comparator threshold, VSENSE. Note that the voltage
across ISEN+ and ISEN– is modified by LT4276’s internal
slope compensation.
SLOPE COMPENSATION
The LT4276 incorporates current slope compensation.
Slope compensation is required to ensure current loop
stability when the duty cycle is greater than or near 50%.
The slope compensation of the LT4276 does not reduce
the maximum peak current at higher duty cycles.
CONTROL LOOP COMPENSATION
In flyback mode, loop frequency compensation is per-
formed by connecting a resistor/capacitor network from
the output of the feedback amplifier (ITHB pin) to GND as
shown in Figure 12. In forward mode, loop compensation
is performed by varying RX and CX in Figure 14.
ADJUSTABLE SWITCHING FREQUENCY
The LT4276 has a default switching frequency, fOSC, of 214
kHz when the ROSC pin is left open. If a higher switching
frequency, fSW, is desired (up to 300 kHz), a resistor no
smaller than 45.3kΩ may be added between the ROSC pin
to GND. The resistor can be calculated below:
ROSC =
3900kΩkHz
fSW – fOSC
( )
kΩ
( )
SHORT CIRCUIT RESPONSE
If the power supply output voltage is shorted, overloaded,
or if the soft-start capacitor is too small, an overcurrent
fault event occurs when the voltage across the sense pins
exceeds VFAULT (after the blanking period of tMIN). This
begins the internal fault timer tFAULT. For the duration
of tFAULT, the LT4276 turns off PG and SG and pulls the
SFST pin to GND. After tFAULT expires, the LT4276 initi-
ates soft-start.
The fault and soft-start sequence repeats as long as the
short circuit or overload conditions persist. This condition
is recognized by the PG waveform shown in Figure 15
re peating at an interval of tFAULT.
Figure 15: PG Waveform with Output Shorted
tFAULT
4276 F14
LT42 76 MAX POWER SUPPLY DUTY CYCLE L7HEJWEGR 1 5
LT4276
15
4276fa
For more information www.linear.com/LT4276
applicaTions inForMaTion
OVERTEMPERATURE PROTECTION
The IEEE 802.3 specification requires a PD to withstand
any applied voltage from 0V to 57V indefinitely. During
classification, however, the power dissipation in the LT4276
may be as high as 1.5W. The LT4276 can easily tolerate
this power for the maximum IEEE classification timing but
overheats if this condition persists abnormally.
The LT4276 includes an over-temperature protection
feature which is intended to protect the device during
momentary overload conditions. If the junction temperature
exceeds the over-temperature threshold, the LT4276 pulls
down HSGATE pin, disables classification, and disables
the switching regulator operation.
MAXIMUM DUTY CYCLE
The maximum duty cycle of the PG pin is modified by the
chosen tPGDELAY and fSW. It is calculated below:
MAX POWER SUPPLY DUTY CYCLE
=DMAX – tPGDELAY fSW
For an appropriate margin during transient operation, the
forward or flyback power supply should be designed so
that its maximum steady-state duty cycle should be about
10% lower than the LT4276 Maximum Power Supply Duty
Cycle calculated above.
EXTERNAL INTERFACE AND COMPONENT SELECTION
PoE Input Diode Bridge
PDs are required to polarity-correct its input voltage.
When diode bridges are used, the diode forward voltage
drops affect the voltage at the VPORT pin. The LT4276
is designed to tolerate these voltage drops. The voltage
parameters shown in the Electrical Characteristics are
specified at the LT4276 package pins.
For high efficiency applications, the LT4276 supports
an LT4321-based PoE ideal diode bridge that reduces
the forward voltage drop from 0.7V to nearly 20mV per
diode in normal operation, while maintaining IEEE 802.3
compliance.
Auxiliary Input Diode Bridge
Some PDs are required to receive AC or DC power from an
auxiliary power source. A diode bridge is typically required
to handle the voltage rectification and polarity correction.
In high efficiency applications, the voltage drop across the
rectifier cannot be tolerated. The LT4276 can be configured
with an LT4320-based ideal diode bridge to recover the
diode voltage drop and ease thermal design.
Input Capacitor
A 0.1µF capacitor is needed from VPORT to GND to meet
the input impedance requirement in IEEE 802.3 and to
properly bypass the LT4276. This capacitor must be placed
as close as possible to the VPORT and GND pins.
Transient Voltage Suppressor
The LT4276 specifies an absolute maximum voltage of
100V and is designed to tolerate brief overvoltage events
due to Ethernet cable surges.
To protect the LT4276, install a unidirectional transient
voltage suppressor (TVS) such as an SMAJ58A between
the VPORT and GND pins. This TVS must be placed as close
as possible to the VPORT and GND pins of the LT4276.
For PD applications that require an auxiliary power input,
install a TVS between VIN and GND as close as possible
to the LT4276.
For extremely high cable discharge and surge protection
contact Linear Technology Applications.
LT4276 iii
LT4276
16
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For more information www.linear.com/LT4276
Typical applicaTions
+VOUT
5V AT 2.3A
–VOUT
Q1
L1: COILCRAFT, DO1813P-181HC
L2: COILCRAFT, DO1608C-103
L4: COILCRAFT, DO1608C-104
C2: 22µF, 6.3V, MURATA GRM31CR70J226KE19
C5: 47µF, 6.3V, PANASONIC 6SVP47M
C7: 2.2µF, 100V, MURATA GRM32ER72A225KA35
T1: WÜRTH, 750313109
Q1: PSMN075-100MSE
T2: PCA EPA4271GE OR PULSE PE-68386NL
VPORT
GND
L2
10µH L1
180nH
L4
100µH
10µF
100V
10nF
100V
3.3k
10µF
10V
HSSRC SWVCC FB31
PG
SG
ITHBROSCSFSTFFSDLYRCLASSGND
VPORT
LT4276C
HSGATE
ISEN+
ISEN
VIN VCC
C7
2.2µF
FDN86246
BAT54WS
BAT46WS
T2
4276 TA02
PSMN4R2-30MLD
MMBT3906 MMBT3904
T1
1nF
F
6.04k
20Ω
2k
270Ω
1/4W
11Ω
1/4W
60mΩ
1/4W
15Ω
100Ω
F
330pF
0.1µF
107k5.23k52.3Ω
8.2Ω
PTVS58VP1UTP
4.7nF
2.2nF
2KV
20k
10k
2.2nF
C2
22µF C5
47µF
6.3V
47pF
630V
0.1µF
100V
2.2nF
2kV
BAV19WS
FMMT723
13W (TYPE 1) PoE Power Supply in Flyback Mode with 5V, 2.3A Output
Efficiency vs Load Current Output Regulation vs Load Current
LOAD CURRENT (A)
0.2
76
EFFICIENCY (%)
90
88
86
84
82
80
78
92
1.21.0 1.6 1.8 2.0 2.21.4 2.40.4 0.80.6
4276 TA02a
VPORT = 37V
VPORT = 48V
VPORT = 57V
LOAD CURRENT (A)
0.2
4.80
VOUT (V)
5.15
5.10
5.05
5.00
4.95
4.90
4.85
5.20
1.21.0 1.6 1.8 2.0 2.21.4 2.40.4 0.80.6
4276 TA02b
VPORT = 37V
VPORT = 48V
VPORT = 57V
LT42 76 L7HEJWEGR 1 7
LT4276
17
4276fa
For more information www.linear.com/LT4276
Typical applicaTions
+VOUT
5V AT 4.7A
–VOUT
Q1
L1: COILCRAFT, DO1813P-181HC
L2: COILCRAFT, DO1608C-103
L4: COILCRAFT, DO1608C-104
C2, C3: 22µF, 6.3V, MURATA GRM31CR70J226KE19
C5: 47µF, 6.3V, PANASONIC 6SVP47M
C7: 2.2µF, 100V, MURATA GRM32ER72A225KA35
T1: WÜRTH, 750313082 OR PCA EPC3409G
Q1-Q9: PSMN075-100MSE
T2: PCA EPA4271GE OR PULSE PE-68386NLL2
10µH L1
180nH
L4
100µH
10µF
100V
10nF
100V
3.3k
24V
8.2Ω
10µF
10V
HSSRC
SWVCC FB31
PG
SG
T2P
ITHBROSCSFSTFFSDLYRCLASSGND
VPORT
LT4276B
HSGATE
ISEN+
ISEN
VIN VCC
C7
2.2µF
BSZ520N15NS3G
BAT54WS
BAT46WS
TO MICROPROCESSOR
4276 TA03
PSMN2R4-30MLD
MMBT3906 MMBT3904
T1
1nF
1µF
5.90k20Ω
2k
160Ω||160Ω
1/4W
5.1Ω
1/4W
40mΩ
1/4W
15Ω
100Ω
1µF
220pF
0.1µF
107k7.50k35.7Ω
PTVS58VP1UTP 3.3nF
2.2nF
2KV
20k
10k
2.2nF
C2, C3
22µF||22µF C5
47µF
100pF
100V
47nF
100V
2.2nF
2kV
OPTO
BG36
LT4321
BG12TG12 TG36
TG78TG45BG45 BG78
OUTP
OUTN
EN
EN
IN12
T2
Q2 Q3
Q4 Q5
Q6 Q7
Q8 Q9
1
DATA
PAIRS
SPARE
PAIRS
2
3
6
4
5
7
8
IN36
IN45
IN78
47nF
100V
BAV19WS
FMMT723
25.5W (Type 2) PoE+ Power Supply in Flyback Mode with 5V, 4.7A Output
Efficiency vs Load Current VOUT vs Load Current
LOAD CURRENT (A)
0.5
78
EFFICIENCY (%)
92
90
88
86
84
82
80
94
2.01.5 3.0 3.5 4.0 4.52.5 5.01.0
4276 TA03a
VPORT = 42.5V
VPORT = 50V
VPORT = 57V
LOAD CURRENT (A)
0.5
4.80
VOUT (V)
5.15
5.10
5.05
5.00
4.95
4.90
4.85
5.20
2.01.5 3.0 3.5 4.0 4.52.5 5.01.0
4276 TA03b
VPORT = 42.5V
VPORT = 50V
VPORT = 57V
LT4276 Ellé E T 55* V fl??? 5 DE 1. H" WW—fll —| |—‘ «v ‘Wv—' ~| H" §,_| HI ’7 H I EW—‘M H' a? N
LT4276
18
4276fa
For more information www.linear.com/LT4276
Typical applicaTions
Q1
10nF
100V
3.3k
L4
100µH
10µF
10V
BAV19WS
FMMT723
8.2Ω
PTVS58VP1UTP
0.1µF
100V
L1
2.2µH
C5
100µF
(×2)
C8
100µF
6HVA100M
+
+
L2
4.9µH
22µF
100V
HSSRC SWVCC FFSDLY
PG
SG
ITHBROSCSFSTRCLASS++
RCLASSGND FB31
T2P
VPORT
LT4276A
HSGATE
ISEN+
ISEN
VIN VCC
VCC
+VOUT
+VOUT
+5V AT
13A
VCC
C7
2.2µF
(×2)
BAT54WS
BSC190N12NS3
4276 TA04
20m
1/4W
100Ω
1206
10nF
250V
100nF
250V
750Ω
330Ω 240Ω
4.7n
ZR431
10k 10.0k
10.0k
1k
10Ω
10Ω
CMMSH1-40L BSC054N04NSBSC054N04NS
CMMSH1-40L
T1
CMMSH1-40L
8.2V
CMHZ4694
18V
CMHZ5248B
18V
CMHZ5248B
2.2nF
2kV
33nF
0.1µF
0.1µF
10k
0.1µF FDMC2523P
CMMSH1-40L
M0C207M
MMBT3904
VPORT
GND
13k
20Ω
80.6Ω 64.9Ω
0.47µF 100pF
100k
107k
L1: COILCRAFT, XAL-1010-222ME
L2: WÜRTH, 744314490
L4: COILCRAFT, DO1608C-104
C5, 100µF, 6.3V, SUNCON 6HVA100M
C7: 2.2µF, 100V, MURATA GRM32ER72A225KA35L
C8: 100µF, 6.3V, SUNCON 6HVA100M
T1: WÜRTH, 750313095
Q1: PSMN040-100MSE
TO MICROPROCESSOROPTO
10nF
Efficiency vs Load Current VOUT vs Load Current
70W LTPoE++ Power Supply in Forward Mode with 5V, 13A Output
LOAD CURRENT (A)
1
76
EFFICIENCY (%)
92
90
88
86
84
82
80
78
94
76 9 10 11 128 1332 54
4276 TA04a
VPORT = 41V
VPORT = 50V
VPORT = 57V
LOAD CURRENT (A)
1
4.80
VOUT (V)
5.15
5.10
5.05
5.00
4.95
4.90
4.85
5.20
76543 9 10 11 128 132
4276 TA04b
VPORT = 41V
VPORT = 50V
VPORT = 57V
CSFST (µF) tSFST (ms)
0.10 1.2
0.33 3.8
1.0 12
3.3 38
LT4276 L7HEJWEGR 1 9
LT4276
19
4276fa
For more information www.linear.com/LT4276
Efficiency vs Load Current VOUT vs Load Current
+
L2
6.5µH
22µF
100V
HSSRC
SWVCC FFSDLY
PG
SG
ITHBROSCSFSTRCLASS++
RCLASSGND FB31
T2P
VPORT
LT4276A
HSGATE
ISEN+
ISEN
VIN VCC
VCC
+VOUT
+VOUT
+12V AT
7A
VCC
C7
2.2µF
(×2)
BAT54WS
BSC190N12NS3
4276 TA05
15mΩ
1/4W
100Ω
1206
33nF
250V
0.22µF
250V
750Ω
820Ω 20k
ZR431
10k
10.0k
100pF
38.3k
13k
10Ω
CMMSH1-60
BSC123N08S3
BSC123N08S3
T1
CMMSH1-100
CMMSH1-100
13V
CMHZ4700
7.5V
CMHZ5236B
2.2nF
2kV
6.8nF
0.1µF
0.1µF
10k
0.1µF FDMC2523P
CMMSH1-40L
M0C207M
MMBT3904
29.4k
VCC
BG36
LT4321
BG12TG12 TG36
TG78TG45BG45 BG78
OUTP
OUTN
EN
EN
IN12
T2
Q2 Q3
Q4 Q5
Q6 Q7
Q8 Q9
1
DATA
PAIRS
SPARE
PAIRS
2
3
6
4
5
7
8
IN36
IN45
IN78
76.8Ω 64.9Ω
1µF 100pF*
100pF
100k
107k 330pF
20Ω
7.5Ω
Q1
10nF
100V
47nF
100V
3.3k
L4
100µH
10µF
10V
8.2Ω
PTVS58VP1UTP
47nF
100V
L1
8.2µH
22µF
16V
(×2)
100µF
16V
16HVA100M
L1: COILCRAFT, XAL-1010-822ME
L2: WÜRTH, 744314650
L4: COILCRAFT, DO1608C-104
C5, 100µF, 6.3V, TDK C3225X5R0J107M
C7: 2.2µF, 100V, MURATA GRM32ER72A225KA35L
C8: 100µF, 16V, SUNCON 16HVA100M
T1: PCA EPC3577G-LF
T2: WÜRTH, 749022016
Q1: PSMN040-100MSE
Q2-Q9: PSMN075-100MSE
TO MICROPROCESSOROPTO
FMMT723 820pF 100pF
+VOUT
+VOUT
7.5V
CMHZ5236B
5.1k
FMMT624
FMMT624
5.1k
100pF
BAV19WS
Typical applicaTions
90W LTPoE++ Power Supply in Forward Mode with 12V, 7A Output
LOAD CURRENT (A)
0.7
76
EFFICIENCY (%)
94
92
90
88
86
84
82
80
78
96
2.82.1 4.2 4.9 5.6 6.33.5 7.01.4
4276 TA05a
VPORT = 41V
VPORT = 50V
VPORT = 57V
LOAD CURRENT (A)
0.7
11.5
VOUT (V)
12.4
12.3
12.2
12.1
12.0
11.9
11.8
11.7
11.6
12.5
2.82.11.4 4.2 4.9 5.6 6.33.5 7.0
4276 TA05b
VPORT = 41V
VPORT = 50V
VPORT = 57V
CSFST (µF) tSFST (ms)
0.10 1.5
0.33 4.9
1.0 15
3.3 48
LT4276 20 L7ELUEN2
LT4276
20
4276fa
For more information www.linear.com/LT4276
Typical applicaTions
38.7W LTPoE++ Power Supply in Flyback Mode with 5V, 7A Output
+
VOUT
5V AT 7A
–VOUT
Q1
L1: COILCRAFT, DO1813P-181HC
L2: COILCRAFT, DO1608C-103
L4: COILCRAFT, DO1608C-104
C2, C3: 47µF, 6.3V, GRM31CR60J476ME19L
C5: 47µF, 6.3V, PANASONIC 6SVP47M
C7: 2.2µF, 100V, MURATA GRM32ER72A225KA35L
T1: WÜRTH, 750314783 OR PCA EPC3586G
Q1-Q9: PSMN075-100MSE
T2: PCA EPA4271GE OR PULSE PE-68386NLL2
10µH L1
180nH
L4
100µH
10µF
100V
10nF
100V
47nF
100V
3.3k
24V
8.2Ω
10µF
10V
HSSRC
SWVCC FB31
PG
SG
T2P
ITHBROSCSFSTFFSDLYRCLASS++
GND
VPORT
LT4276A
HSGATE
ISEN+
ISEN
VIN VCC
C7
2.2µF
BSZ900N20
NS3G
BAT54WS
BAT46WS
TO MICROPROCESSOR
4276 TA06
PSMN2R4-30MLD
MMBT3906 MMBT3904
T1
1nF
1µF
5.90k
2.00kΩ
80Ω
1/4W
5.1Ω
1/4W
40mΩ
1/4W
15Ω
100Ω
20Ω
1µF
220pF
0.1µF
107k7.50k
RLDCMP
51k35.7Ω
PTVS58VP1UTP 3.3nF
2.2nF
2KV
20k
10k
2.2nF
C2, C3
47µF||47µF C5
47µF
100pF
100V
47µF
100V
2.2nF
2kV
OPTO
BG36
LT4321
BG12TG12 TG36
TG78TG45BG45 BG78
OUTP
OUTN
EN
EN
IN12
T2
Q2 Q3
Q4 Q5
Q6 Q7
Q8 Q9
1
DATA
PAIRS
SPARE
PAIRS
2
3
6
4
5
7
8
IN36
IN45
IN78
BAV19WS
FMMT723
Efficiency vs Load Current
Output Regulation
vs Load Current
LOAD CURRENT (A)
0.5
78
EFFICIENCY (%)
92
90
88
86
84
82
80
94
4.03.5 5.0 5.5 6.0 6.54.5 7.03.02.52.01.51.0
4276 TA06a
VPORT = 50V
VPORT = 57V
LOAD CURRENT (A)
0.5
4.80
VOUT (V)
5.15
5.10
5.05
5.00
4.95
4.90
4.85
5.20
4.03.5 5.0 5.5 6.0 6.54.5 7.03.02.52.01.51.0
4276 TA06b
VPORT = 50V
VPORT = 57V
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LT4276
21
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For more information www.linear.com/LT4276
Typical applicaTions
25.5W (Type 2) PoE+ and 9V-57V Auxiliary Input Power Supply in Flyback Mode with 12V, 1.9A Output
Efficiency vs Load Current
Output Regulation
vs Load Current
+
VOUT
12V AT 1.9A
–VOUT
Q1
L1: COILCRAFT, DO1813P-561ML
L2: WÜRTH, 7443330820
L3: MURATA, LQM31PN2R2M00L
L4: COILCRAFT, DO1813H-223
C2, C3: 10µF, 16V, MURATA GRM31CR61C106KA88
C5: 33µF, 20V, KEMET, T494V336M020AS
C7, C8: 3.3µF, 100V, TDK C3225X7S2A335M
T1: PCA EPC3601G OR WÜRTH 750315422
Q1: PSMN075-100MSE
Q1-Q9:PSMN075-100MSE
T2: PCA EPA4271GE OR PULSE PE-68386NL
L2
8.2µH
L3
2.2µH
1µF
680µF
63V
L1
560nH
L4
22µH
10µF
100V
68nF
100V
0.1µF
3.3k 158k
931k
24V
47nF
100V
8.2Ω
22µF
10V
PMEG10010ELR
HSSRC
SWVCC FB31
PG
SG
T2P
ITHBROSCSFSTFFSDLYRCLASSGND
VPORT
AUX
LT4276B
HSGATE
ISEN+
ISEN
VIN VCC
C7, C8
3.3µF
FDMC86160
BAT54WS
BAT46WS
TO MICROPROCESSOR
4276 TA08
BSZ900NF20NS3
CMLT7820G CMLT3820G
T1
220pF
1µF
4.75k
2.00k
62Ω
1/4W
82Ω||82Ω
1/4W
15mΩ
1/4W
15Ω
100Ω
1µF
220pF
0.1µF
107k9.31k
RLDCMP
51k35.7Ω
PTVS58VP1UTP
4.7nF
2.2nF
2KV
43k
10k
2.2nF
C2, C3
10µF||10µF C5
33µF
100pF
100V
47nF
100V
2.2nF
2kV
OPTO
BG36
LT4321
BG12TG12 TG36
TG78TG45BG45 BG78
OUTP
OUTN
EN
EN
IN12
TG2
TG1 OUTP
OUTN
IN1
IN2
BG2
BG1
T2
Q2 Q3
Q4 Q5
Q6 Q7
Q8 Q9
1
DATA
PAIRS
SPARE
PAIRS
2
3
6
4
5
7
8
IN36
IN45
IN78
LT4320
BSZ110N06NS3 x4
MMSD4148 x3
VAUX
9V TO 57VDC
OR 24VAC
+
FMMT723
LOAD CURRENT (A)
0.2
70
EFFICIENCY (%)
92
90
88
86
84
82
80
78
76
74
72
94
1.2 1.6 1.81.4 2.01.00.80.60.4
4276 TA08a
VAUX = 57V
VAUX = 42.5V
VAUX = 24V
VAUX = 9V
LOAD CURRENT (A)
0.2
11.5
VOUT (V)
12.4
12.3
12.2
12.1
12.0
11.9
11.8
11.7
11.6
12.5
1.2 1.6 1.81.4 2.01.00.80.60.4
4276 TA08b
VAUX = 57V
VAUX = 42.5V
VAUX = 24V
VAUX = 9V
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LT4276
22
4276fa
For more information www.linear.com/LT4276
Typical applicaTions
25.5W (Type 2) PoE+ Power Supply in Flyback Mode with 3.3V, 6.8A Output
Efficiency vs Load Current
Output Regulation
vs Load Current
+VOUT
3.3V AT 6.8A
–VOUT
Q1
L1: COILCRAFT, DO1813P-181HC
L2: COILCRAFT, DO1608C-103
L4: COILCRAFT, DO1608C-104
C2, C3: 22µF, 6.3V, MURATA GRM31CR70J226KE19
C5: 68µF, 4V, 4SVPA68MAA
C7: 2.2µF, 100V, MURATA GRM32ER72A225KA35
T1: WÜRTH, 750310743 OR PCA EPC3408G
Q1-Q9: PSMN075-100MSE
T2: PCA EPA4271GE OR PULSE PE-68386NLL2
10µH L1
180nH
L4
100µH
10µF
100V
10nF
100V
47nF
100V
3.3k
24V
8.2Ω
10µF
10V
HSSRC
SWVCC FB31
PG
SG
T2P
ITHBROSCSFSTFFSDLYRCLASSGND
VPORT
LT4276B
HSGATE
ISEN+
ISEN
VIN VCC
C7
2.2µF
BSZ900N20NS3
BAT54WS
BAT46WS
TO MICROPROCESSOR
4276 TA09
PSMN2R4-30MLD
MMBT3906 MMBT3904
T1
1nF
47Ω
1µF
6.49k
2k
100Ω
1/4W
5.1Ω
1/4W
40mΩ
1/4W
15Ω
100Ω
1µF
470pF
0.1µF
107k6.81k35.7Ω
PTVS58VP1UTP 4.7nF
2.2nF
2KV
8.25k
10k
2.2nF
C2, C3
22µF||22µF C5
68µF
100pF
100V
47nF
100V
2.2nF
2kV
OPTO
BG36
LT4321
BG12TG12 TG36
TG78TG45BG45 BG78
OUTP
OUTN
EN
EN
IN12
T2
Q2 Q3
Q4 Q5
Q6 Q7
Q8 Q9
1
DATA
PAIRS
SPARE
PAIRS
2
3
6
4
5
7
8
IN36
IN45
IN78
B0540WS
BAV19WS
20Ω
FMMT723
LOAD CURRENT (A)
0.7
72
EFFICIENCY (%)
90
88
86
84
82
80
78
76
74
92
4.2 5.6 6.34.9 7.03.52.82.11.4
4276 TA09a
VPORT = 57V
VPORT = 50V
VPORT = 42.5V
LOAD CURRENT (A)
0.7
3.1
VOUT (V)
3.5
3.4
3.3
3.2
3.6
4.2 5.6 6.34.9 7.03.52.82.11.4
4276 TA09b
VPORT = 57V
VPORT = 50V
VPORT = 42.5V
LT42 76 L7HEJWEGR 23
LT4276
23
4276fa
For more information www.linear.com/LT4276
Typical applicaTions
25.5W (Type 2) PoE+ Power Supply in Flyback Mode with 24V, 1A Output
Efficiency vs Load Current VOUT vs Load Current
+
VOUT
24V AT 1A
–VOUT
Q1
L2: COILCRAFT, DO1608C-103
L4: COILCRAFT, DO1608C-104
C2: 4.7µF, 50V, MURATA GRM31CR71H475M012
C5: 22µF, 35V, PANASONIC EEH-ZA1V220R
C7: 2.2µF, 100V, MURATA GRM32ER72A225KA35
T1: WÜRTH, 750314782 OR PCA EPC3603G
Q1-Q9: PSMN075-100MSE
T2: PCA EPA4271GE OR PULSE PE-68386NL
L2
10µH
L4
100µH
10µF
100V
10nF
100V
3.3k
24V
8.2Ω
10µF
10V
HSSRC
SWVCC FB31
PG
SG
T2P
ITHBROSCSFSTFFSDLYRCLASSGND
VPORT
LT4276B
HSGATE
ISEN+
ISEN
VIN VCC
C7
2.2µF
BSZ520N15NS3G
BAT54WS
BAT46WS
TO MICROPROCESSOR
4276 TA10
BSZ12DN20NS3
MMBT3906 MMBT3904
T1
150pF
0.1µF
6.49k
2.00kΩ
20Ω
100Ω
1/4W
120Ω||120Ω
1/4W
40mΩ
1/4W
15Ω
100Ω
1µF
10pF
0.47µF
107k5.23k
RLDCMP
24k35.7Ω
PTVS58VP1UTP 3.3nF
2.2nF
2KV
160k
10k
2.2nF
C2, C3
4.7µF
50V
C5
22µF
47pF
100V
47nF
100V
2.2nF
2kV
OPTO
BG36
LT4321
BG12TG12 TG36
TG78TG45BG45 BG78
OUTP
OUTN
EN
EN
IN12
T2
Q2 Q3
Q4 Q5
Q6 Q7
Q8 Q9
1
DATA
PAIRS
SPARE
PAIRS
2
3
6
4
5
7
8
IN36
IN45
IN78
47nF
100V
BAV19WS
FMMT723
LOAD CURRENT (A)
0.1
74
EFFICIENCY (%)
92
90
88
86
84
82
80
78
76
94
0.6 0.8 0.90.7 1.00.50.40.30.2
4276 TA10a
VPORT = 57V
VPORT = 50V
VPORT = 42.5V
LOAD CURRENT (A)
0.1
23.0
VOUT (V)
24.6
24.4
24.8
24.2
24.0
23.8
23.6
23.4
23.2
25.0
0.6 0.8 0.90.7 1.00.50.40.30.2
4276 TA10b
VPORT = 57V
VPORT = 50V
VPORT = 42.5V
LT4276 rHBBflBfiBH? ‘ \ i4§¥ \ 7 L 7 7 \ 7 4‘7 E? E: :3 l3] Eu :2: fl SECS: / , 7 a m H 7 7 33:53: ‘7H L O IJWQQQ 24
LT4276
24
4276fa
For more information www.linear.com/LT4276
package DescripTion
Please refer to http://www.linear.com/product/LT4276#packaging for the most recent package drawings.
4.00 ±0.10
(2 SIDES)
2.50 REF
5.00 ±0.10
(2 SIDES)
NOTE:
1. DRAWING PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220 VARIATION (WXXX-X).
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
PIN 1
TOP MARK
(NOTE 6)
0.40 ±0.10
27 28
1
2
BOTTOM VIEW—EXPOSED PAD
3.50 REF
0.75 ±0.05 R = 0.115
TYP
R = 0.05
TYP
PIN 1 NOTCH
R = 0.20 OR 0.35
× 45° CHAMFER
0.25 ±0.05
0.50 BSC
0.200 REF
0.00 – 0.05
(UFD28) QFN 0506 REV B
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
0.70 ±0.05
0.25 ±0.05
0.50 BSC
2.50 REF
3.50 REF
4.10 ±0.05
5.50 ±0.05
2.65 ±0.05
3.10 ±0.05
4.50 ±0.05
PACKAGE OUTLINE
2.65 ±0.10
3.65 ±0.10
3.65 ±0.05
UFD Package
28-Lead Plastic QFN (4mm × 5mm)
(Reference LTC DWG # 05-08-1712 Rev B)
LT42 76 L7Hߤ0g 25
LT4276
25
4276fa
For more information www.linear.com/LT4276
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
revision hisTory
REV DATE DESCRIPTION PAGE NUMBER
A 12/15 Changed diode type of diode between SWVCC and VCC from Schottky to regular (BAV19WS) on all applicable
schematics.
Added additional conditions to VAUXT and IAUXH parameters.
Revised graph: PG Delay Time vs Temperature in Flyback Mode.
Added T2 transformer part number recommendation to all flyback schematics.
Updated parts list for 25.5W (12V/1.9A) flyback schematic.
1, 10, 16-20,
22, 23
3
5
16, 17, 19-23, 26
21
LT4276 26 L7ELUEN2
LT4276
26
4276fa
For more information www.linear.com/LT4276
LINEAR TECHNOLOGY CORPORATION 2015
LT 1215 REV A • PRINTED IN USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507 www.linear.com/LT4276
relaTeD parTs
Typical applicaTion
PART NUMBER DESCRIPTION COMMENTS
LTC4267/
LTC4267-1/
LTC4267-3
IEEE 802.3af PD Interface With Integrated
Switching Regulator Internal 100V, 400mA Switch, Programmable Class, 200/300kHz Constant Frequency
PWM
LTC4269-1 IEEE 802.3af PD Interface With Integrated
Flyback Switching Regulator 2-Event Classification, Programmable Class, Synchronous No-Opto Flyback Controller,
50kHz to 250kHz, Aux Support
LTC4269-2 IEEE 802.3af PD Interface With Integrated
Forward Switching Regulator 2-Event Classification, Programmable Class, Synchronous Forward Controller, 100kHz to
500kHz, Aux Support
LT4275A/B/C LTPoE++/PoE+/PoE PD Controller External Switch, LTPoE++ Support
LTC4278 IEEE 802.3af PD Interface With Integrated
Flyback Switching Regulator 2-Event Classification, Programmable Class, Synchronous No-Opto Flyback Controller,
50kHz to 250kHz, 12V Aux Support
LTC4290/LTC4271 8-Port PoE/PoE+/LTPoE++ PSE Controller Transformer Isolation, Supports IEEE 802.3af, IEEE 802.3at and LTPoE++ PDs
LT4320/LT4320-1 Ideal Diode Bridge Controller 9V-72V ,DC to 600Hz Input. Controls 4-NMOSFETs, Voltage Rectification without Diode Drops
LT4321 PoE Ideal Diode Bridge Controller Controls 8-NMOSFETs for IEEE-required PD Voltage Rectification without Diode Drops
25.5W (Type 2) PoE+ Power Supply in Flyback Mode with 12V, 1.9A Output
Efficiency vs Load Current Output Regulation vs Load Current
+
V
OUT
12V AT 1.9A
–V
OUT
Q1
C5: 22µF, 16V, PANASONIC 16SVP22M
C7: 2.2µF, 100V, MURATA GRM32ER72A225KA35
T1: WÜRTH, 750310742 OR PCA EPC3410G
Q1-Q9: PSMN075-100MSE
T2: PCA EPA4271GE OR PULSE PE-68386NL
L2
10µH L1
180nH
L4
100µH
10µF
100V
10nF
100V
3.3k
24V
8.2Ω
10µF
10V
HSSRC
SWVCC FB31
PG
SG
T2P
ITHBROSCSFSTFFSDLYRCLASSGND
VPORT
LT4276B
HSGATE
ISEN+
ISEN
V
IN
V
CC
C7
2.2µF
BSZ520N15NS3G
BAT54WS
BAT46WS
MOC207M
V
OUT
TO MICROPROCESSOR
4276 TA11
FDMC86160
MMBT3906 MMBT3904
T1
470pF
1µF
6.49k
2.00kΩ
150V
1/4W
13Ω
1/4W
40mΩ
1/4W
15Ω
100Ω
1µF
220pF
0.1µF
107k5.23k35.7Ω
PTVS58VP1UTP 3.3nF
2.2nF
2KV
26.1k
10k
2.2nF
C2
10µF C5
22µF
47pF
630V
47nF
100V
2.2nF
2kV
BG36
LT4321
BG12TG12 TG36
TG78TG45BG45 BG78
OUTP
OUTN
EN
EN
IN12
T2
Q2 Q3
Q4 Q5
Q6 Q7
Q8 Q9
1
DATA
PAIRS
SPARE
PAIRS
2
3
6
4
5
7
8
IN36
IN45
IN78
47nF
100V
L1: COILCRAFT, DO1813P-181HC
L2: COILCRAFT, DO1608C-103
L4: COILCRAFT, DO1608C-104
C2: 10µF, 16V, MURATA GRM31CR61C106KA88
BAV19WS
10k
47k
20Ω
FMMT723
LOAD CURRENT (A)
0.2
70
EFFICIENCY (%)
90
88
86
84
82
80
78
76
74
72
92
1.2 1.6 1.81.4 2.01.00.80.60.4
4276 TA11a
VPORT = 57V
VPORT = 50V
VPORT = 42.5V
LOAD CURRENT (A)
0.2
11.5
VOUT (V)
12.3
12.2
12.1
12.0
11.9
11.8
11.7
11.6
12.5
12.4
1.2 1.6 1.81.4 2.01.00.80.60.4
4276 TA11b
VPORT = 57V
VPORT = 50V
VPORT = 42.5V

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