VISHAY. ® RoHS sown-m ww 'shaycom/doc 99912 DwodesAmencas©wshay£om DwodesAswa©wshay£om DwodesEuvogemushauom www.v\shay.CUm/doc?91000
VS-P400 Series
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Revision: 27-Jul-2018 1Document Number: 93755
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Power Modules,
Passivated Assembled Circuit Elements, 40 A
FEATURES
Glass passivated junctions for greater reliability
Electrically isolated base plate
Available up to 1200 VRRM/VDRM
High dynamic characteristics
Wide choice of circuit configurations
Simplified mechanical design and assembly
UL E78996 approved
Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
DESCRIPTION
The VS-P400 series of integrated power circuits consists of
power thyristors and power diodes configured in a single
package. With its isolating base plate, mechanical designs
are greatly simplified giving advantages of cost reduction
and reduced size.
Applications include power supplies, control circuits and
battery chargers.
ELECTRICAL SPECIFICATIONS
PRIMARY CHARACTERISTICS
IO40 A
Type Modules - thyristor, standard
Package PACE-PAK (D-19)
PACE-PAK (D-19)
MAJOR RATINGS AND CHARACTERISTICS
SYMBOL CHARACTERISTICS VALUES UNITS
IO80 °C 40 A
ITSM,
IFSM
50 Hz 385 A
60 Hz 400
I2t50 Hz 745 A2s
60 Hz 680
I2t7450 A2s
VRRM Range 400 to 1200 V
VISOL 2500 V
TJ-40 to +125 °C
TStg
VOLTAGE RATINGS
TYPE NUMBER
VRRM/VDRM, MAXIMUM
REPETITIVE PEAK REVERSE AND
PEAK OFF-STATE VOLTAGE
V
VRSM, MAXIMUM
NON-REPETITIVE PEAK
REVERSE VOLTAGE
V
IRRM MAXIMUM
AT TJ MAXIMUM
mA
VS-P401, VS-P421, VS-P431 400 500
10
VS-P402, VS-P422, VS-P432 600 700
VS-P403, VS-P423, VS-P433 800 900
VS-P404, VS-P424, VS-P434 1000 1100
VS-P405, VS-P425, VS-P435 1200 1300
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VS-P400 Series
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Revision: 27-Jul-2018 2Document Number: 93755
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ON-STATE CONDUCTION
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum DC output current
at case temperature IOFull bridge circuits 40 A
80 °C
Maximum peak, one-cycle
non-repetitive on-state or
forward current
ITSM,
IFSM
t = 10 ms No voltage
reapplied
Sinusoidal half wave,
initial TJ = TJ maximum
385
A
t = 8.3 ms 400
t = 10 ms 100 % VRRM
reapplied
325
t = 8.3 ms 340
Maximum I2t for fusing I2t
t = 10 ms No voltage
reapplied
745
A2s
t = 8.3 ms 680
t = 10 ms 100 % VRRM
reapplied
530
t = 8.3 ms 480
Maximum I2t for fusing I2tt = 0.1 ms to 10 ms, no voltage reapplied
I2t for time tx = I2t · tx 7450 A2s
Low level value of threshold voltage VT(TO)1 (16.7 % x x IT(AV) < I < x IT(AV)), TJ = TJ maximum 0.83 V
High level value of threshold voltage VT(TO)2 (I > x IT(AV)), TJ = TJ maximum 1.03
Low level value of on-state slope resistance rt1 (16.7 % x x IT(AV) < I < x IT(AV)), TJ = TJ maximum 9.61 m
High level value of on-state slope resistance rt2 (I > x IT(AV)), TJ = TJ maximum 7.01
Maximum on-state voltage drop VTM ITM = x IT(AV) TJ = 25 °C 1.4 V
Maximum forward voltage drop VFM IFM = x IF(AV) TJ = 25 °C 1.4 V
Maximum non-repetitive rate of rise of
turned-on current dI/dt TJ = 125 °C from 0.67 VDRM
ITM = x IT(AV), Ig = 500 mA, tr < 0.5 μs, tp > 6 μs 200 A/μs
Maximum holding current IHTJ = 25 °C anode supply = 6 V, resistive load 130 mA
Maximum latching current IL250
BLOCKING
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum critical rate of rise of
off-state voltage dV/dt TJ = 125 °C, exponential to 0.67 VDRM gate open 200 V/μs
Maximum peak reverse and off-state
leakage current at VRRM, VDRM
IRRM,
IDRM TJ = 125 °C, gate open circuit 10 mA
Maximum peak reverse leakage current IRRM TJ = 25 °C 100 μA
RMS isolation voltage VISOL 50 Hz, circuit to base, all terminals shorted,
TJ = 25 °C, t = 1 s 2500 V
TRIGGERING
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum peak gate power PGM 8W
Maximum average gate power PG(AV) 2
Maximum peak gate current IGM 2A
Maximum peak negative gate voltage -VGM 10 V
Maximum gate voltage required to trigger VGT
TJ = - 40 °C
Anode supply =
6 V resistive load
3
VTJ = 25 °C 2
TJ = 125 °C 1
Maximum gate current required to trigger IGT
TJ = - 40 °C 90
mATJ = 25 °C 60
TJ = 125 °C 35
Maximum gate voltage that will not trigger VGD TJ = 125 °C, rated VDRM applied 0.2 V
Maximum gate current that will not trigger IGD 2mA
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VS-P400 Series
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Revision: 27-Jul-2018 3Document Number: 93755
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Note
(1) A mounting compound is recommended and the torque should be checked after a period of 3 hours to allow for the spread of the compound
Fig. 1 - Current Ratings Nomogram (1 Module Per Heatsink)
Fig. 2 - On-State Power Loss Characteristics Fig. 3 - On-State Power Loss Characteristics
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum junction operating
and storage temperature range TJ, TStg -40 to +125 °C
Maximum thermal resistance,
junction to case per junction RthJC DC operation 1.05
K/W
Maximum thermal resistance,
case to heatsink RthCS Mounting surface, smooth and greased 0.10
Mounting torque, base to heatsink (1) 4Nm
Approximate weight 58 g
2.0 oz.
Case style PACE-PAK (D-19)
Maximum Total Power Loss (W)
Total Output Current (A)
5 10152025 4030 35
0
0
120
100
80
60
40
20 TJ = 125 °C
180°
(sine)
~
+
-
93755_01a
Maximum Total Power Loss (W)
Maximum Allowable
Ambient Temperature (°C)
25 7550 100 125
0
120
100
80
60
40
20
0
93755_01b
R
thSA
= 0.7 K/W - ΔR
1 K/W
2 K/W
3 K/W
5 K/W
1.5 K/W
10 K/W
Maximum Average On-State
Power Loss (W)
Average On-State Current (A)
10 200155
30
25
20
15
10
5
0
93755_02
Ø
Conduction angle
RMS limit
TJ = 125 °C
Per junction
180°
120°
90°
60°
30°
Maximum Average On-State
Power Loss (W)
Average On-State Current (A)
20 3503010 15 255
40
25
20
35
30
15
10
5
0
93755_03
RMS limit
TJ = 125 °C
Per junction
Conduction period
Ø
DC
180°
120°
90°
60°
30°
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VS-P400 Series
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Revision: 27-Jul-2018 4Document Number: 93755
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Fig. 4 - Current Ratings Characteristics
Fig. 5 - On-State Voltage Drop Characteristics
Fig. 6 - Maximum Non-Repetitive Surge Current
Fig. 7 - Maximum Non-Repetitive Surge Current
Fig. 8 - Thermal Impedance ZthJC Characteristics
Maximum Allowable Case
Temperature (°C)
Total Output Current (A)
10 20 30 405152535
45
0
70
80
90
100
110
120
130
Fully turned-on
180°
(Rect.)
180°
(Sine)
Per module
93755_04
Instantaneous On-State Current (A)
Instantaneous On-State Voltage (V)
0.5 1.0 2.0 3.01.5 2.5 3.5 4.0 4.5 5.0
1
100
10
1000
93755_05
TJ = 125 °C
TJ = 25 °C
Per junction
Peak Half Sine Wave
On-State Current (A)
Number of Equal Amplitude Half
Cycle Current Pulses (N)
10 1001
150
175
200
300
250
325
275
225
350
93755_06
Per junction
At any rated load condition and with
rated VRRM applied following surge.
Initial TJ = 125 °C
at 60 Hz 0.0083 s
at 50 Hz 0.0100 s
Peak Half Sine Wave
On-State Current (A)
Pulse Train Duration (s)
0.1 10.01
150
200
250
300
350
400
93755_07
Maximum non-repetitive surge current
versus pulse train duration. Control of
conduction may not be maintained.
Initial TJ = 125 °C
No voltage reapplied
Rated VRRM reapplied
Per junction
0.01
0.1
1
10
0.0001 0.001 0.01 0.1 1
Square Wave Pulse Duration (s)
ZthJC - Transient Thermal
Impedance (K/W)
93755_08
Steady state value
RthJC = 1.05 K/W
(DC operation)
Per junction
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VS-P400 Series
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Revision: 27-Jul-2018 5Document Number: 93755
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Fig. 9 - Gate Characteristics
ORDERING INFORMATION TABLE
0.1
1
10
100
0.001
93755_09 Instantaneous Gate Current (A)
Instantaneous Gate Voltage (V)
0.01 0.1 1 10 100
(1) (2) (3) (4)
(1) PGM = 10 W, tp = 5 ms
(2) PGM = 20 W, tp = 25 ms
(3) PGM = 50 W, tp = 1 ms
(4) PGM = 100 W, tp = 500 μs
Frequency limited by PG(AV)
(b)
(a)
TJ = 25 °C
TJ = 125 °C
TJ = 40 °C
VGD
IGD
Rectangular gate pulse
(a) Recommended load line for
rated dI/dt: 10 V, 20 Ω, tr ≤ 1 μs
(b) Recommended load line for
rated dI/dt: 10 V, 65 Ω, tr ≤ 1 μs
1-Vishay Semiconductors product
2- Module type
6- K = optional voltage suppression
7- W = optional freewheeling diode
4- Circuit configuration
- Voltage code
1 = 400 V
2 = 600 V
3 = 800 V
4 = 1000 V
5 = 1200 V
5
- Current rating
1 = 25 A DC (P100 series)
4 = 40 A DC (P400 series)
0 = single phase, hybrid bridge common cathode
2 = single phase, hybrid bridge doubler connection
3 = single phase, all SCR bridge
3
Device code
1 32 4 5 6 7
VS- 4P02KW
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VS-P400 Series
www.vishay.com Vishay Semiconductors
Revision: 27-Jul-2018 6Document Number: 93755
For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Note
(1) To complete code refer to Voltage Ratings table, i.e.: for 600 V P40.W complete code is P402W
CIRCUIT CONFIGURATION
CIRCUIT DESCRIPTION
CIRCUIT
CONFIGURATION
CODE
SCHEMATIC DIAGRAM TERMINAL POSITIONS
Single phase, hybrid bridge
common cathode 0
Single phase, hybrid bridge
doubler connection 2
Single phase, all SCR bridge 3
CODING (1)
CIRCUIT DESCRIPTION
CIRCUIT
CONFIGURATION
CODE
BASIC
SERIES
WITH VOLTAGE
SUPPRESSION
WITH
FREEWHEELING
DIODE
WITH BOTH
VOLTAGE SUPPRESSION
AND FREEWHEELING
DIODE
Single phase, hybrid bridge
common cathode 0 P40. P40.K P40.W P40.KW
Single phase, hybrid bridge
doubler connection 2 P42. P42.K - -
Single phase, all SCR bridge 3 P43. P43.K - -
LINKS TO RELATED DOCUMENTS
Dimensions www.vishay.com/doc?95335
G1
AC2
AC1
G2
(-) (+)
AC1 G1-
AC2 G2+
G2G1
AC1
AC2
(-) (+)
AC1 G1-
AC2 G2+
AC2 G2-
AC1 G3
G1G4
+
Outline Dimensions VI SHAW V
Document Number: 95335 For technical questions, contact: indmodules@vishay.com www.vishay.com
Revision: 24-Jul-08 1
D-19 PACE-PAK
Outline Dimensions
Vishay Semiconductors
DIMENSIONS in millimeters (inches)
0.9 x 45°
(0.035 x 45°)
12.7 (0.50)
63.5 (2.50)
45 (1.77)
12.7 (0.50) Ø 1.65 (0.06)
Fast-on 6.35 x 0.8 (0.25 x 0.03)
4.6 (0.18)
2.5 (0.10)
MAX.
5.2 (0.20)
48.7 (1.91)
33.8 (1.33)
32.5 (1.28) MAX.
23.2 (0.91)
15.5 (0.61)
MAX.
25 (0.98) MAX.
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Revision: 08-Feb-17 1Document Number: 91000
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