ESD7381MUT5G Datasheet by ON Semiconductor

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© Semiconductor Components Industries, LLC, 2016
October, 2017 Rev. 7
1Publication Order Number:
ESD7381/D
ESD7381
ESD Protection Diode
MicroPackaged Diodes for ESD Protection
The ESD7381 is designed to protect voltage sensitive components
that require ultralow capacitance from ESD and transient voltage
events. Excellent clamping capability, low capacitance, low leakage,
and fast response time, make these parts ideal for ESD protection on
designs where board space is at a premium. Because of its low
capacitance, it is suited for use in high frequency designs such as
USB 2.0 high speed and antenna line applications.
Features
UltraLow Capacitance: 0.37 pF
Low Clamping Voltage
Small Body Outline Dimensions: 0.60 mm x 0.30 mm
Low Body Height: 0.3 mm
Standoff Voltage: 3.3 V
Low Leakage
Insertion Loss: 0.030 dBm
Response Time is < 1 ns
Low Dynamic Resistance < 1 W
IEC6100042 Level 4 ESD Protection
These Devices are PbFree, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
RF Signal ESD Protection
RF Switching, PA, and Antenna ESD Protection
Near Field Communications
MAXIMUM RATINGS
Rating Symbol Value Unit
IEC 6100042 (ESD) Contact
Air
±20
±20
kV
Total Power Dissipation on FR5 Board
(Note 1) @ TA = 25°C
Thermal Resistance, JunctiontoAmbient
°PD°
RqJA
250
400
mW
°C/W
Junction and Storage Temperature Range TJ, Tstg 40 to +125 °C
Lead Solder Temperature Maximum
(10 Second Duration)
TL260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. FR5 = 1.0 x 0.75 x 0.62 in.
See Application Note AND8308/D for further description of survivability specs.
Device Package Shipping
ORDERING INFORMATION
www.onsemi.com
For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
ESD7381MUT5G X3DFN2
(PbFree)
10000 / Tape &
Reel
X3DFN2
CASE 152AF
MARKING
DIAGRAM
1
Cathode
2
Anode
PIN 1
E = Specific Device Code
M = Date Code
EM
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ESD7381
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2
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise noted)
Symbol Parameter
IPP Maximum Reverse Peak Pulse Current
VCClamping Voltage @ IPP
VRWM Working Peak Reverse Voltage
IRMaximum Reverse Leakage Current @ VRWM
VBR Breakdown Voltage @ IT
ITTest Current
*See Application Note AND8308/D for detailed explanations of
datasheet parameters.
UniDirectional
IPP
IF
V
I
IR
IT
VRWM
VCVBR
VF
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified)
Parameter Symbol Conditions Min Typ Max Unit
Reverse Working Voltage VRWM 3.3 V
Breakdown Voltage (Note 2) VBR IT = 1 mA 5.0 V
Reverse Leakage Current IRVRWM = 3.3 V < 1.0 50 nA
Clamping Voltage (Note 3) VCIPP = 1 A 8.0 V
Clamping Voltage (Note 3) VCIPP = 3 A 10 V
ESD Clamping Voltage VCPer IEC6100042See Figures 1 and 2
Junction Capacitance CJVR = 0 V, f = 1 Mhz
VR = 0 V, f < 1 GHz
0.37
0.25
0.55
0.55
pF
Dynamic Resistance RDYN TLP Pulse 0.32 W
Insertion Loss f = 1 Mhz
f = 8.5 GHz
0.030
0.573
dB
2. Breakdown voltage is tested from pin 1 to 2 and pin 2 to 1.
3. Nonrepetitive current pulse at TA = 25°C, per IEC6100045 waveform.
Figure 1. ESD Clamping Voltage Screenshot
Positive 8 kV Contact per IEC6100042
Figure 2. ESD Clamping Voltage Screenshot
Negative 8 kV Contact per IEC6100042
CV 33 v
ESD7381
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3
Figure 3. IV Characteristics Figure 4. CV Characteristics
I1 (A)
V1 (V)
C (pF)
VBias (V)
1.E11
1.E10
1.E09
1.E08
1.E07
1.E06
1.E05
1.E04
1.E03
1.E02
10 1 2 3 4 5 67 0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
0 0.5 1 1.5 2 2.5 3 3.5 4
Figure 5. RF Insertion Loss Figure 6. Capacitance over Frequency
CAPACITANCE (pF)
FREQUENCY
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.E+00 5.E+08 1.E+09 2.E+09 2.E+09 3.E+09 3.E+09
89
3.3 V
0 V
dB
FREQUENCY (Hz)
10
9
8
7
6
5
4
3
2
1
1.E+06 1.E+07 1.E+08 1.E+09 1.E+10
0
1
35
30
25
20
15
10
5
0
02 1816141246810
Figure 7. Positive TLP IV Curve
CURRENT (A)
VOLTAGE (V)
35
0
Figure 8. Negative TLP IV Curve
CURRENT (A)
VOLTAGE (V)
30
25
20
15
10
5
0
2414121068
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ESD7381
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4
IEC 6100042 Spec.
Level
Test Volt-
age (kV)
First Peak
Current
(A)
Current at
30 ns (A)
Current at
60 ns (A)
1 2 7.5 4 2
2 4 15 8 4
3 6 22.5 12 6
4 8 30 16 8
Ipeak
90%
10%
IEC6100042 Waveform
100%
I @ 30 ns
I @ 60 ns
tP = 0.7 ns to 1 ns
Figure 9. IEC6100042 Spec
Figure 10. Diagram of ESD Test Setup
50 W
Cable
Device
Under
Test Oscilloscope
ESD Gun
50 W
ESD Voltage Clamping
For sensitive circuit elements it is important to limit the
voltage that an IC will be exposed to during an ESD event
to as low a voltage as possible. The ESD clamping voltage
is the voltage drop across the ESD protection diode during
an ESD event per the IEC6100042 waveform. Since the
IEC6100042 was written as a pass/fail spec for larger
systems such as cell phones or laptop computers it is not
clearly defined in the spec how to specify a clamping voltage
at the device level. ON Semiconductor has developed a way
to examine the entire voltage waveform across the ESD
protection diode over the time domain of an ESD pulse in the
form of an oscilloscope screenshot, which can be found on
the datasheets for all ESD protection diodes. For more
information on how ON Semiconductor creates these
screenshots and how to interpret them please refer to
AND8307/D.
Figure 11. 8 X 20 ms Pulse Waveform
100
90
80
70
60
50
40
30
20
10
0020406080
t, TIME (ms)
% OF PEAK PULSE CURRENT
tP
tr
PULSE WIDTH (tP) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 ms
PEAK VALUE IRSM @ 8 ms
HALF VALUE IRSM/2 @ 20 ms
MECHANICAL CASE OUTLINE on semiwnduflm" PACKAGE DIMENSIONS XSDFNZ, 0.62x0.32, 0.355P, (0201) % CASE 152AF ISSU E A SCALE 5:1 DATE 17 FEB 2015 NOTES @ I3 1 DIMENSIone AND TOLERANCING pan ASME w 5M. mm m 1 2 conomNG DIMENSION M‘LLIMETERS INDICATOR MILLIMETERS E A n 25 u 33 TOP VIEW M D 05 b n 22 0 25 D n 55 u 56 z n 25 u 36 e a :55 ESE L2 n W ‘ 023 _ 4i :4 A GENERIC Al MARKING DIAG HAM‘ g 52mm: SIDE VIEW PLANE PIN 1 E 2x b x e Specmc Device Code M e Dam Code 5 a; n as ® 0 A 51 RECOMMENDED EO‘I'I’OM VIEW MOUNTING FOOTPRINT“ 2x #7 0.747% 7 030 \ 17 7 7‘7 7 7 \ 2x 0.31 7H DwMENswoNs MILUMEIERS See Apphcafion Nola ANDsaga/D for move moummg demus 'For addimnal mformamn on our Pb-Free sllalegy and soldering detafls‘ meaee download me ON Semiconduclov Soldenng and Mounhng Techniques Reference Manuah SOLDERRM/D, ON Semeenduew and ere hademavks e4 Semxcanduclur eempenese lnduslnes. Lu: aha ON Semxcanduclar er us seesdenes m the Unwed Slates andJm mhev memes ON Semxcunduclar yesewes me .em to make enenges wxlhuul We. We to eny prawns necem ON eemmdee‘m makes m wenem. represemenen m guarantee regemmg the Meme e; W; meme m any pamcu‘av weese my deee ON eemeesdeew esseme eny Mammy ensue sum the eseneeuen e. use e. eny meme em. em specmcsl‘y dwsc‘axms any and an Mammy mew wxllmm hmma‘mn speee‘ eeneeeeeme‘ e. \nmdenla‘ damages ON Semxmnduclar dues me. eewey any ueenee under ms pee". nghls "er the fights ev emers
X3DFN2, 0.62x0.32, 0.355P, (0201)
CASE 152AF
ISSUE A
DATE 17 FEB 2015
SCALE 8:1
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
A B
E
D
BOTTOM VIEW
b
e
2X
L22X
TOP VIEW
2X
A
A1
0.05 C
0.05 C
CSEATING
PLANE
SIDE VIEW
DIM MIN MAX
MILLIMETERS
A0.25 0.33
A1 −−− 0.05
b0.22 0.28
e0.355 BSC
L2 0.17 0.23
MOUNTING FOOTPRINT*
DIMENSIONS: MILLIMETERS
0.74
1
0.30
0.31
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
2
1
GENERIC
MARKING DIAGRAM*
PIN 1
X = Specific Device Code
M = Date Code
XM
See Application Note AND8398/D for more mounting details
A
M
0.05 BC
A
M
0.05 BC
2X
2X
RECOMMENDED
PIN 1
INDICATOR
(OPTIONAL)
D0.58 0.66
E0.28 0.36
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
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X3DFN2, 0.62X0.32, 0.355P, (0201)
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