TLV2404IPWG4 Datasheet by Texas Instruments

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Supply Voltage Range. . . 2.5 V to 16 V Specified Temperature Range — TA 0°C to 70°C... Commercial Grade — TA = —40"C to 125°C . .. Industrial Grade Ultrasmall Packaging — 5-Pin SOT-23 (TLV2401) — a- in msop (TLV2402) Universal OpAmp EVM (Reler to the EVM Selection Guide SLOUOSO) description The TLV240>< famlly="" of="" slnglersupply="" operational="" amplifiers="" has="" the="" lowest="" supply="" current="" available="" today="" at="" only="" 880="" na="" perchannel.="" reverse="" battery="" protection="" guards="" the="" amplilier="" lrom="" an="" over="" current="" condltlon="" due="" to="" improper="" battery="" lnstallation.="" for="" harsh="" environments,="" the="" inputs="" can="" be="" taken="" 5="" v="" above="" the="" posltlve="" supply="" rall="" without="" damage="" to="" the="" device.="" icc="" asuwvy="" current!="" um.="" supply="" c="" v="" supplv="" it="" av="i" 12="" vln="Vccl2" uezwc="" 10="" as="" as="" no="" oz="" n="" n="" 2="" 4="" s="" a="" vac-supply="" the="" low="" supply="" current="" is="" coupled="" with="" extremely="" low="" input="" bias="" currents="" enabling="" them="" resistors="" making="" them="" ideal="" for="" portable,="" long="" active="" lile,="" appllcatlons.="" dc="" accuracy="" is="" e="" olfset="" voltage="" as="" low="" as="" 390="" w,="" cmrr="" of="" 120="" db="" and="" minimum="" open="" loop="" gain="" of="" 1="" the="" maxlmum="" recommended="" supply="" voltage="" is="" as="" high="" as="" 16="" v="" and="" ensured="" opera="" electrlcal="" characteristics="" specified="" at="" 2.7="" v,="" 5="" v="" and="" 15="" v.="" the="" 2.57v="" operation="" makes="" batteryrpowered="" systems="" and="" many="" microrpower="" microcontrollers="" available="" today="" ln="" all="" members="" are="" avallable="" ln="" pdip="" and="" soic="" with="" the="" singles="" ln="" the="" small="" sot723="" pac="" and="" quads="" in="" tssop.="" selection="" of="" single="" supplv="" operational="" amplifier="" productst="" v="" v="" bw="" slew="" rate="" i="" h="" ”9"“="" (3)5="" (r43)="" (mhz)="" (vius)="" €510="" “a'l'="" tlvz40x¥="" 2="" 54="" 6="" 0.390="" d="" 005="" 0="" 002="" 0.880="" tlv224x="" 2="" 54="" 2="" 0.600="" d="" 005="" 0="" 002="" 1="" tlv2211="" 2="" 74="" 0="" 0.450="" d="" 065="" 0="" 025="" 13="" tlv245x="" 27*6="" 0.020="" 0.22="" 0.110="" 23="" tlv225x="" 27*8="" 0.200="" 0.2="" 0.12="" 35="" tali="" speclllcahons="" are="" typical="" values="" measured="" at="" 5="" v,="" i="" this="" device="" also="" otters="" 157v="" reverse="" battery="" protection="" and="" 57v="" overriherrall="" operation="" on="" m="" {p="" texas="" instruments="" post="" office="" aox="" $55303="" -="" dallas="" texas="" 752s5="">
TLV2401, TLV2402, TLV2404
FAMILY OF 880-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION
SLOS244B – FEBRUARY 2000 – REVISED NOVEMBER 2000
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Micro-Power Operation ... < 1 µA/Channel
Input Common-Mode Range Exceeds the
Rails ... –0.1 V to VCC + 5 V
Reverse Battery Protection Up To 18 V
Rail-to-Rail Input/Output
Gain Bandwidth Product ... 5.5 kHz
Supply Voltage Range ... 2.5 V to 16 V
Specified Temperature Range
– TA = 0°C to 70°C... Commercial Grade
– TA = –40°C to 125°C... Industrial Grade
Ultrasmall Packaging
– 5-Pin SOT-23 (TLV2401)
– 8-Pin MSOP (TLV2402)
Universal OpAmp EVM (Refer to the EVM
Selection Guide SLOU060)
description
The TLV240x family of single-supply operational
amplifiers has the lowest supply current available
today at only 880 nA per channel. Reverse battery
protection guards the amplifier from an over-
current condition due to improper battery
installation. For harsh environments, the inputs
can be taken 5 V above the positive supply rail
without damage to the device.
The low supply current is coupled with extremely low input bias currents enabling them to be used with mega-
resistors making them ideal for portable, long active life, applications. DC accuracy is ensured with a low typical
offset voltage as low as 390 µV, CMRR of 120 dB and minimum open loop gain of 130 V/mV at 2.7 V.
The maximum recommended supply voltage is as high as 16 V and ensured operation down to 2.5 V, with
electrical characteristics specified at 2.7 V, 5 V and 15 V. The 2.5-V operation makes it compatible with Li-Ion
battery-powered systems and many micro-power microcontrollers available today including TI’s MSP430.
All members are available in PDIP and SOIC with the singles in the small SOT-23 package, duals in the MSOP,
and quads in TSSOP.
SELECTION OF SINGLE SUPPLY OPERATIONAL AMPLIFIER PRODUCTS
DEVICE VCC
(V) VIO
(mV) BW
(MHz) SLEW RATE
(V/µs) ICC/ch
(µA) RAIL-TO-RAIL
TLV240x2.5–16 0.390 0.005 0.002 0.880 I/O
TLV224x 2.5–12 0.600 0.005 0.002 1 I/O
TLV2211 2.7–10 0.450 0.065 0.025 13 O
TLV245x 2.7–6 0.020 0.22 0.110 23 I/O
TLV225x 2.7–8 0.200 0.2 0.12 35 O
All specifications are typical values measured at 5 V.
This device also offers 18-V reverse battery protection and 5-V over-the-rail operation on the inputs.
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
0246810121416
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
VCC – Supply Voltage – V
CC
I Supply Current – A/Chµ
AV = 1
VIN = VCC / 2
TA = 25 °C
Operational Amplifier
+
Copyright 2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
TLV2404 AVAILABLE OPTIONS PACKAGED DEVICES Vlomax T AT 2“ SMALL OUTLINE PLASTIC DIP TSSOP (D) (N) (PW) ‘500 v TLVZADACD TLVZAOACN TLV24EMCPW ” TLV2404|D TLv2404IN TLV2404|PW taped and reeIed To order ms packagmg apnon, add an R suflIx Io me pan R) TLV240x PACKAGE PINOUTS I: :I Vcc NCEE I0 3 ID NO IN—EI: 2 7 j] VCC I: IN+EE 31 Le II OUT 4 5 GND D: IN+ :37 4:| IN— 1OUTEl: TLV2401 D on P PACKAGE (TOP VIEW) TLV2404 D, N, 0R PW PACKAGE (TOP VIEW) END 1 MIMOUT 1IN—EI: fifita 334W- 1IN+EE 12 334”“ VCCEI: 4 H :EIGND 2|N+D: 5 1DI|ZISIN+ 2IN—I:E e}% 9 EM. ZOUT El: 7 NC 7 N0 Interna‘ connecmn E :El SOUT WOUTD: TLV2402 In, DGK. on P PACK (TOP VIEW) 10 a 1IN—EI: a 7 1|N+EE E5 4 5 6mm: |:||:||:||:| *9 TEXAS INSTRUMENTS 2 POST OFFICE on $55303 ' DALLAS IEXAS 75285
TLV2401, TLV2402, TLV2404
FAMILY OF 880-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION
SLOS244B – FEBRUARY 2000 – REVISED NOVEMBER 2000
2POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TLV2401 AVAILABLE OPTIONS
V max
PACKAGED DEVICES
TA
V
IOmax
AT 25°CSMALL OUTLINE
(D) SOT-23
(DBV) SYMBOLS PLASTIC DIP
(P)
0°C to 70°C
1500 µV
TLV2401CD TLV2401CDBV VAWC
-40°C to 125°C
1500
µ
V
TLV2401ID TLV2401IDBV VAWI TLV2401IP
This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g.,
TLV2401CDR).
TLV2402 AVAILABLE OPTIONS
V max
PACKAGED DEVICES
TA
V
IOmax
AT 25°CSMALL OUTLINE
(D) MSOP
(DGK) SYMBOLS PLASTIC DIP
(P)
0°C to 70°C
1500 µV
TLV2402CD TLV2402CDGK xxTIAIX
–40°C to 125°C
1500
µ
V
TLV2402ID TLV2402IDGK xxTIAIY TLV2402IP
This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g.,
TLV2402CDR).
TLV2404 AVAILABLE OPTIONS
V max
PACKAGED DEVICES
TA
V
IOmax
AT 25°CSMALL OUTLINE
(D) PLASTIC DIP
(N) TSSOP
(PW)
0°C to 70°C
1500 µV
TLV2404CD TLV2404CN TLV2404CPW
–40°C to 125°C
1500
µ
V
TLV2404ID TLV2404IN TLV2404IPW
This package is available taped and reeled. To order this packaging option, add an R suffix to the part
number (e.g., TLV2404CDR).
TLV240x PACKAGE PINOUTS
3
2
4
5
(TOP VIEW)
1
OUT
GND
IN+
VCC
IN
TLV2401
DBV PACKAGE
NC – No internal connection
1
2
3
4
8
7
6
5
NC
IN
IN+
GND
NC
VCC
OUT
NC
TLV2401
D OR P PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
1OUT
1IN
1IN+
GND
VCC
2OUT
2IN
2IN+
TLV2402
D, DGK, OR P PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1OUT
1IN
1IN+
VCC
2IN+
2IN
2OUT
4OUT
4IN
4IN+
GND
3IN+
3IN
3OUT
(TOP VIEW)
TLV2404
D, N, OR PW PACKAGE
PACKAGE 5340 Spr1“ voltage v“ V‘CR Operanng free alHemperal-m T- ” TEXAS INSTRUMENTS
TLV2401, TLV2402, TLV2404
FAMILY OF 880-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION
SLOS244B – FEBRUARY 2000 – REVISED NOVEMBER 2000
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) 17 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Differential input voltage range, VID ±20 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input current range, II (any input) ±10 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output current range, IO ±10 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, TA: C suffix 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I suffix 40°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum junction temperature, TJ 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values, except differential voltages, are with respect to GND
DISSIPATION RATING TABLE
PACKAGE
Θ
JC
Θ
JA
T
A
25°C T
A
= 125°C
PACKAGE
JC
(°C/W)
JA
(°C/W)
A
POWER RATING
A
POWER RATING
D (8) 38.3 176 710 mW 142 mW
D (14) 26.9 122.6 1022 mW 204.4 mW
DBV (5) 55 324.1 385 mW 77.1 mW
DGK (8) 54.2 259.9 481 mW 96.2 mW
N (14) 32 78 1600 mW 320.5 mW
P (8) 41 104 1200 mW 240.4 mW
PW (14) 29.3 173.6 720 mW 144 mW
recommended operating conditions
MIN MAX UNIT
Su
pp
ly voltage VCC
Single supply 2.5 16
V
S
u
ppl
y v
oltage
,
V
CC Split supply ±1.25 ±8
V
Common-mode input voltage range, VICR –0.1 VCC+5 V
O
p
erating free air tem
p
erature TA
C-suffix 0 70 °
C
Operating
free
-
air
temperat
u
re
,
T
AI-suffix –40 125
°C
v‘ - mp- 1 oflsel voflage aV‘O CMRR Commnnrmode rejection rauo V'M:|5V V—W’27V, VM :iV, RL:500kQ v‘-:5v, v~ :3V,HL:sookn :15V V‘ :SV RL:500kQ *9 TEXAS INSTRUMENTS Fun range Fun range
TLV2401, TLV2402, TLV2404
FAMILY OF 880-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION
SLOS244B – FEBRUARY 2000 – REVISED NOVEMBER 2000
4POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics at recommended operating conditions, VCC = 2.7, 5 V, and 15 V (unless
otherwise noted)
dc performance
PARAMETER TEST CONDITIONS TAMIN TYP MAX UNIT
VIO
p
VO
=
VCC/2 V,
25°C 390 1200
µV
V
IO
u
v
VO
=
VCC/2
V
,
VIC = VCC/2 V, Full range 1500 µ
V
αVIO Offset voltage draft RS = 50 25°C 3 µV/°C
VCC =27V
25°C 63 120
V
CC =
2
.
7
V
Full range 60
CMRR
V
IC
= 0 to V
CC
,
VCC =5V
25°C 70 120
dB
CMRR
-
IC CC,
RS = 50
V
CC =
5
V
Full range 63
dB
VCC =15V
25°C 80 120
V
CC =
15
V
Full range 75
VCC =27V V
O( ) =1V R
L= 500 k
25°C 130 400
V
CC =
2
.
7
V
,
V
O(pp) =
1
V
,
R
L =
500
k
Full range 30
AVD
Large-signal differential voltage
VCC =5V V
O( ) =3V R
L= 500 k
25°C 300 1000
V/mV
A
VD
amplification
V
CC =
5
V
,
V
O(pp) =
3
V
,
R
L =
500
k
Full range 100
V/mV
VCC =15V V
O( ) =6V R
L= 500 k
25°C 1000 1800
V
CC =
15
V
,
V
O(pp) =
6
V
,
R
L =
500
k
Full range 120
Full range is 0°C to 70°C for the C suffix and –40°C to 125°C for the I suffix. If not specified, full range is –40°C to 125°C.
input characteristics
PARAMETER TEST CONDITIONS TAMIN TYP MAX UNIT
25°C 25 250
IIO Input offset current TLV240xC
Full range
300 pA
VO = VCC/2 V,
VIC VCC/2 V
TLV240xI
F
u
ll
range
400
V
IC =
V
CC
/2
V
,
R
S
=
50
25°C 100 300
IIB Input bias current
RS
=
50
TLV240xC
Full range
350 pA
TLV240xI
F
u
ll
range
900
ri(d) Differential input resistance 25°C 300 M
Ci(c) Common-mode input capacitance f = 100 kHz 25°C 3 pF
Full range is 0°C to 70°C for the C suffix and –40°C to 125°C for the I suffix. If not specified, full range is –40°C to 125°C.
VA, Hrgh \eve? output "anage Suppl" currem {per channel) P‘ “‘ “I ‘ej“tr“ 'atl‘ Woo/Avie) vfi-:5v vA—:15v vfi~27v vfi-:5v v~:15v vM:v«/2 11:2pA vex/A42 <~l:50pa v0="" v—~~:27vor5v="" va:va-/2="" v~:1sv="" vcc="" :="" 2,710="" 5="" v="" fwo="" range="" vcc="" {p="" texas="" instruments="">
TLV2401, TLV2402, TLV2404
FAMILY OF 880-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION
SLOS244B – FEBRUARY 2000 – REVISED NOVEMBER 2000
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics at recommended operating conditions, VCC = 2.7, 5 V, and 15 V (unless
otherwise noted) (continued)
output characteristics
PARAMETER TEST CONDITIONS TAMIN TYP MAX UNIT
VCC =27V
25°C 2.65 2.68
V
CC =
2
.
7
V
Full range 2.63
V
IC
= V
CC
/2,
VCC =5V
25°C 4.95 4.98
IC CC ,
IOH = –2 µA
V
CC =
5
V
Full range 4.93
VCC =15V
25°C 14.95 14.98
VOH
High level out
p
ut voltage
V
CC =
15
V
Full range 14.93
V
V
OH
High
-
le
v
el
o
u
tp
u
t
v
oltage
VCC =27V
25°C 2.62 2.65
V
V
CC =
2
.
7
V
Full range 2.6
V
IC
= V
CC
/2,
VCC =5V
25°C 4.92 4.95
IC CC ,
IOH = –50 µA
V
CC =
5
V
Full range 4.9
VCC =15V
25°C 14.92 14.95
V
CC =
15
V
Full range 14.9
VIC =V
CC/2 IOL =2µA
25°C 90 150
VOL
Low level out
p
ut voltage
V
IC =
V
CC
/2
,
I
OL =
2
µ
A
Full range 180
mV
V
OL
Lo
w-
le
v
el
o
u
tp
u
t
v
oltage
VIC =V
CC/2 IOL =50µA
25°C 180 230
mV
V
IC =
V
CC
/2
,
I
OL =
50
µ
A
Full range 260
IOOutput current VO = 0.5 V from rail 25°C±200 µA
Full range is 0°C to 70°C for the C suffix and –40°C to 125°C for the I suffix. If not specified, full range is –40°C to 125°C.
power supply
PARAMETER TEST CONDITIONS TAMIN TYP MAX UNIT
VCC =27Vor5V
25°C 880 950
ICC
Su
pp
ly current (
p
er channel)
VO=V
CC/2
V
CC =
2
.
7
V
or
5
V
Full range 1290
nA
I
CC
S
u
ppl
y
c
u
rrent
(per
channel)
V
O =
V
CC
/2
VCC =15V
25°C 900 990
nA
V
CC =
15
V
Full range 1350
Reverse supply current VCC = –18 V, VIN = 0 V,
VO = Open circuit 25°C 50 nA
VCC
=
2.7 to 5 V,
25°C 100 120
dB
Power supply rejection ratio
VCC
=
2
.
7
to
5
V
,
VIC = VCC/2 V, TLV240xC
Full range
96
dB
PSRR
P
ower supp
l
y re
j
ec
ti
on ra
ti
o
(VCC/VIO)
No load, TLV240xI
F
u
ll
range
85 dB
(VCC/VIO)
VCC = 5 to 15 V, VIC = VCC/2 V, 25°C 100 120
dB
CC IC CC
No load Full range 100
dB
Full range is 0°C to 70°C for the C suffix and –40°C to 125°C for the I suffix. If not specified, full range is –40°C to 125°C.
L V0 L RL: 500 km CL: mo pF Semmg ume WSTEPJPP =1v cL= mo F Equr'a‘em mput noise "ohage *9 TEXAS INSTRUMENTS
TLV2401, TLV2402, TLV2404
FAMILY OF 880-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION
SLOS244B – FEBRUARY 2000 – REVISED NOVEMBER 2000
6POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics at recommended operating conditions, VCC = 2.7, 5 V, and 15 V (unless
otherwise noted) (continued)
dynamic performance
PARAMETER TEST CONDITIONS TAMIN TYP MAX UNIT
UGBW Unity gain bandwidth RL = 500 k, CL = 100 pF 25°C 5.5 kHz
SR Slew rate at unity gain VO(pp) = 0.8 V, RL = 500 k, CL = 100 pF 25°C 2.5 V/ms
φMPhase margin
RL= 500 kCL= 100
p
F
25
°
C
60°
Gain margin
R
L =
500
k
,
C
L =
100
pF
25°C
15 dB
t
Settling time
VCC = 2.7 or 5 V,
V(STEP)PP = 1 V, CL = 100 pF,
AV = –1, RL = 100 k0.1%
25
°
C
1.84
ms
t
s
Settling
time
VCC = 15 V,
V(STEP)PP =1V C
L= 100
p
F
0.1%
25°C
6.1
ms
V(STEP)PP
=
1
V
,
CL
=
100
F
,
AV = –1, RL = 100 k0.01% 32
noise/distortion performance
PARAMETER TEST CONDITIONS TAMIN TYP MAX UNIT
V
Equivalent in
p
ut noise voltage
f = 10 Hz 800
nV/Hz
V
n
Eq
u
i
v
alent
inp
u
t
noise
v
oltage
f = 100 Hz 25°C500 n
V/H
z
InEquivalent input noise current f = 100 Hz 8 fA/Hz
Inp‘ '1 Bias Current Inp‘ -2 Oflset 0 went *5 TEXAS INSTRUMENTS
TLV2401, TLV2402, TLV2404
FAMILY OF 880-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION
SLOS244B – FEBRUARY 2000 – REVISED NOVEMBER 2000
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
VIO Input Offset Voltage vs Common-mode input voltage 1, 2, 3
IIB
In
p
ut Bias Current
vs Free-air temperature 4, 6, 8
I
IB
Inp
u
t
Bias
C
u
rrent
vs Common-mode input voltage 5, 7, 9
IIO
In
p
ut Offset Current
vs Free-air temperature 4, 6, 8
I
IO
Inp
u
t
Offset
C
u
rrent
vs Common-mode input voltage 5, 7, 9
CMRR Common-mode rejection ratio vs Frequency 10
VOH High-level output voltage vs High-level output current 11, 13, 15
VOL Low-level output voltage vs Low-level output current 12, 14, 16
VO(PP) Output voltage peak-to-peak vs Frequency 17
ZoOutput impedance vs Frequency 18
ICC Supply current vs Supply voltage 19
PSRR Power supply rejection ratio vs Frequency 20
AVD Differential voltage gain vs Frequency 21
Phase vs Frequency 21
Gain-bandwidth product vs Supply voltage 22
SR Slew rate vs Free-air temperature 23
φmPhase margin vs Capacitive load 24
Gain margin vs Capacitive load 25
Supply current vs Reverse voltage 26
Voltage noise over a 10 Second Period 27
Large signal follower pulse response 28, 29, 30
Small signal follower pulse response 31
Large signal inverting pulse response 32, 33, 34
Small signal inverting pulse response 35
Crosstalk vs Frequency 36
p057 OFFICE aox 5553133 - DALLAS IEXAS 75255 wun mo mu mun 300 a a n .'. mun .I. 200 5 E 9 sun 9 400 mn g sun g u E Ann g4” 4““ T 200 T 4m 2 97300 > n > 1 73m) 7200 400 Ann 4nu2naeomnuomn22a2eo2g mama‘s 22 2s 34 an as 52 2a 42 s4 as ms mu ‘5 v.” . Gunman-Mode “w mug. . v vICR _ common-Made Inpul Vallnge . v Figure1 Figure2 Figurea Mm sen 350 5m 300 250 Mm 200 300 ‘50 200 um 50 mo 0 0 750 00 4 400 “E _ 7200 450 7200 4072540 5 2a 35 5a 55 ac 95‘10‘25 43‘ 02 as m u m 22 2529 «W254: 5 2a 35 5a 65 an 95 Hmz u . a...“ ngpemllue _ °c v.CR . Common um Input Van-gs _ v Figurea Figures Figures 700 250 sun 2% sun ‘50 am mm 300 5a 200 0 mm D 750 4m am I _ 7150 7200 In 7150 4H06t016 22 2a so on as 52 4072540 5 2a 35 55 as. an 95mm 2a 42 s4 as ms mu ‘5 v.CR _ Common Made lnpm Valmge . v u . mew. Temper-lure . “c Figure7 Figurea Figures 8
TLV2401, TLV2402, TLV2404
FAMILY OF 880-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION
SLOS244B – FEBRUARY 2000 – REVISED NOVEMBER 2000
8POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 1
–200
0
200
400
600
800
1000
1200
1400
–0.20 0.20 0.60 1.00 1.40 1.80 2.20 2.60
INPUT OFFSET VOLTAGE
vs
COMMON-MODE INPUT
VOLTAGE
VCC = 2.7 V
TA = 25°C
VICR – Common-Mode Input Voltage – V
VIO – Input Offset Voltage – V
µ
2.9–0.1
Figure 2
–400
–300
–200
–100
0
100
–0.2 0.4 1.0 1.6 2.2 2.8 3.4 4.0 4.6 5.2
INPUT OFFSET VOLTAGE
vs
COMMON-MODE INPUT
VOLTAGE
VCC = 5 V
TA = 25 °C
VICR – Common-Mode Input Voltage – V
VIO – Input Offset Voltage – V
µ
–0.1
Figure 3
–400
–300
–200
–100
0
100
200
300
400
–0.2 2.0 4.2 6.4 8.6 10.8 13.0 15.2
INPUT OFFSET VOLTAGE
vs
COMMON-MODE INPUT
VOLTAGE
VICR – Common-Mode Input Voltage –V
VIO – Input Offset Voltage – V
µ
VCC = 15 V
TA = 25 °C
–0.1
Figure 4
–200
–100
0
100
200
300
400
500
600
–40 –25 –10 5 20 35 50 65 80 95 110 125
VCC = 2.7 V
VIC = 1.35 V
TA – Free-Air Temperature – °C
IIO
IIB
INPUT BIAS / OFFSET CURRENT
vs
FREE-AIR TEMPERATURE
IIB/IIO – Input Bias / Offset Current – pA
Figure 5
–150
–100
–50
0
50
100
150
200
250
300
350
400
–0.2 0.2 0.6 1.0 1.4 1.8 2.2 2.6 2.9
INPUT BIAS / OFFSET CURRENT
vs
COMMON MODE INPUT
VOLTAGE
VICR – Common Mode Input Voltage – V
VCC = 2.7 V
TA = 25 °C
IIB/IIO – Input Bias / Offset Current – pA
IIO
IIB
–0.1
Figure 6
–200
–100
0
100
200
300
400
500
600
–40 –25 –10 5 20 35 50 65 80 95 110 125
VCC = 5 V
VIC = 2.5 V
TA – Free-Air Temperature – °C
IIO
IIB
INPUT BIAS / OFFSET CURRENT
vs
FREE-AIR TEMPERATURE
IIB/IIO – Input Bias / Offset Current – pA
Figure 7
–150
–100
–50
0
50
100
150
200
–0.2 0.4 1.0 1.6 2.2 2.8 3.4 4.0 4.6 5.2
INPUT BIAS / OFFSET CURRENT
vs
COMMON-MODE INPUT
VOLTAGE
VICR – Common Mode Input Voltage – V
VCC = 5 V
TA = 25 °C
IIO
IIB
IIB/IIO – Input Bias / Offset Current – pA
–0.1
Figure 8
–200
–100
0
100
200
300
400
500
600
700
–40 –25 –10 5 20 35 50 65 80 95 110 125
VCC = 15 V
VIC = 7.5 V
TA – Free-Air Temperature – °C
IIO
IIB
INPUT BIAS / OFFSET CURRENT
vs
FREE-AIR TEMPERATURE
IIB/IIO – Input Bias / Offset Current – pA
Figure 9
–150
–100
–50
0
50
100
150
200
250
–0.2 2.0 4.2 6.4 8.6 10.8 13.0 15.2
INPUT BIAS / OFFSET CURRENT
vs
COMMON-MODE INPUT
VOLTAGE
VICR – Common-Mode Input Voltage –V
VCC = 15 V
TA = 25 °C
IIO
IIB
IIB/IIO – Input Bias / Offset Current – pA
–0.1
CMRR A nommwme neieciiori mm A as 40 2n n i ii mu 1k wk i-anuency-Hz Figure 1D 5 0 °C 4 5 4 n 3 5 3 n n 50 mn isn mu i0M . H giiieiei ouipui cunenl . m Figure 1: LOW—LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT isu ‘ >I vcc, 5v 3 i25 E e > W . E mu 7 ii, we 5 TA face 2 075 TA=25'C 3 TA 70'C 3 T =125°C § asu " 3 i 3 025 > u 0 50 um use 200 IOL . Law-Level Ompul Cunem . in Figure16 a 5n um isa 2n Figure 11 i5n i5n > \ i \ i. i25 g in ; inn 5 2 575 MB , a TA 70°C g m mum 7 m5 A 025 ,o \A n is i n 55 inc i5n m n 50 inn en 20 i0L . Law-Level Oulpul Cunenl . m Figure 14 Figure 15 20 _ cumin Impedance _ n v arm A ampuivonaae PeaKAIoJ’eaK in ma Vk i. Frequency _ Hz i. Fiegue Figure l7 Figur *5 TEXAS INSTRUMENTS p057 OFFICE Fax 555303 - DALLAS TEXAS 75285
TLV2401, TLV2402, TLV2404
FAMILY OF 880-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION
SLOS244B – FEBRUARY 2000 – REVISED NOVEMBER 2000
9
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 10
0
20
40
60
80
100
120
COMMON-MODE REJECTION RATIO
vs
FREQUENCY
f – Frequency – Hz
1 10 100 1k 10k
CMRR – Common-Mode Rejection Ratio – dB
VCC=2.7, 5, 15 V
RF=100 k
RI=1 k
Figure 11
1.2
1.5
1.8
2.1
2.4
2.7
0 50 100 150 200
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
TA = –40°C
IOH – High-Level Output Current – µA
VOH – High-Level Output Voltage – V
VCC = 2.7 V
TA = –0°C
TA = 25 °C
TA = 70 °C
TA = 125 °C
Figure 12
0
0.25
0.50
0.75
1.00
1.25
1.50
0 50 100 150 200
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
IOL – Low-Level Output Current – µA
VCC = 2.7 V
TA = 25 °C
TA = 0 °C
TA = –40°C
OL
V – Low-Level Output Voltage – V
TA = 70 °C
TA = 125 °C
Figure 13
3.0
3.5
4.0
4.5
5.0
0 50 100 150 200
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
IOH – High-Level Output Current – µA
VOH – High-Level Output Voltage – V
VCC = 5 V TA = –40°C
TA = –0°C
TA = 25 °C
TA = 70 °C
TA = 125 °C
Figure 14
0
0.25
0.50
0.75
1.00
1.25
1.50
0 50 100 150 200
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
IOL – Low-Level Output Current – µA
VCC = 5 V
TA = 0 °C
TA = –40°C
OL
V Low-Level Output Voltage – V
TA = 25 °C
TA = 70 °C
TA = 125 °C
Figure 15
13
13.5
14.0
14.5
15.0
0 50 100 150 200
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
IOH – High-Level Output Current – µA
VOH – High-Level Output Voltage – V
VCC = 15 V
TA = –40°C
TA = –0°C
TA = 25 °C
TA = 70 °C
TA = 125 °C
Figure 16
0
0.25
0.50
0.75
1.00
1.25
1.50
0 50 100 150 200
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
IOL – Low-Level Output Current – µA
OL
V Low-Level Output Voltage – V
TA = –40°C
VCC = 15 V
TA = –0°C
TA = 25 °C
TA = 70 °C
TA = 125 °C
Figure 17
–2
0
2
4
6
8
10
12
14
16
10 100 1k
OUTPUT VOLTAGE
PEAK-TO-PEAK
vs
FREQUENCY
f – Frequency – Hz
– Output voltage Peak–to–Peak – V
VO(PP)
RL = 100 k
CL = 100 pF
TA = 25°C
VCC = 5 V
VCC = 15 V
VCC = 2.7 V
Figure 18
OUTPUT IMPEDANCE
vs
FREQUENCY
f – Frequency – Hz
100 1k 10k
– Output Impedance –Zo
10k
100
10
1k
AV = 10
VCC = 2.7, 5, & 15 V
TA = 25°C
AV = 1
Avg 4 Dmevermal Voltage Gain 44:: icc Asunnly curreme in SR _ Slew rim _ w m; 14 12 m as as 04 02 AV i w cc2 2 4 s a m 12 Vac-Suppiyvniuge-V Figureie 50 ‘0 H30 u l-quuency—Hz Figure 21 35 an v =515V 25 cc 2n i5 in SR7 n5 n 14 Vcc=275115v is is ea 45 4 10k 4072540 5 20 35 5a s5 so 95 iini25 1A-Free. Figure 23 Temper-lure _ Dc 5 muse: 5 *9 TEXAS INSTRUMENTS i2n HO um 90 an 70 so so 40 Figure 20 a 25 An 55 70 as innu5iani45ie Figure 22 Figure 24 p057 OFFICE aox $55303 - DALLAS IEXAS 752s5
TLV2401, TLV2402, TLV2404
FAMILY OF 880-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION
SLOS244B – FEBRUARY 2000 – REVISED NOVEMBER 2000
10 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 19
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
0 2 4 6 8 10121416
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
VCC – Supply Voltage – V
CC
I Supply Current – A/Chµ
AV = 1
VIN = VCC / 2
TA = 125°C
TA = 70 °C
TA = 25 °C
TA = 0 °C
TA = –40°C
Figure 20
40
50
60
70
80
90
100
110
120
10 100 1k 10k
POWER SUPPLY REJECTION RATIO
vs
FREQUENCY
f – Frequency – Hz
VCC = 2.7, 5, & 15 V
TA = 25°C
PSRR – Power Supply Rejection Ratio – dB
Figure 21
DIFFERENTIAL VOLTAGE GAIN AND PHASE
vs
FREQUENCY
f – Frequency – Hz
10 100 1k 10k
– Differential Voltage Gain – dB
10
0
–20
–10
30
20
40
50
0
–45
45
90
Phase – °
VCC = 2.7, 5, & 15 V
RL = 500 k
CL = 100 pF
TA = 25°C
AVD
60 135
Figure 22
0
1
2
3
4
5
6
7
2.5 4.0 5.5 7.0 8.5 10.0 11.5 13.0 14.5 16.0
GAIN BANDWIDTH PRODUCT
vs
SUPPLY VOLTAGE
TA = 25°C
RL = 100 k
CL = 100 pF
f = 1 kHz
VCC – Supply Voltage –V
GBWP –Gain Bandwidth Product – kHz
Figure 23
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
–40 –25 –10 5 20 35 50 65 80 95 110 125
SLEW RATE
vs
FREE-AIR TEMPERATURE
VCC = 5, 15 V
TA – Free-Air Temperature – °C
SR+
SR–
VCC = 2.7 V
VCC = 2.7, 5, & 15 V
SR – Slew Rate – V/ ms
Figure 24
0
10
20
30
40
50
60
70
80
10 100 1k 10k
PHASE MARGIN
vs
CAPACITIVE LOAD
CL – Capacitive Load – pF
VCC = 2.7, 5, & 15 V
RL = 500 k
TA = 25°C
Phase Margin – °
mm Relened Vowaae muse 4 W 25 “mm 20 ‘ / m 5 u Figuve25 A vcczsv 3 r=mHzmmHz , I s-c 2 ‘ ‘ ‘ ‘ I I ‘ n 71 2 I 4 A 0‘23455759‘0 I-Yime-s Figure 27 Figure 23 *5 TEXAS INSTRUMENTS p057 OFFICE aox $553133 - DALLAS IEXAS 752s5
TLV2401, TLV2402, TLV2404
FAMILY OF 880-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION
SLOS244B – FEBRUARY 2000 – REVISED NOVEMBER 2000
11
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 25
0
5
10
15
20
25
10 100 1k 10k
GAIN MARGIN
vs
CAPACITIVE LOAD
CL – Capacitive Load – pF
RL= 500 k
TA = 25°C
Gain Margin – dB
VCC = 2.7 & 5 V
VCC = 15 V
Figure 26
VCC – Reverse Voltage – V
40
35
25
–18 –16 –14 –12 –10 –8 –6
I – Supply Current – nA
45
50
SUPPLY CURRENT
vs
REVERSE VOLTAGE
60
–4 –2 0
55
30
CC
20
15
10
5
0
TA = 25°C
Figure 27
t – Time – s
0
–1
–3
0123456
Input Referred Voltage Noise – V
1
2
VOLTAGE NOISE
OVER A 10 SECOND PERIOD
4
78910
3
–2
µ
–4
VCC = 5 V
f = 0.1 Hz to 10 Hz
TA = 25°C
Figure 28
–1
0
1
2
3
4
5
10123456
LARGE SIGNAL FOLLOWER
PULSE RESPONSE
VIN
t – Time – ms
VCC = 2.7 V
AV = 1
RL = 100 k
CL = 100 pF
TA = 25°C
–1
0
1
2
VIN– Input Voltage – V
VO
VO– Output Voltage – V
Figure 29
–1
0
1
2
3
4
5
6
7
8
10123456
LARGE SIGNAL FOLLOWER
PULSE RESPONSE
VIN
t – Time – ms
VCC = 5 V
AV = 1
RL = 100 k
CL = 100 pF
TA = 25°C
–1
0
3
4
VIN– Input Voltage – V
VO
2
1
VO– Output Voltage – V
Figure 30
–5
0
5
10
15
20
25
30
–2 0 2 4 6 8 10 12 14 16
LARGE SIGNAL FOLLOWER
PULSE RESPONSE
VIN
t – Time – ms
VCC = 15 V
AV = 1
RL = 100 k
CL = 100 pF
TA = 25°C
–5
0
10
15
VIN– Input Voltage – V
VO
5
VO– Output Voltage – V
was man ysun 931 V0 V0 n ‘ 2 3 a 5 s 7 n 5 m ‘5 20 25 30 35 hum“... h me—ms FigureCiCi Figureaa SMALL SIGNAL INVERTING PULSE RESPONSE 200 0 VIN > mu ’20 s > ‘ n E 40 o ‘ % an s w > a 5 > e D an as S s ‘ ‘ 4m: 400 420 45m 440 n 200 Mm sea son man man l-Hme-m: Figure 35 *9 TEXAS INSTRUMENTS 12 POST OFFICE EOX $55303 ' DALLAS IEXAS 7528
TLV2401, TLV2402, TLV2404
FAMILY OF 880-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION
SLOS244B – FEBRUARY 2000 – REVISED NOVEMBER 2000
12 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 31
–20
0
20
40
60
80
100
120
140
160
180
–50 0 50 100 150 200 250 300 350 400 450 500
SMALL SIGNAL FOLLOWER
PULSE RESPONSE
VIN
t – Time – µs
VCC = 2.7, 5,
& 15 V
AV = 1
RL = 100 k
CL = 100 pF
TA = 25°C
–150
150
300
VIN– Input Voltage – mV
VO
0
VO– Output Voltage – mV
–2
–1.5
–1.0
–0.5
0.0
0.5
1.0
1.5
2.0
101234567
Figure 32
LARGE SIGNAL INVERTING
PULSE RESPONSE
VIN
t – Time – ms
VCC = 2.7 V
AV = –1
RL = 100 k
CL = 100 pF
TA = 25°C
1
VIN– Input Voltage – V
VO
3
2
0
–1
VO– Output Voltage – V
–3.5
–3.0
–2.5
–2.0
–1.5
–1.0
–0.5
0.0
0.5
1.0
1.5
2.0
2.5
101234567
Figure 33
LARGE SIGNAL INVERTING
PULSE RESPONSE
VIN
t – Time – ms
VCC = 5 V
AV = –1
RL = 100 k
CL = 100 pF
TA = 25°C
2
VIN– Input Voltage – V
VO
4
3
0
–1
1
VO– Output Voltage – V
–12
–10
–8
–6
–4
–2
0
2
4
6
8
10
12
–5 0 5 10 15 20 25 30 35
Figure 34
LARGE SIGNAL INVERTING
PULSE RESPONSE
VIN
t – Time – ms
VCC = 15 V
AV = –1
RL = 100 k
CL = 100 pF
TA = 25°C
6
VIN– Input Voltage – V
VO
12
9
0
–3
3
VO– Output Voltage – V
Figure 35
–150
–100
–50
0
50
100
150
200
–200 0 200 400 600 800 1000 1200
SMALL SIGNAL INVERTING
PULSE RESPONSE
VIN
t – Time – ms
VCC = 2.7, 5,
& 15 V
AV = –1
RL = 100 k
CL = 100 pF
TA = 25°C
VIN– Input Voltage – mV
VO
0
–100
200
100
VO– Output Voltage – mV
–140
–120
–100
–80
–60
–40
–20
0
Figure 36
10 100 1k 10k
CROSSTALK
vs
FREQUENCY
f – Frequency –Hz
VCC = 2.7,
5, & 15 V
All Channels
RL = 100 k
CL = 100 pF
VIN = 1 VPP
Crosstalk –dB
VCC = 2.7, 5 V
VCC = 15 V
*5 TEXAS INSTRUMENTS
TLV2401, TLV2402, TLV2404
FAMILY OF 880-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION
SLOS244B – FEBRUARY 2000 – REVISED NOVEMBER 2000
13
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
reverse battery protection
The TLV2401/2/4 are protected against reverse battery voltage up to 18 V. When subjected to reverse battery
condition the supply current is typically less than 100 nA at 25°C (inputs grounded and outputs open). This
current is determined by the leakage of 6 Schottky diodes and will therefore increase as the ambient
temperature increases.
When subjected to reverse battery conditions and negative voltages applied to the inputs or outputs, the input
ESD structure will turn on—this current should be limited to less than 10 mA. If the inputs or outputs are referred
to ground, rather than midrail, no extra precautions need be taken.
common-mode input range
The TLV2401/2/4 has rail-to-rail input and outputs. For common-mode inputs from –0.1 V to VCC – 0.8 V a PNP
differential pair will provide the gain.
For inputs between VCC – 0.8 V and VCC, two NPN emitter followers buffering a second PNP differential pair
provide the gain. This special combination of NPN/PNP differential pair enables the inputs to be taken 5 V above
the rails, because as the inputs go above VCC, the NPNs switch from functioning as transistors to functioning
as diodes. This will lead to an increase in input bias current. The second PNP differential pair continues to
function normally as the inputs exceed VCC.
The TLV2401/2/4 has a negative common-input range that exceeds ground by 100 mV. If the inputs are taken
much below this, reduced open loop gain will be observed with the ultimate possibility of phase inversion.
offset voltage
The output offset voltage, (VOO) is the sum of the input offset voltage (VIO) and both input bias currents (IIB) times
the corresponding gains. The following schematic and formula can be used to calculate the output offset
voltage:
VOO VIO 1RF
RGIIB RS1RF
RGIIB– RF
+
VI
+
RG
RS
RF
IIB–
VO
IIB+
Figure 37. Output Offset Voltage Model
*9 TEXAS INSTRUMENTS 14 p057 OFFICE aox $553133 - u
TLV2401, TLV2402, TLV2404
FAMILY OF 880-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION
SLOS244B – FEBRUARY 2000 – REVISED NOVEMBER 2000
14 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
general configurations
When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often
required. The simplest way to accomplish this is to place an RC filter at the noninverting terminal of the amplifier
(see Figure 38).
VIVO
C1
+
RGRF
R1
f–3dB 1
2R1C1
VO
VI1RF
RG
1
1sR1C1
Figure 38. Single-Pole Low-Pass Filter
If even more attenuation is needed, a multiple pole filter is required. The Sallen-Key filter can be used for this
task. For best results, the amplifier should have a bandwidth that is 8 to 10 times the filter frequency bandwidth.
Failure to do this can result in phase shift of the amplifier.
VI
C2
R2R1
C1
RF
RG
R1 = R2 = R
C1 = C2 = C
Q = Peaking Factor
(Butterworth Q = 0.707)
(
=1
Q
2 – )
RGRF
_
+
f–3dB 1
2RC
Figure 39. 2-Pole Low-Pass Sallen-Key Filter
*5 TEXAS INSTRUMENTS
TLV2401, TLV2402, TLV2404
FAMILY OF 880-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION
SLOS244B – FEBRUARY 2000 – REVISED NOVEMBER 2000
15
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
circuit layout considerations
To achieve the levels of high performance of the TLV240x, follow proper printed-circuit board design techniques.
A general set of guidelines is given in the following.
Ground planes – It is highly recommended that a ground plane be used on the board to provide all
components with a low inductive ground connection. However, in the areas of the amplifier inputs and
output, the ground plane can be removed to minimize the stray capacitance.
Proper power supply decoupling – Use a 6.8-µF tantalum capacitor in parallel with a 0.1-µF ceramic
capacitor on each supply terminal. It may be possible to share the tantalum among several amplifiers
depending on the application, but a 0.1-µF ceramic capacitor should always be used on the supply terminal
of every amplifier. In addition, the 0.1-µF capacitor should be placed as close as possible to the supply
terminal. As this distance increases, the inductance in the connecting trace makes the capacitor less
effective. The designer should strive for distances of less than 0.1 inches between the device power
terminals and the ceramic capacitors.
Sockets – Sockets can be used but are not recommended. The additional lead inductance in the socket pins
will often lead to stability problems. Surface-mount packages soldered directly to the printed-circuit board
is the best implementation.
Short trace runs/compact part placements – Optimum high performance is achieved when stray series
inductance has been minimized. To realize this, the circuit layout should be made as compact as possible,
thereby minimizing the length of all trace runs. Particular attention should be paid to the inverting input of
the amplifier. Its length should be kept as short as possible. This will help to minimize stray capacitance at
the input of the amplifier.
Surface-mount passive components – Using surface-mount passive components is recommended for high
performance amplifier circuits for several reasons. First, because of the extremely low lead inductance of
surface-mount components, the problem with stray series inductance is greatly reduced. Second, the small
size of surface-mount components naturally leads to a more compact layout thereby minimizing both stray
inductance and capacitance. If leaded components are used, it is recommended that the lead lengths be
kept as short as possible.
\ LDIP‘Pack‘age‘ L“ = 1504: Low-K Test PCE e“ = mam/w J MSOP Package Low-K Test Pea so 1: Package eJA = mane/w 7 Law-K Tesl PCB \ 9n = ”BBC/W / \ \ \ \\ \ , SOT-2: Pac age \ \ Low-K T251 PCB \§\ a“ = awe/w ‘ *9 TEXAS INSTRUMENTS
TLV2401, TLV2402, TLV2404
FAMILY OF 880-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION
SLOS244B – FEBRUARY 2000 – REVISED NOVEMBER 2000
16 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
general power dissipation considerations
For a given θJA, the maximum power dissipation is shown in Figure 40 and is calculated by the following formula:
PD
TMAX–TA
JA
Where: PD= Maximum power dissipation of THS240x IC (watts)
TMAX= Absolute maximum junction temperature (150°C)
TA= Free-ambient air temperature (°C)
θJA = θJC + θCA
θJC = Thermal coefficient from junction to case
θCA = Thermal coefficient from case to ambient air (°C/W)
1
0.75
0.5
0
–55–40 –25 –10 5
Maximum Power Dissipation – W
1.25
1.5
MAXIMUM POWER DISSIPATION
vs
FREE-AIR TEMPERATURE
1.75
20 35 50
0.25
TA – Free-Air Temperature – °C
2
65 80 95 110 125
MSOP Package
Low-K Test PCB
θJA = 260°C/W
TJ = 150°C
PDIP Package
Low-K Test PCB
θJA = 104°C/W
SOIC Package
Low-K Test PCB
θJA = 176°C/W
SOT-23 Package
Low-K Test PCB
θJA = 324°C/W
NOTE A: Results are with no air flow and using JEDEC Standard Low-K test PCB.
Figure 40. Maximum Power Dissipation vs Free-Air Temperature
.subcH 24BX75V7X | 2 3 4 5 c1 (:2 see dc de d1p am an egnd 40 ga gcm wee mm hhm 922 11 6 10 5 54 90 92 4 99 7 6 0 10 0 90 11 12 6 1 2 7 99 53 5 91 90 «Hmombmomom 9,8944Er12 30300542 8,8738E712 dx p01y12)13‘0)14010,5 5 pub/15)“) vc ve v1p v1n 0 0140450 453 153 0150 70150 n 121 021654 109910 2155712 dc 5454054; dc 5&12 v1im 1K 130“ 14 qx2 1000053 *5 TEXAS INSTRUMENTS ml «:2 re! re2 ree ml r02 , 0% we we v1im v1p v1n .model .model .model .model .ends POST OFFICE aox 055303 - DALLAS. IEXAS 752s5 92 978 S1E3 97E S1E3 30 364E3 30 364E3 36670ES 1D 1D 1 4183E6 dc 0 dc 88315 dc 88315 dc 0 dc 540 dc 540 Dus=000.00543) Dus=00000543 Rs:
TLV2401, TLV2402, TLV2404
FAMILY OF 880-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION
SLOS244B – FEBRUARY 2000 – REVISED NOVEMBER 2000
17
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
macromodel information
Macromodel information provided was derived using Microsim
Parts
Release 8, the model generation
software used with Microsim
PSpice
. The Boyle macromodel (see Note 2) and subcircuit in Figure 41 are
generated using the TLV240x typical electrical and operating characteristics at TA = 25°C. Using this
information, output simulations of the following key parameters can be generated to a tolerance of 20% (in most
cases):
Maximum positive output voltage swing
Maximum negative output voltage swing
Slew rate
Quiescent power dissipation
Input bias current
Open-loop voltage amplification
Unity-gain frequency
Common-mode rejection ratio
Phase margin
DC output resistance
AC output resistance
Short-circuit output current limit
NOTE 2: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers”,
IEEE Journal
of Solid-State Circuits,
SC-9, 353 (1974).
.subckt 240X_5V–X 1 2 3 4 5
*
c1 11 12 9.8944E–12
c2 6 7 30.000E–12
cee 10 99 8.8738E–12
dc 5 53 dy
de 54 5 dy
dlp 90 91 dx
dln 92 90 dx
dp 43dx
egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5
fb 7 99 poly(5) vb vc ve vlp vln 0 61.404E6 –1E3 1E3 61E6 –61E6
ga 6 0 11 12 1.0216E–6
gcm 0 6 10 99 10.216E–12
iee 10 4 dc 54.540E–9
ioff 0 6 dc 5e–12
hlim 90 0 vlim 1K
q1 11 2 13 qx1
q2 12 1 14 qx2
r2 6 9 100.00E3
rc1 3 11 978.81E3
rc2 3 12 978.81E3
re1 13 10 30.364E3
re2 14 10 30.364E3
ree 10 99 3.6670E9
ro1 8 5 10
ro2 7 99 10
rp 3 4 1.4183E6
vb 9 0 dc 0
vc 3 53 dc .88315
ve 54 4 dc .88315
vlim 7 8 dc 0
vlp 91 0 dc 540
vln 0 92 dc 540
.model dx D(Is=800.00E–18)
.model dy D(Is=800.00E–18 Rs=1m Cjo=10p)
.model qx1 NPN(Is=800.00E–18 Bf=27.270E21)
.model qx2 NPN(Is=800.0000E–18 Bf=27.270E21)
.ends
13
rp
IN+
rc1 rc2 ree egnd fb ro2
ro1
vlim
VOUT
ga
ioffgcm
vb
c1
dc
iee
re2re1
dp
VCC–
VCC+
IN– q1 q2
cee
c2
ve de
dlp dln
vlnhlimvlp
14
10
4
2
111 12
3
53
54
96
8
5
7
91 90 92
vc
99
+
+
+
+
+
+
+
+
r2
Figure 41. Boyle Macromodels and Subcircuit
PSpice
and
Parts
are trademarks of MicroSim Corporation.
I TEXAS INSTRUMENTS Samples Samples Samples Samples Samples Samples Samples Samples Samples Sample: Sample: Samples Samples Samples Samples Samples Samples Samples Samples Samples
PACKAGE OPTION ADDENDUM
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Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TLV2401CD ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 2401C
TLV2401CDBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 VAWC
TLV2401CDBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 VAWC
TLV2401CDG4 ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 2401C
TLV2401CDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 2401C
TLV2401ID ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2401I
TLV2401IDBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 VAWI
TLV2401IDBVRG4 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 VAWI
TLV2401IDBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 VAWI
TLV2401IDBVTG4 ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 VAWI
TLV2401IDG4 ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2401I
TLV2401IDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2401I
TLV2401IP ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type -40 to 125 TLV2401I
TLV2402CD ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 2402C
TLV2402CDG4 ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 2402C
TLV2402CDGK ACTIVE VSSOP DGK 8 80 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 AIX
TLV2402CDGKR ACTIVE VSSOP DGK 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 AIX
TLV2402CDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 2402C
TLV2402ID ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2402I
TLV2402IDG4 ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2402I
I TEXAS INSTRUMENTS Samples Samples Samples Samples Samples Samples Samples Samples Sample: Sample: Samples Samples Samples Samples Samples Samples Samples
PACKAGE OPTION ADDENDUM
www.ti.com 10-Dec-2020
Addendum-Page 2
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TLV2402IDGK ACTIVE VSSOP DGK 8 80 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AIY
TLV2402IDGKR ACTIVE VSSOP DGK 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AIY
TLV2402IDGKRG4 ACTIVE VSSOP DGK 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AIY
TLV2402IDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2402I
TLV2402IDRG4 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2402I
TLV2402IP ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type -40 to 125 TLV2402I
TLV2404CD ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 TLV2404C
TLV2404CPW ACTIVE TSSOP PW 14 90 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 2404C
TLV2404CPWG4 ACTIVE TSSOP PW 14 90 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 2404C
TLV2404CPWR ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 2404C
TLV2404ID ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2404I
TLV2404IDR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2404I
TLV2404IDRG4 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2404I
TLV2404IN ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type -40 to 125 TLV2404IN
TLV2404IPW ACTIVE TSSOP PW 14 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2404I
TLV2404IPWR ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2404I
TLV2404IPWRG4 ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2404I
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
I TEXAS INSTRUMENTS
PACKAGE OPTION ADDENDUM
www.ti.com 10-Dec-2020
Addendum-Page 3
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TLV2401, TLV2402 :
Automotive: TLV2401-Q1, TLV2402-Q1
NOTE: Qualified Version Definitions:
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
I TEXAS INSTRUMENTS REEL DIMENSIONS TAPE DIMENSIONS Reel Dlameter Cavtty AD Dimension destgned to accommodate the component wmth Eu Dimension destgned to accommodate the componenl Iength K0 Dtmenston destgned to accommodate the component thickness 7 w Ovevau with at the earner tape i Pt PIlCh between successtve cavtty cemers f T ReelWidIh(W1) QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE C) O O O C) O O O ispmckeIHuIes —> User Dtrecllnn OI Feed \I/ Pockel Quadrams
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TLV2401CDBVR SOT-23 DBV 5 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
TLV2401CDBVR SOT-23 DBV 5 3000 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TLV2401CDBVT SOT-23 DBV 5 250 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TLV2401CDBVT SOT-23 DBV 5 250 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
TLV2401CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TLV2401IDBVR SOT-23 DBV 5 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
TLV2401IDBVR SOT-23 DBV 5 3000 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TLV2401IDBVT SOT-23 DBV 5 250 180.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TLV2401IDBVT SOT-23 DBV 5 250 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
TLV2401IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TLV2402CDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
TLV2402CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TLV2402IDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
TLV2402IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TLV2404CPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
TLV2404IDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TLV2404IPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 18-Nov-2020
Pack Materials-Page 1
I TEXAS INSTRUMENTS TAPE AND REEL BOX DIMENSIONS
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TLV2401CDBVR SOT-23 DBV 5 3000 182.0 182.0 20.0
TLV2401CDBVR SOT-23 DBV 5 3000 210.0 185.0 35.0
TLV2401CDBVT SOT-23 DBV 5 250 210.0 185.0 35.0
TLV2401CDBVT SOT-23 DBV 5 250 182.0 182.0 20.0
TLV2401CDR SOIC D 8 2500 340.5 338.1 20.6
TLV2401IDBVR SOT-23 DBV 5 3000 182.0 182.0 20.0
TLV2401IDBVR SOT-23 DBV 5 3000 210.0 185.0 35.0
TLV2401IDBVT SOT-23 DBV 5 250 210.0 185.0 35.0
TLV2401IDBVT SOT-23 DBV 5 250 182.0 182.0 20.0
TLV2401IDR SOIC D 8 2500 340.5 338.1 20.6
TLV2402CDGKR VSSOP DGK 8 2500 358.0 335.0 35.0
TLV2402CDR SOIC D 8 2500 340.5 338.1 20.6
TLV2402IDGKR VSSOP DGK 8 2500 358.0 335.0 35.0
TLV2402IDR SOIC D 8 2500 340.5 338.1 20.6
TLV2404CPWR TSSOP PW 14 2000 853.0 449.0 35.0
TLV2404IDR SOIC D 14 2500 350.0 350.0 43.0
TLV2404IPWR TSSOP PW 14 2000 853.0 449.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 18-Nov-2020
Pack Materials-Page 2
www.ti.com
PACKAGE OUTLINE
C
0.22
0.08 TYP
0.25
3.0
2.6
2X 0.95
1.9
1.45
0.90
0.15
0.00 TYP
5X 0.5
0.3
0.6
0.3 TYP
8
0 TYP
1.9
A
3.05
2.75
B
1.75
1.45
(1.1)
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
4214839/E 09/2019
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-178.
4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
0.2 C A B
1
34
5
2
INDEX AREA
PIN 1
GAGE PLANE
SEATING PLANE
0.1 C
SCALE 4.000
www.ti.com
EXAMPLE BOARD LAYOUT
0.07 MAX
ARROUND 0.07 MIN
ARROUND
5X (1.1)
5X (0.6)
(2.6)
(1.9)
2X (0.95)
(R0.05) TYP
4214839/E 09/2019
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
NOTES: (continued)
5. Publication IPC-7351 may have alternate designs.
6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
PKG
1
34
5
2
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
EXPOSED METAL
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
EXPOSED METAL
www.ti.com
EXAMPLE STENCIL DESIGN
(2.6)
(1.9)
2X(0.95)
5X (1.1)
5X (0.6)
(R0.05) TYP
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
4214839/E 09/2019
NOTES: (continued)
7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
SYMM
PKG
1
34
5
2
MECHANICAL DATA D U1 4)} 0 (3'4) DLASHC SMALL 0U ¥N¥ 4040047 5/M 06/1‘ NO'ES, A AH Hnec' dimensmrs c'e m 'mc'ves ['nflhmeter5> B Th5 drawer ‘5 subje», ,0 change mm: Home, A Body \cngth docs rm mac mod Hoar, p'omswons, (xv gmc bms Mom mm warmers, or gm buns sha‘ nm exceed 3005 (015) eam swce @ Body mm does 101 meme 11mm fish. E Rdererce JEDEC MS 012 mam AB, nter‘ec: flash sfu‘ not exceed 0017 (043) each swde {If TEXAS INSTRUMENTS www.1i.com
LAND PATTERN DATA D (R7PDSOmGl4) PLASTlC SMALL OUTLINE Example Board Layout Sterlazlogpeulyngs (Mole c) —— <—14x0,55 -hhheb&&t="" tmedddifi§n%="" 5.40="" 5,40="" @eeeeeej="" rfihfl§eflhj="" —=""> ——l 2x1,27 Example Non Soldermask Delined Pad Example Pad Geometry (See Note c) F Example l / Solder Mask Opening 7 0 07 f (See Note E) All Armlnd ,/ tzllmss/E oa/lz NOTES: A. All linear dimensions are in millimeters. a, Tnis drawan is subject to cnonae wl'lhuul notice. c. Publlcutl’on chs7351 is recommended tor alternate desl’gns. D. Laser ctming apertures w‘lth trapezoidal walls and also roundlng comers wlll otter better paste release. Customers should contact their board assembly site for stencil design recommendations, Reter tc ch—7525 lor otner stencil recommendations. E. Customers snoola contact their ooard looricotion site lor solder musk tolerances between ond oroond signol oods. {I} Tums INSTRUMENTS www.li.com
MECHANICAL DATA "7’7 : 3‘ AST‘C SMAH CJ’ N7 HHHHHHH . . ‘7,4’ 44*, A f;—‘ NO'ES' A AH Hnec' dimensmrs c'e m m'\\me(ers Dwmens'amnq cnd tu‘erc'vcmg per ASME w 5M 1994, Tm drawer ‘5 subje», ,o "hangs wnrau: Home, Budy \evvgih ‘ues m W" Le mom Hush, pyuws‘m Ur guts Ms M exceed 0,15 each m & Rudy wde does NM Wands \Mer end flair \Mefiead 'Wclsh shaH um exceed 0‘75 each S‘de E Fa‘s WM" JEDEC M07153 MUM "\u>h, main: bus, 01 guie buns shuH {if TEXAS INSTRUMENTS www.ci.com
PW (RiPDsoicM) LAND PATTERN DATA PLASTHC SMALL OUTLINE Example Board Layout (Male 0) —>| ‘,——12x0 65 HHHHHHHi 5,60 HHHHHHHHi l“ l l l Example Non So‘dermask Defined Pad 4 x 1,60 / H l <—0,07 y/="" ah="" around="" pad="" seamelry="" (see="" nale="" c)="" solder="" mask="" opening="" (see="" note="" e)="" stencil="" 0="" en'ln="" s="" (notepd)="" ‘3="" 14x0="" 30="" h="" '«,lzxo="" 65="" ~hhhhhh~="" 5,60="" hhhhhhh—="" example="" example="" 421128472/6="" 08/15="" notes:="" ah="" h‘lneor="" dimensions="" one="" in="" rnihll'rneters.="" tn‘ls="" dvowing="" is="" subject="" lp="" change="" wltnoul="" nallee.="" publl'cotlon="" hpcjssh="" is="" recommended="" lar="" allemale="" deslgns.="" laser="" cutllng="" apertures="" wch="" tropexoidm="" walls="" and="" also="" raund‘lna="" comers="" wlll="" we!="" better="" pasle="" release="" customers="" show="" contact="" their="" board="" assembly="" sl’te="" (ov="" stenci‘="" design="" recommendations.="" reler="" to="" ”50—7525="" lur="" other="" stencl‘="" recommendotluns="" customers="" shou‘d="" contact="" their="" board="" hoercot'lon="" shte="" (or="" solder="" musk="" tolerances="" between="" and="" around="" s'lgnol="" pods.="" *1?="" tums="" instruments="" www.ti.com="">
‘J
www.ti.com
PACKAGE OUTLINE
C
.228-.244 TYP
[5.80-6.19]
.069 MAX
[1.75]
6X .050
[1.27]
8X .012-.020
[0.31-0.51]
2X
.150
[3.81]
.005-.010 TYP
[0.13-0.25]
0 - 8 .004-.010
[0.11-0.25]
.010
[0.25]
.016-.050
[0.41-1.27]
4X (0 -15 )
A
.189-.197
[4.81-5.00]
NOTE 3
B .150-.157
[3.81-3.98]
NOTE 4
4X (0 -15 )
(.041)
[1.04]
SOIC - 1.75 mm max heightD0008A
SMALL OUTLINE INTEGRATED CIRCUIT
4214825/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
18
.010 [0.25] C A B
5
4
PIN 1 ID AREA
SEATING PLANE
.004 [0.1] C
SEE DETAIL A
DETAIL A
TYPICAL
SCALE 2.800
Yl“‘+
www.ti.com
EXAMPLE BOARD LAYOUT
.0028 MAX
[0.07]
ALL AROUND
.0028 MIN
[0.07]
ALL AROUND
(.213)
[5.4]
6X (.050 )
[1.27]
8X (.061 )
[1.55]
8X (.024)
[0.6]
(R.002 ) TYP
[0.05]
SOIC - 1.75 mm max heightD0008A
SMALL OUTLINE INTEGRATED CIRCUIT
4214825/C 02/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
METAL SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
EXPOSED
METAL
OPENING
SOLDER MASK METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
EXPOSED
METAL
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:8X
SYMM
1
45
8
SEE
DETAILS
SYMM
www.ti.com
EXAMPLE STENCIL DESIGN
8X (.061 )
[1.55]
8X (.024)
[0.6]
6X (.050 )
[1.27] (.213)
[5.4]
(R.002 ) TYP
[0.05]
SOIC - 1.75 mm max heightD0008A
SMALL OUTLINE INTEGRATED CIRCUIT
4214825/C 02/2019
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
SOLDER PASTE EXAMPLE
BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X
SYMM
SYMM
1
45
8
MECHANICAL DATA P (RiPMPi’E) "LAST‘C >4 >4 7 A V A A M Hnear dw‘ensmns are m inches (miH'nem's) B TH: druwmq is s bje“ :0 change thruut nonce C mus wmhm Juli"; Msiom vanmm BA NUTS DKMLiwi, N¥ PAL’KAC: 4 r ( “ V ‘ 7 v m 31H A H ‘ ‘ M H ‘—’ H w: H J; W“ D u‘ L , ,_ , 40mm: 04/2010 INSI'RUMENTS www.mzam
MECHANICAL DATA N (R—PDlP-T“) PLASTIC DUAL—IN—LINE PACKAGE 16 P15 SHOWN PWS " A L . [NM 15 a 20 16 9 0 775 U 777 0 SZU '1 USE 3 , 1H HH HH r% r’H r"—1 r’H H1 1 A VAX “9‘69? (191591 (23,37) (25,92) 0 250 (6,50‘ A MN [1145‘ 0142‘ 0.350 new 3 O 240 (6.10), 15 92/ (1832/ (2 .59) (23,58) MSiUO‘ (A AA AA Ari AA AA AA R1 &. VAR1AT1CN M RR AC AD 1 B 0070( (17s) 0015 (111) A 0045 (1,111 g n > , ‘ -) 3.020 (0,51) MW w o 5 (0 35) 0200( 38) MAX f, ), Gnu E Home 1 1‘ 9 fix—1%)” 1 0125’ 1/111 4% 0010 (v.37 ) NOM 31a) U L»- J 0450 (13,92) MAX L 202‘ (0,53) » e c 015 (0,35) / \ a; 00‘s (0,Zb)® / \ 1 1 \\¥,// 11/18 Pm (My > @ 20 Pm vendor upho'v mom/r 17/7037 NO'FS A AH Mnec' mmensmr‘fi: B 1m: drawmq 1s sume m muss (m1111mevem) 0 change mm): nofice /c\ FuHs wumn JEDEC M57001, except 15 an: 20 p171 'r1111mLm body 1mm (01m A) A The 70 p171 and 15m} shmflder Md” 15 a ve'vdnr 0311071, eher NIH Dr 111 wkflh INSI'RUMENTS www.1i.com
MECHANICAL DATA DGK (S—PDSO—GS) PLASTIC SMALL—OUTLINE PACKAGE m1 WW“: {[0 VAX % j 3,010 I 4073329/E 05/06 NO'ES' A AH imec' dimensmrs c'e m m'hmeiers 5 Th: drawing is enmec: :e change within: nciice. Body icnqth Coos mi mciucc maid Hash, protrusions or we tms Mom 'iush, aromons, ov qaw burrs shaH m exceed 015 per end b Budy mm does not wcude inierieud flasi‘ inieriead ‘iush s'mii 'mi exceed 050 pe' we : FuHs wiUHn JEDEC M0487 quulion AA, except 'vievieud ricer INSTRUMENTS w. (i. com
LAND PATTERN DATA DGK (37PD30708) PLASTIC SMALL OUTLINE PACKAGE Exampie Board Layout Exampie stencii Openings Based on a stencii thickness of .127mm L005inch), (See Nate 0) (,0 65) TYP ‘ Li 5 LLLLL L, pm ,,,,, PKG PKG "\ i i 4 — ----- i — ----- i D DU D i i ’ PKG PKG Q G . / Exampie , Non Soldermusk Defined Pad i , , —\ L A ~/ ‘\ Example \ Spider Musk Opening / +1 1‘(0,45) ‘ (See Note E) t 1 (1,45) < ‘="" \pud="" geometry="" ’="" (see="" note="" c)="" \="" +ii¢="" (0,05)="" \="" ah="" around="" «="" ,="" \="" e="" ’="" i="" ‘\-=""> muss/A 11/13 NOTES: A. Ali iinear dimensions are in miilimeters. a. This drawing is subject ta change without natiee, C, Publication |PCi7351 is recommended ior alternate designsu a. Laser cutting apertures with trapezoidui walls and aisa rounding corners w‘iH ofler eetter paste veiease. Customers snouid Contact their board ussembiy site for stencii design recommendations. Rater tn IFS—7525 for other slenci'i recummendutions. Customers should Contact their tmurd fabrication site for solder musk tolerances between and around signal pads. .r'I {I TEXAS INSTRUMENTS www.li.com
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