IRFIBC30G Datasheet by Vishay Siliconix

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IRFIBC30G
www.vishay.com Vishay Siliconix
S21-0474-Rev. B, 17-May-2021 1Document Number: 91180
For technical questions, contact: hvmos.techsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Power MOSFET
FEATURES
Isolated package
High voltage isolation = 2.5 kVRMS (t = 60 s;
f = 60 Hz)
Sink to lead creepage distance = 4.8 mm
Dynamic dV/dt rating
Low thermal resistance
Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
DESCRIPTION
Third generation power MOSFETs from Vishay provides the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and cost
effectiveness.
The TO-220 FULLPAK eliminates the need for additional
insulating hardware in commercial-industrial applications.
The molding compound used provides a high isolation
capability and a low thermal resistance between the tab and
external heatsink. This isolation is equivalent to using a 100
micron mica barrier with standard TO-220 product. The
FULLPAK is mounted to a heatsink using a single clip or by
a single screw fixing.
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
b. VDD = 50 V, starting TJ = 25 °C, L = 73 mH, RG = 25 Ω, IAS = 2.5 A (see fig. 12)
c. ISD 3.6 A, dI/dt 60 A/μs, VDD VDS, TJ 150 °C
d. 1.6 mm from case
PRODUCT SUMMARY
VDS (V) 600
RDS(on) (Ω)V
GS = 10 V 2.2
Qg (Max.) (nC) 31
Qgs (nC) 4.6
Qgd (nC) 17
Configuration Single
N-Channel MOSFET
G
D
S
S
D
G
TO-220 FULLPAK
S
D
ORDERING INFORMATION
Package TO-220 FULLPAK
Lead (Pb)-free IRFIBC30GPbF
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless
PARAMETER SYMBOL LIMIT UNIT
Drain-source voltage VDS 600 V
Gate-source voltage VGS ± 20
Continuous drain current VGS at 10 V TC = 25 °C ID
2.5
ATC = 100 °C 1.6
Pulsed drain current aIDM 10
Linear derating factor 0.28 W/°C
Single pulse avalanche energy b EAS 250 mJ
Repetitive avalanche current a IAR 2.5 A
Repetitive avalanche energy aEAR 3.5 mJ
Maximum power dissipation TC = 25 °C PD35 W
Peak diode recovery dV/dt cdV/dt 3.0 V/ns
Operating junction and storage temperature range TJ, Tstg -55 to +150 °C
Soldering recommendations (peak temperature) dFor 10 s 300
Mounting torque 6-32 or M3 screw 10 lbf · in
1.1 N · m
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IRFIBC30G
www.vishay.com Vishay Siliconix
S21-0474-Rev. B, 17-May-2021 2Document Number: 91180
For technical questions, contact: hvmos.techsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
b. Pulse width 300 μs; duty cycle 2 %
THERMAL RESISTANCE RATINGS
PARAMETER SYMBOL TYP. MAX. UNIT
Maximum junction-to-ambient RthJA -65
°C/W
Maximum junction-to-case (drain) RthJC -3.6
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Static
Drain-ssource breakdown voltage VDS VGS = 0 V, ID = 250 μA 600 - - V
VDS temperature coefficient ΔVDS/TJ Reference to 25 °C, ID = 1 mA - 0.62 - V/°C
Gate-source threshold voltage VGS(th) VDS = VGS, ID = 250 μA 2.0 - 4.0 V
Gate-source leakage IGSS V
GS = ± 20 V - - ± 100 nA
Zero gate voltage drain current IDSS
VDS = 600 V, VGS = 0 V - - 100 μA
VDS = 480 V, VGS = 0 V, TJ = 125 °C - - 500
Drain-source on-state resistance RDS(on) V
GS = 10 V ID = 1.5 A b --2.2Ω
Forward transconductance gfs VDS = 50 V, ID = 1.5 A b2.2 - - S
Dynamic
Input capacitance Ciss VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5
- 660 -
pF
Output capacitance Coss -86-
Reverse transfer capacitance Crss -19-
Drain to sink capacitance C f = 1.0 MHz - 12 -
Total gate charge Qg
VGS = 10 V ID = 3.6 A, VDS = 360 V,
see fig. 6 and 13 b
--31
nC Gate-source charge Qgs --4.6
Gate-drain charge Qgd --17
Turn-on delay time td(on)
VDD = 300 V, ID = 3.6 A,
RG = 12 Ω, RD= 82 Ω,
see fig. 10 b
-11-
ns
Rise time tr -13-
Turn-off delay time td(off) -35-
Fall time tf -14-
Internal drain inductance LD Between lead,
6 mm (0.25") from
package and center of
die contact
-4.5-
nH
Internal source inductance LS-7.5-
Drain-Source Body Diode Characteristics
Continuous source-drain diode current IS
MOSFET symbol
showing the
integral reverse
p - n junction diode
--2.5
A
Pulsed diode forward current a ISM --10
Body diode voltage VSD TJ = 25 °C, IS = 2.5 A, VGS = 0 V b --1.6V
Body diode reverse recovery time trr TJ = 25 °C, IF = 3.6 A, dI/dt = 100 A/μs b - 400 810 ns
Body diode reverse recovery charge Qrr -2.14.2μC
Forward turn-on time ton Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
D
S
G
S
D
G
ID. Drain Current (Amps) ID, Drain Currenl (Amps) 3: sous F'LLSE mam TC - 2500 10‘ 10? V35. DrainriorSuurce Vollage (volts) % anus auLss dIDTH 150“; m" 10‘ m2 Vns, DIain~lu-Source Vollage Woks) 7’? , @- mu" $ , E 2 5 m“ .E E o .5 VD; = wov 204% PULSE WIDTH . s a 7 a c m V95v Gate-lo-Source Voltage Ivolts) 1 5 8 E u, a a ‘a u n: z a 5 0 H m 8 2 2 u 3 a 0 n: ‘2’ E ‘ 5 a g 5 r E 1 o n 5 °a 5 i c? vss : mv n o ,W um —20 n ED 40 an ac 100120249150 T4, Junction Temperature (”0) rwmos.techsugport@wshay.com www.mshay.com/doc791000
IRFIBC30G
www.vishay.com Vishay Siliconix
S21-0474-Rev. B, 17-May-2021 3Document Number: 91180
For technical questions, contact: hvmos.techsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Fig. 1 - Typical Output Characteristics, TC = 25 °C
Fig. 2 - Typical Output Characteristics, TC = 150 °C
Fig. 3 - Typical Transfer Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
Capacitance (pF) V35. Gate-m-Soume Voltage (volls) 15m. 1200 § § am a mu m m v55 : nv, : me ~ Cgs + cga, Cas SHORTED : can = Gus ‘ c1755 Bras 10‘ Vns, Drain-to-Source Voltage (volts) F 3 SEE mam: 1:1 10 20 an 40 Ge. Total Gate Charge (nC) Isl). Reverse Drain Current (Amps) ID, Drain Current (Amps) mi 0. mU m? 10 a 1 veg, - 0v 2 nE 09 12 V50, Source-IoDrain Voltage (volts) mama» IN MI: AREA Lmreu 3' RDim") Yc-ES rJ=15n0c SINGLE PULS ,0 e a ,D2 2 s 42 a ma: a m. V35, Dram-m-Source Vallaga (volls) rwmos.techsugport@wshay.com www.mshay.com/doc791000
IRFIBC30G
www.vishay.com Vishay Siliconix
S21-0474-Rev. B, 17-May-2021 4Document Number: 91180
For technical questions, contact: hvmos.techsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 8 - Maximum Safe Operating Area
[3. Drain Current (Amps) 2,0 4: an 55% 25 57 75 NO 125 150 To, Case Temperature (“0) r \ \ r 7 r— '51: mm mm ‘J—‘J 1mm, Risvmm r ‘ flux um r : Mrrmw, Hm: : It“ may x In“ v Vr Thermal Response (2mg) ‘ :u 5 n)" m 10': m x m t“ Rectangular Pulse Duration (samnds) Err M i r I | | \ rwmos.techsugport@wshay.com www.mshay.com/doc791000
IRFIBC30G
www.vishay.com Vishay Siliconix
S21-0474-Rev. B, 17-May-2021 5Document Number: 91180
For technical questions, contact: hvmos.techsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 10a - Switching Time Test Circuit
Fig. 10b - Switching Time Waveforms
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms
Pulse width 1 µs
Duty factor 0.1 %
RD
VGS
RG
D.U.T.
10 V
+
-
VDS
VDD
VDS
90 %
10 %
VGS
td(on) trtd(off) tf
I
AS
V
DS
V
DD
V
DS
t
p
VISHAY. sun In we»: LM 1 an 500 nm “N > LA m 300 gun 100 E5, Single Pulse Energy (mJ) nu=mv 25 M 75 MD 125 |ED Starting TJ, Junction Temperaturef’c) hvmos.techsu gport@wshay.com www.v\shay.com/doc?91000
IRFIBC30G
www.vishay.com Vishay Siliconix
S21-0474-Rev. B, 17-May-2021 6Document Number: 91180
For technical questions, contact: hvmos.techsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Fig. 13a - Basic Gate Charge Waveform
Fig. 13b - Gate Charge Test Circuit
QGS QGD
QG
V
G
Charge
VGS
D.U.T.
3 mA
VGS
VDS
IGID
0.3 µF
0.2 µF
50 kΩ
12 V
Current regulator
Current sampling resistors
Same type as D.U.T.
+
-
VISHAY. }_. if (:3 ® H @ E{ w T T wwwwshaz cam/Egg’91 180 hvmos.techsuggortm‘shaymm www.v\shay.com/doc?91000
IRFIBC30G
www.vishay.com Vishay Siliconix
S21-0474-Rev. B, 17-May-2021 7Document Number: 91180
For technical questions, contact: hvmos.techsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91180.
P.W. Period
dI/dt
Diode recovery
dV/dt
Ripple 5 %
Body diode forward drop
Re-applied
voltage
Reverse
recovery
current
Body diode forward
current
VGS = 10 Va
ISD
Driver gate drive
D.U.T. lSD waveform
D.U.T. VDS waveform
Inductor current
D = P.W.
Period
+
-
+
+
+
-
-
-
Peak Diode Recovery dV/dt Test Circuit
VDD
dV/dt controlled by Rg
Driver same type as D.U.T.
ISD controlled by duty factor “D”
D.U.T. - device under test
D.U.T. Circuit layout considerations
Low stray inductance
Ground plane
Low leakage inductance
current transformer
Rg
Note
a. VGS = 5 V for logic level devices
VDD
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Package Information
www.vishay.com Vishay Siliconix
Revision: 08-Apr-2019 1Document Number: 91359
For technical questions, contact: hvmos.techsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
TO-220 FULLPAK (High Voltage)
OPTION 1: FACILITY CODE = 9
Notes
1. To be used only for process drawing
2. These dimensions apply to all TO-220 FULLPAK leadframe versions 3 leads
3. All critical dimensions should C meet Cpk > 1.33
4. All dimensions include burrs and plating thickness
5. No chipping or package damage
6. Facility code will be the 1st character located at the 2nd row of the unit marking
MILLIMETERS
DIM. MIN. NOM. MAX.
A 4.60 4.70 4.80
b 0.70 0.80 0.91
b1 1.20 1.30 1.47
b2 1.10 1.20 1.30
C 0.45 0.50 0.63
D 15.80 15.87 15.97
e 2.54 BSC
E 10.00 10.10 10.30
F 2.44 2.54 2.64
G 6.50 6.70 6.90
L 12.90 13.10 13.30
L1 3.13 3.23 3.33
Q 2.65 2.75 2.85
Q1 3.20 3.30 3.40
Ø R 3.08 3.18 3.28
Mold flash
bleeding Q
F
Q1
L1
L
E
Ø R
2 x e
3 x b
3 x b2
G
A3
C
D
Exposed Cu
3 x b1
A
Bottom view
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Package Information
www.vishay.com Vishay Siliconix
Revision: 08-Apr-2019 2Document Number: 91359
For technical questions, contact: hvmos.techsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
OPTION 2: FACILITY CODE = Y
Notes
1. To be used only for process drawing
2. These dimensions apply to all TO-220 FULLPAK leadframe versions 3 leads
3. All critical dimensions should C meet Cpk > 1.33
4. All dimensions include burrs and plating thickness
5. No chipping or package damage
6. Facility code will be the 1st character located at the 2nd row of the unit marking
MILLIMETERS INCHES
DIM. MIN. MAX. MIN. MAX.
A 4.570 4.830 0.180 0.190
A1 2.570 2.830 0.101 0.111
A2 2.510 2.850 0.099 0.112
b 0.622 0.890 0.024 0.035
b2 1.229 1.400 0.048 0.055
b3 1.229 1.400 0.048 0.055
c 0.440 0.629 0.017 0.025
D 8.650 9.800 0.341 0.386
d1 15.88 16.120 0.622 0.635
d3 12.300 12.920 0.484 0.509
E 10.360 10.630 0.408 0.419
e 2.54 BSC 0.100 BSC
L 13.200 13.730 0.520 0.541
L1 3.100 3.500 0.122 0.138
n 6.050 6.150 0.238 0.242
Ø P 3.050 3.450 0.120 0.136
u 2.400 2.500 0.094 0.098
V 0.400 0.500 0.016 0.020
ECN: E19-0180-Rev. D, 08-Apr-2019
DWG: 5972
E
b
n
d1
L
b2
b3
Ø P
L1
d3
D
c
A2
u
V
A1
A
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Revision: 01-Jan-2021 1Document Number: 91000
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