LD3985xx Datasheet by STMicroelectronics

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‘ ’l liieaugmerwed SOT23—5L
This is information on a product in full production.
July 2017 DocID9587 Rev 16 1/18
LD3985
Ultra low drop and low noise BiCMOS voltage regulators
Datasheet
-
production data
Features
Input voltage from 2.5 V to 6 V
Stable with low ESR ceramic capacitors
Ultra low-dropout voltage (60 mV typ. at 150
mA load, 0.4 mV typ. at 1 mA load)
Very low quiescent current (85 µA typ. at no
load, 170 µA typ. at 150 mA load; max.1.5 µA
in OFF mode)
Guaranteed output current up to 150 mA
Wide range of output voltages: 1.22 V; 1.8 V;
2.5 V; 2.7 V; 2.8 V; 2.9 V; 3 V; 3.3 V; 4.7 V
Fast turn-on time: typ. 200 µs [C
O
= 1 µF,
C
BYP
= 10 nF and I
O
= 1 mA]
Logic-controlled electronic shutdown
Internal current and thermal limit
Output low noise voltage 30 µV
RMS
over 10 Hz
to 100 kHz
SVR of 60 dB at 1 kHz, 50 dB at 10 kHz
Temperature range: - 40 °C to 125 °C
Description
The LD3985 provides up to 150 mA, from 2.5 V to
6 V input voltage. The ultra low drop voltage, low
quiescent current and low noise make it suitable
for low power applications and in battery-powered
systems. Regulator ground current increases
slightly in dropout only, prolonging the battery life.
Power supply rejection is better than 60 dB at low
frequencies and rolls off at 10 kHz. High power
supply rejection is maintained down to low input
voltage levels common to battery operated
circuits. Shutdown logic control function is
available, this means that when the device is
used as local regulator, it is possible to put a part
of the board in standby, decreasing the total
power consumption. The LD3985 is designed to
work with low ESR ceramic capacitors. Typical
applications are in mobile phones and similar
battery-powered wireless systems.
627/
www.st.com
Contents LD3985
2/18 DocID9587 Rev 16
Contents
1 Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
6 Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
7 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
7.1 SOT23-5L package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
7.2 SOT23-5L packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
8 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
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DocID9587 Rev 16 3/18
LD3985 Diagram
18
1 Diagram
Figure 1. Schematic diagram
VOUT BYPASS W W HEM vIN GND INHIBIT (3515440
Pin configuration LD3985
4/18 DocID9587 Rev 16
2 Pin configuration
Figure 2. Pin connection (top view)
Table 1. Pin description
Pin Symbol Name and function
1V
I
Input voltage of the LDO
2 GND Common ground
3V
INH
Inhibit input voltage: ON mode when V
INH
1.2 V, OFF mode when V
INH
0.4 V (Do not leave it floating, not internally pulled down/up)
4 BYPASS Bypass pin: an external capacitor (usually 10 nF) has to be connected to
minimize noise voltage
5V
O
Output voltage of the LDO
INH OUT BYPASS ON if GND I J. CEYF1OHF 05111590
DocID9587 Rev 16 5/18
LD3985 Typical application
18
3 Typical application
Figure 3. Typical application circuit
Maximum ratings LD3985
6/18 DocID9587 Rev 16
4 Maximum ratings
Note: Absolute maximum ratings are those values beyond which damage to the device may occur.
Functional operation under these conditions is not implied.
Table 2. Absolute maximum ratings
Symbol Parameter Value Unit
V
I
DC input voltage -0.3 to 6
(1)
1. The input pin is able to withstand non repetitive spike of 6.5 V for 200 ms.
V
V
O
DC output voltage -0.3 to V
I
+0.3 V
V
INH
Inhibit input voltage -0.3 to V
I
+0.3 V
I
O
Output current Internally limited
P
D
Power dissipation Internally limited
T
STG
Storage temperature range -65 to 150 °C
T
OP
Operating junction temperature range -40 to 125 °C
Table 3. Thermal data
Symbol Parameter Value Unit
R
thJC
Thermal resistance junction-case 81 °C/W
R
thJA
Thermal resistance junction-ambient 255 °C/W
DocID9587 Rev 16 7/18
LD3985 Electrical characteristics
18
5 Electrical characteristics
T
J
= 25 °C, V
I
= V
O(NOM)
+0.5 V, C
I
= 1 µF, C
BYP
= 10 nF, I
O
= 1 mA, V
INH
= 1.4 V, unless
otherwise specified.
Table 4. Electrical characteristics
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
I
Operating input
voltage 2.5 6 V
V
O
Output voltage
accuracy, V
O(NOM)
<
2.5 V
I
O
= 1 mA -50 50 mV
T
J
= -40 to 125 °C -75 75
V
O
Output voltage
accuracy, V
O(NOM)
2.5V
I
O
= 1 mA -2 2 % of
V
O(NOM)
T
J
= -40 to 125 °C -3 3
ΔV
O
Line regulation
(1)
V
I
= V
O(NOM)
+ 0.5
to 6 V
T
J
= -40 to 125 °C
-0.1 0.1 %/V
V
O(NOM)
= 4.7 to 5 V -0.19 0.19
ΔV
O
Load regulation
I
O
= 1 mA to 150
mA, V
O(NOM)
< 2.5
V
T
J
= -40 to 125 °C
0.002 0.008 %/mA
ΔV
O
Load regulation
I
O
= 1 mA to 150
mA, V
O(NOM)
2.5
V0.0004 0.002
%/mA
I
O
= 1 mA to
150mA, T
J
= -40 to
125 °C, V
O(NOM)
2.5 V
0.0025 0.005
ΔV
O
Output AC line
regulation
(2)
V
I
= V
O(NOM)
+ 1 V,
I
O
= 150 mA,
t
R
= t
F
= 30 µs
1.5 mV
PP
I
Q
Quiescent current
ON mode: V
INH
=
1.2 V
I
O
= 0 85
µA
I
O
= 0, T
J
= -40 to
125 °C 150
I
O
= 0 to 150 mA 170
I
O
= 0 to 150 mA,
T
J
= -40 to 125 °C 250
OFF mode:
V
INH
= 0.4 V
0.003
T
J
= -40 to 125 °C 1.5
Electrical characteristics LD3985
8/18 DocID9587 Rev 16
V
DROP
Dropout voltage
(3)
I
O
= 1 mA 0.4
mV
I
O
= 1 mA,
T
J
= -40 to 125 °C 2
I
O
= 50 mA 20
I
O
= 50 mA,
T
J
= -40 to 125 °C 35
I
O
= 100 mA 45
I
O
= 100 mA,
T
J
= -40 to 125 °C 70
I
O
= 150 mA 60
I
O
= 150 mA,
T
J
= -40 to 125 °C 100
I
SC
Short-circuit current R
L
= 0 600 mA
SVR Supply voltage
rejection
V
I
=
V
O(NOM)
+0.2
5 V ±
V
RIPPLE
= 0.1
V, I
O
= 50 mA
V
O(NOM)
< 2.5
V, V
I
= 2.55 V
f = 1
kHz 60
dB
f =
10
kHz 50
I
O(PK)
Peak output current V
O
V
O(NOM)
- 5% 300 550 mA
V
INH
Inhibit input logic
low V
I
= 2.5 V to 6 V,
T
J
= -40 to 125 °C
0.4
V
Inhibit input logic
high 1.2
I
INH
Inhibit input current V
INH
= 0.4 V,
V
I
= 6 V ±1 nA
eN Output noise voltage B
W
= 10 Hz to 100
kHz, C
O
= 1 µF 30 µV
RMS
t
ON
Turn-on time
(4)
C
BYP
= 10 nF 100 250 µs
T
SHDN
Thermal shutdown
(5)
160 °C
C
O
Output capacitor Capacitance
(6)
122µF
ESR 5 5000 m
1. For V
O(NOM)
< 2 V, V
I
= 2.5 V
2. For V
O(NOM)
= 1.25 V, V
I
= 2.5 V
3. Dropout voltage is the input-to-output voltage difference at which the output voltage is 100 mV below its
nominal value. This specification does not apply to input voltages below 2.5 V
4. Turn-on time is time measured between the enable input just exceeding V
INH
high value and the output
voltage just reaching 95% of its nominal value
5. Typical thermal protection hysteresis is 20 °C
6. The minimum capacitor value is 1 µF, anyway the LD3985 is still stable if the compensation capacitor has a
30% tolerance in all temperature range
Table 4. Electrical characteristics (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
cs‘ was cslAlza Va (V) Vo (V) 1.39 2.925 1.35 2.90 7.37 2.575 1.36 2.85 L35 2.525 1.34 2.3m ‘33 2.775 1.32 2.75 LSI 2.725 1.30 2.70 750 D 50 mu m ( °c) —50 u so loo TJ(°C) csuvsn nsusm v5 (V) VsuW) 3.425 mm 1'3 3.375 L1 335 3.325 0.9 3.30 \ V‘ ‘5" 3 275 “'7 \ \ ' \\ \ 3.25 a 5 \\ \\ 3.225 v. :2.5v \\ 3.20 0-3 n —50 o 50 mm n ( “c) -50 0 50 ‘00 M 0)
DocID9587 Rev 16 9/18
LD3985 Typical performance characteristics
18
6 Typical performance characteristics
T
J
= 25 °C, V
I
= V
O(NOM)
+0.5 V, C
I
= C
O
= 1 µF, C
BYP
= 10 nF, I
O
= 1 mA, V
INH
= 1.4 V,
unless otherwise specified.
Figure 4. Output voltage vs. temperature
(V
0
=1.35 V) Figure 5. Output voltage vs. temperature
(V
0
=2.7 V)
Figure 6. Output voltage vs. temperature
(V
0
=3.3 V) Figure 7. Shutdown voltage vs. temperature
(V
0
=1.35 V)
05‘ 0950 Una 0510900 VSW) v5-3.3v (Z/V) V: 5V '0 5V ‘3 lo:10mA 0.075 ‘vsfiwflw ' 0.075 a M 0.05 0.025 0.9 0 \ Vl—EV 70.625 0‘7 \ \ D 05 \ 7 . \\ 0 5 \\\ 70.075 v.7 .av 7°“ 03 —0.725 750 0 50 100 n(°c) —50 0 50 ‘00 n(°c) Line 2mm Line :sum (X/V) v‘:3.2v Ia 0v (x/v) v.:3.5v 70 av 0.075 vSNDN LAV 0.075 va 1.4V 0.075 \a:1mA 0-075 7°:1mA 0.05 0.05 0.025 0.025 0 0 70.025 70.025 —0.05 —0.05 70.075 70.075 —0.1 —0.1 70.125 70.125 750 0 50 ‘00 MW) 750 0 50 100 n(°c) Load CSHSSO Loud 6515010 (X/mA) (x/mA) V|:2.5V V7=3.2V 0.005 VanN =1 .AV 0.005 Vus :7 .AV 0:th to 750m \0=‘mA to 150m 0.0025 0.0025 0 0 —0.0025 “ “‘ —0.0025 70.005 70.005 —0.0075 —0.0075 750 0 50 100 T1(°C) —50 0 50 100 m‘c)
Typical performance characteristics LD3985
10/18 DocID9587 Rev 16
Figure 8. Shutdown voltage vs. temperature
(V
0
=3.3 V) Figure 9. Line regulation vs. temperature
(V
0
=1.35 V)
Figure 10. Line regulation vs. temperature
(V
0
=2.7 V) Figure 11. Line regulation vs. temperature
(V
0
=3.3 V)
Figure 12. Load regulation vs. temperature
(V
0
=1.35 V) Figure 13. Load regulation vs. temperature
(V
0
=2.7 V)
V0 Laud cstsasa cs‘sofio (Wm) WM) v.=3.av v°=1.35v 0.005 Vsm =1-4V 150 V. :2.5v |D=1mA lo ‘som ‘oflsomA vsm=mv 0.0025 200 o ‘50 4.0025 mu —o.nos so lo:c —a.on75 u 750 a so ma TJ("C) 750 0 50 100 Two) ammo mm W“) MM) 225 .35v 100 250 v‘_sv \D=ISGmA VSHDN:I.4V ‘75 200 ‘50 g” ‘25 ‘50 um 75 mo T4:25-c “‘\\ 50 V‘=2.5V so 25 vsmm .AV wo=o o o u so so so ‘20 lo(mA) 750 u so mo 1mg) m.- I oaMs/ys use All]: ES‘SnEn I svwa) W, 90 '0 ~ an 1. 70 so ‘ so V0 ' :1me 40 so 20 2.A5V m 2.65 m SHDN=‘-4V m lunmv 0-1 wnmvfl many,- a.“ 2sz \o:50mA o 0.1 2.1 4.1 5.1 8.1 f(KHz)
DocID9587 Rev 16 11/18
LD3985 Typical performance characteristics
18
Figure 14. Load regulation vs. temperature
(V
0
=3.3 V) Figure 15. Quiescent current vs. temperature
(V
I
=2.5 V)
Figure 16. Quiescent current vs. temperature
(V
I
=6 V) Figure 17. Quiescent current vs. load current
Figure 18. Supply voltage rejection vs.
frequency Figure 19. Load transient response
V
I
= 3.2 V, I
O
= 1 to 150 mA, rise-fall time
= 1 µs
Tum 5:: 016/; m mm mm; sum/[s mm: rm Snnmv IE Innmv MY nnm rm; «nnv Chl snnmv m Snnmv munusm/ mmv Snnmv r 2 Snnmv
Typical performance characteristics LD3985
12/18 DocID9587 Rev 16
Figure 20. Line transient response
V
I
= 3.8 V to 4.4 V, T
J
= 25 °C, I
O
= 150 mA, C
I
= C
O
= 1 µF (X7R), C
BYP
= 10 nF, rise-fall time
= 1 µs,
V
O
= 2.7 V
Figure 21. Startup
V
I
= 3.3 V, I
O
= 1 mA, C
I
= C
O
= 1 µF (cer), C
BYP
=
10 nF, T
r
= 20 ns, V
O
= 2.8 V
Figure 22. Turn-off
V
I
= 3.3 V, I
O
= 1 mA, C
I
= C
O
= 1 mF (cer), C
BYP
=
10 nF, T
f
= 20 ns, V
O
= 2.8 V
DocID9587 Rev 16 13/18
LD3985 Package information
18
7 Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
7.1 SOT23-5L package information
Figure 23. SOT23-5L package outline
BN
7% 4 fl , , E
Package information LD3985
14/18 DocID9587 Rev 16
Figure 24. SOT23-5L recommended footprint (dimensions in mm)
Table 5. SOT23-5L package mechanical data
Dim. mm
Min. Typ. Max.
A0.90 1.45
A1 0 0.15
A2 0.90 1.30
b0.30 0.50
c2.09 0.20
D2.95
E1.60
e0.95
H2.80
L0.30 0.60
θ08
BN
Note Draw‘ng not w sca‘e
DocID9587 Rev 16 15/18
LD3985 Package information
18
7.2 SOT23-5L packing information
Figure 25. SOT23-5L tape and reel outline
Table 6. SOT23-5L tape and reel mechanical data
Dim. mm
Min. Typ. Max.
A180
C 12.8 13.0 13.2
D20.2
N60
T14.4
Ao 3.13 3.23 3.33
Bo 3.07 3.17 3.27
Ko 1.27 1.37 1.47
Po 3.9 4.0 4.1
P 3.9 4.0 4.1
Ordering information LD3985
16/18 DocID9587 Rev 16
8 Ordering information
Table 7. Ordering information
Order code Output voltage
LD3985M122R 1.22 V
LD3985M18R 1.8 V
LD3985M25R 2.5 V
LD3985M27R 2.7 V
LD3985M28R 2.8 V
LD3985M29R 2.9 V
LD3985M30R 3.0 V
LD3985M33R 3.3 V
LD3985M47R 4.7 V
DocID9587 Rev 16 17/18
LD3985 Revision history
18
9 Revision history
Table 8. Document revision history
Date Revision Changes
07-May-2004 6 Part number status changed on table 3.
05-Oct-2004 7 t
ON
values are changed on table 5.
27-Oct-2004 8 Order codes changed - table 3.
17-Mar-2005 9 Improved drawing quality for figures 19 - 20 - 21 - 22.
10-Apr-2007 10 Order codes updated.
08-Jun-2007 11 Order code change.
20-Dec-2007 12 Modified: Table 1, Table 12, mechanical data for Flip-chip.
02-Dec-2008 13 Modified: Table 6 on page 14 and Figure 23 on page 17.
03-Jan-2011 14 Modified: Features on page 1 and Table 12 on page 20.
08-Jan-2014 15
Part number LD3985XX changed to LD3985.
Modified title in cover page.
Updated the description and Section 7: Package mechanical data.
Added Section 8: Packaging mechanical data.
Minor text changes.
20-Jul-2017 16
Removed Flip Chip (1.57x1.22) and TSOT23-5L package information.
Removed device summary table.
Updated the whole document accordingly.
LD3985
18/18 DocID9587 Rev 16
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© 2017 STMicroelectronics – All rights reserved

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