STM6315 Datasheet by STMicroelectronics

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March 2007 Rev 5 1/21
1
STM6315
Open drain microprocessor reset
Features
Low supply current of 1.5µA (typ)
±1.8% reset threshold accuracy (25°C)
Guaranteed RST assertion down to
VCC = 1.0V
Open drain RST output can exceed VCC
Power supply transient immunity
Operating temperature: –40 to +125°C
Available in SOT143-4 package.
SOT143-4 (W1)
www.st.com
Contents STM6315
2/21
Contents
1 Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Reset output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Manual reset input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 Negative-going VCC transients . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4 Valid RST output down to VCC = 0V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3 Typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
7 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
STM6315 List of tables
3/21
List of tables
Table 1. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 2. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 3. Operating and AC measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 4. DC and AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 5. SOT143-4 – 4-lead small outline transistor package mechanical data. . . . . . . . . . . . . . . . 17
Table 6. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 7. Marking description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 8. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
List of figures STM6315
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List of figures
Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. SOT143-4 connections (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 4. Hardware hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 5. Reset timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 6. Manual reset timing diagram, switch bounce/debounce. . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 7. Supply current vs. supply voltage, VRST = 2.63V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 8. Supply current vs. temperature (no load), VRST = 2.63V . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 9. RST output voltage vs. output current, VCC = 4.25V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 10. Normalized reset time-out period vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 11. Normalized reset threshold vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 12. Max. transient duration not causing reset pulse vs. reset threshold Overdrive . . . . . . . . . 11
Figure 13. AC testing input/output waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 14. SOT143-4 – 4-lead small outline transistor package outline . . . . . . . . . . . . . . . . . . . . . . . 17
— STM6315 O— Table 1. Signal names Symbol Des Vcc Supply vo‘lage W Manual resel mpul Aclive-low open drain resel oulpul Ground Figure 2. 50T143-4 connections (top View) I:@ :I
STM6315 Summary description
5/21
1 Summary description
The STM6315 Microprocessor Reset Circuit is a low power supervisory device used to
monitor power supplies. It performs a single function: asserting a reset signal whenever the
VCC supply voltage drops below a preset value and keeping it asserted until VCC has risen
above the preset threshold for a minimum period of time (trec). It also provides a manual
reset input (MR). The open drain RST output can be pulled up to a voltage higher than VCC,
but less than 6V.
The STM6315 comes with standard factory-trimmed reset thresholds of 2.63V, 2.93V,
3.08V, 4.38V, and 4.63V. The STM6315 is available in the SOT143-4 package.
Figure 1. Logic diagram
Figure 2. SOT143-4 connections (top view)
Table 1. Signal names
Symbol Description
VCC Supply voltage
MR Manual reset input
RST Active-low open drain reset output
VSS Ground
AI11162
VCC
STM6315
VSS
RST
MR
1
RST
VCC
VSS
AI11163
23
4
MR
Summary description STM6315
6/21
Figure 3. Block diagram
Figure 4. Hardware hookup
1. Open drain RST output requires external pull-up resistor.
AI11164
VRST
RST
COMPARE
trec
Generator
VCC
MR DEBOUNCE
AI11165
VCC
VCC
MR
STM6315 MCU
RST(1) RESET
Input
10k
VCC
VSS VSS
Manual
Reset
STM6315 Operation
7/21
2 Operation
2.1 Reset output
The STM6315 Microprocessor Reset Circuit has an active-low, open drain reset output. This
output structure will sink current when RST is asserted. Connect a pull-up resistor from RST
to any supply voltage up to 6V (see Figure 4 on page 6). Select a resistor value large
enough to register a logic low, and small enough to register a logic high while supplying all
input current and leakage paths connected to the reset output line. A 10k pull-up is sufficient
in most applications.
The STM6315 asserts a reset signal to the MCU whenever VCC goes below the reset
threshold (VRST), or when the manual reset input (MR) is taken low (see Figure 5 and
Figure 6 on page 8). RST is guaranteed valid down to VCC = 1.0V.
During power-up, (once VCC exceeds the reset threshold) an internal timer keeps RST low
for the reset time-out period, trec. After this interval, RST returns high.
If VCC drops below the reset threshold, RST goes low. Each time RST is asserted, it stays
low for at least the reset time-out period. Any time VCC goes below the reset threshold, the
internal timer clears. The reset timer starts when VCC returns above the reset threshold.
2.2 Manual reset input
A logic low on MR asserts RST. RST remains asserted while MR is low, and for trec after it
returns high. The MR input has an internal pull-up resistor 63kΩ (typ), allowing it to be left
open if not used.
This input can be driven with TTL/CMOS-logic levels or with open drain/collector outputs.
Connect a standard open push-button switch from MR to VSS to create a manual reset
function (see Figure 4 on page 6); external debounce circuitry is not required. If the device is
used in a noisy environment, connect a 0.1µF capacitor from MR to VSS to provide
additional noise immunity.
2.3 Negative-going VCC transients
The STM6315 is relatively immune to negative-going VCC transients (glitches). Figure 12 on
page 11 shows typical transient duration versus reset comparator overdrive (for which the
STM6315 will NOT generate a reset pulse). The graph was generated using a negative
pulse applied to VCC, starting at 0.5V above the actual reset threshold and ending below it
by the magnitude indicated (Reset Threshold Overdrive). The graph indicates the maximum
pulse width a negative VCC transient can have without causing a reset pulse. As the
magnitude of the transient increases (further below the threshold), the maximum allowable
pulse width decreases. Any combination of duration and overdrive which lies under the
curve will NOT generate a reset signal (see Figure 12). A 0.1µF bypass capacitor mounted
as close as possible to the VCC pin provides additional transient immunity.
Operation STM6315
8/21
2.4 Valid RST output down to VCC = 0V
When VCC falls below 1V, the RST output no longer sinks current, but becomes an open
circuit. In most systems this is not a problem, as most MCUs do not operate below 1V.
However, in applications where RST output must be valid down to 0V, a pull-down resistor
may be added to hold the RST output low. This resistor must be large enough to not load
the RST output, and still be small enough to pull the output to Ground. A 100KΩ resistor is
recommended.
Figure 5. Reset timing diagram
Figure 6. Manual reset timing diagram, switch bounce/debounce
AI11166
RST
VCC VRST
VCC (min) trec
AI11167b
RST
MR
trec
MR-to-RST Delay
MR Glitch Rejection
MR Input Pulse Width
RST Vns‘r
STM6315 Typical operating characteristics
9/21
3 Typical operating characteristics
Note: Typical values are at TA = 25°C.
Figure 7. Supply current vs. supply voltage, VRST = 2.63V
Figure 8. Supply current vs. temperature (no load), VRST = 2.63V
Supply Voltage, VCC (V)
Supply Current, ICC (µA)
AI11871c
0.00
0.25
0.50
0.75
1.00
1.25
1.50
1.75
2.00
2.25
2.50
2.75
3.00
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Temperature, TA (°C)
Supply Current, ICC (µA)
AI11872c
0.00
0.25
0.50
0.75
1.00
1.25
1.50
1.75
2.00
2.25
–40 –20 0 20 40 60 80 100 120
VCC = 2V
VCC = 3V
VCC = 4V
VCC = 5V
CC
Typical operating characteristics STM6315
10/21
Figure 9. RST output voltage vs. output current, VCC = 4.25V
Figure 10. Normalized reset time-out period vs. temperature
Output Current (mA)
Output Voltage (V)
AI11873c
0
0.04
0.08
0.12
0.16
0.20
0369
12
Temperature, TA (°C)
AI11875b
Normalized Reset Time-out Period,
trec/trec (typ) (–)
0.98
1.00
1.02
1.04
1.06
1.08
1.10
1.12
1.14
–40 –20 0 20 40 60 80 100 120
STM6315 Typical operating characteristics
11/21
Figure 11. Normalized reset threshold vs. temperature
Figure 12. Max. transient duration not causing reset pulse vs. reset threshold Overdrive
Note: Reset occurs above the curve.
Temperature, TA (°C)
Normalized Reset Threshold, VRST/VRST-typ (–)
AI11876c
0.99
0.995
1
1.005
1.01
–40 –20 0 20 40 60 80 100 120
Reset Threshold Overdrive (mV)
Transient Duration (µs)
AI11877
0
10
20
30
40
50
60
70
80
90
100
1 10 100 1000
Maximum rating STM6315
12/21
4 Maximum rating
Stressing the device above the rating listed in the Table 2: Absolute maximum ratings may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality documents.
Table 2. Absolute maximum ratings
Symbol Parameter Value Unit
TSTG Storage temperature (VCC Off) –55 to 150 °C
TSLD(1)
1. Reflow at peak temperature of 260°C (total thermal budget not to exceed 245°C for greater than 30
seconds).
Lead solder temperature for 10 seconds 260 °C
VIO Input or output voltage –0.3 to VCC + 0.3 V
VCC Supply voltage –0.3 to 7.0 V
IOOutput current 20 mA
PDPower dissipation 320 mW
STM6315 DC and AC parameters
13/21
5 DC and AC parameters
This section summarizes the operating measurement conditions, and the DC and AC
characteristics of the device. The parameters in the DC and AC characteristics Tables that
follow are derived from tests performed under the measurement conditions summarized in
Table 3: Operating and AC measurement conditions. Designers should check that the
operating conditions in their circuit match the operating conditions when relying on the
quoted parameters.
Figure 13. AC testing input/output waveforms
Table 3. Operating and AC measurement conditions
Parameter STM6315 Unit
VCC Supply Voltage 1.0 to 5.5 V
Ambient Operating Temperature (TA) –40 to +125 °C
Input Rise and Fall Times ~5 ns
Input Pulse Voltages 0.2 to 0.8VCC V
Input and Output Timing Reference Voltages 0.3 to 0.7VCC V
AI02568
0.8VCC
0.2VCC
0.7VCC
0.3VCC
DC and AC parameters STM6315
14/21
Table 4. DC and AC characteristics
Sym Description Test Condition (1) Min Typ Max Unit
VCC Operating voltage 1.0 5.5 V
ICC VCC supply current
VCC = 5.5V, no load
TA = –40 to +85°C 2.0 12 µA
VCC = 5.5V, no load
TA = –40 to +125°C 15 µA
VCC = 3.6V, no load
TA = –40 to +85°C 1.5 10 µA
VCC = 3.6V, no load
TA = –40 to +125°C 12 µA
VOL RST output voltage
VCC > 4.25V, ISINK = 3.2mA0.4V
VCC > 2.5V, ISINK = 1.2mA0.3V
VCC > 1.0V, ISINK = 80µA0.3V
RST output open drain
Leakage Current
VCC > VRST
, RST not
asserted A
Reset Thresholds
VRST
Reset threshold (2)
(see Table 6 on page 18
for detailed listing)
VCC falling; TA = 25°C VRST – 1.8%
VRST
VRST + 1.8% V
VCC falling; TA = –40 to 85°C VRST – 2.5% VRST + 2.5% V
VCC falling; TA = –40 to 125°C VRST – 3.5% VRST + 3.5% V
tRD VCC-to-RST delay
VCC falling from
(VRST + 100mV) to
(VRST – 200mV) at 1mV/µs
35 µs
trec
RST pulse
width (2)
STM6315xAxxxx TA = –40 to +85°C 1 1.5 2ms
TA = –40 to +125°C 0.8 2.4 ms
STM6315xBxxxx TA = –40 to +85°C 20 30 40 ms
TA = –40 to +125°C 16 48 ms
STM6315xDxxxx TA = –40 to +85°C 140 210 280 ms
TA = –40 to +125°C 112 336 ms
STM6315xGxxxx TA = –40 to +85°C 1120 1680 2240 ms
TA = –40 to +125°C 896 2688 ms
Reset threshold temperature
coefficient 60 ppm/°C
STM6315 DC and AC parameters
15/21
Manual Reset Input
VIL MR low input threshold VRST > 4.0V 0.8 V
VRST < 4.0V 0.3VCC V
VIH MR low input threshold VRST > 4.0V 2.4 V
VRST < 4.0V 0.7VCC V
MR input pulse width 1 µs
MR glitch rejection 100 ns
MR-to-RST delay 500 ns
MR pull-up resistance 32 63 100 kΩ
1. Valid for ambient operating temperature: TA = –40 to 125°C; VCC = 2.5 to 5.5V (except where noted).
2. Other VRST thresholds and trec timings are offered. Minimum order quantities may apply. Contact local sales office for
availability.
Table 4. DC and AC characteristics (continued)
Sym Description Test Condition (1) Min Typ Max Unit
Package mechanical data STM6315
16/21
6 Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect. The category of
second Level Interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com.
,,,,, J eu.2u@CAB fiwo JE $DV5®CAB
STM6315 Package mechanical data
17/21
Figure 14. SOT143-4 – 4-lead small outline transistor package outline
Note: Drawing is not to scale.
SOT143-4
0.10C
A
A2
A1
4X
b2
C
MCAB
0.15
C
L1
θ
L
C
e1 D
e
e/2
E
M
0.15 CAB
B
E1
A
MCAB
3X b
0.20
1
Table 5. SOT143-4 – 4-lead small outline transistor package mechanical data
Symbol
mm inches
Typ Min Max Typ Min Max
A 0.89 1.12 0.035 0.044
A1 0.01 0.10 0.001 0.004
A2 0.88 1.02 0.035 0.042
b 0.37 0.51 0.015 0.020
b2 0.76 0.94 0.030 0.037
C 0.09 0.18 0.004 0.007
D 2.80 3.04 0.110 0.120
E 2.10 2.64 0.083 0.104
E1 1.20 1.40 0.047 0.055
e1.92– –0.076– –
e1 0.20 – 0.008 –
L0.55– –0.022– –
L1 0.40 0.60 0.016 0.024
Θ0° 10° 0° 10°
N4 4
j
Part numbering STM6315
18/21
7 Part numbering
Table 6. Ordering information scheme
Note: For other options, or for more information on any aspect of this device, please contact the
ST Sales Office nearest you.
Example: STM6315 R D W1 3 F
Device Type
STM6315
Reset Threshold Voltage (1)
1. Other VRST thresholds and trec timings are offered. Minimum order quantities may apply. Contact local
sales office for availability.
L = VRST = 4.63V
M = VRST = 4.38V
S = VRST = 2.93V
R = VRST = 2.63V
RST Pulse Width (1)
A = trec = 1.5ms
B = trec = 30ms
D = trec = 210ms
G = trec = 1680ms
Package
W1 = SOT143-4
Temperature Range
3 = –40 to 125°C
Shipping Method
F = ECOPACK Package, Tape & Reel
STM6315 Part numbering
19/21
Table 7. Marking description
Part Number Reset Threshold (1)
(V)
1. Other VRST thresholds and trec timings are offered. Minimum order quantities may apply. Contact local
sales office for availability.
RST Pulse Width (1)
(ms) Output Topside
Marking (2)
2. Where "x" = Assembly Work Week (A to Z), such that "A" = WW01-02, "B" = WW03-04, and so forth.
STM6315LB 4.63 30 Open drain RST 9LBx
STM6315MD 4.38 210 Open drain RST 9MDx
STM6315SD 2.93 210 Open drain RST 9SDx
STM6315RA 2.63 1.5 Open drain RST 9RAx
STM6315RB 2.63 30 Open drain RST 9RBx
STM6315RD 2.63 210 Open drain RST 9RDx
STM6315RG 2.63 1680 Open drain RST 9RGx
Revision history STM6315
20/21
8 Revision history
Table 8. Document revision history
Date Revision Changes
14-Nov-2005 1.0 First edition.
08-Feb-2006 2.0 Update template, characteristics, marking (Figure 7, 8, 9, 10, and 11;
Tab le 4, 6, and 7).
12-Apr-2006 3 Updated characteristics (Figure 7, 8, and 11; Table 4, 6, and 7).
27-Jul-2006 4 Updated Ta bl e 3 , 5 and 6.
21-Mar-2007 5 Updated Ta bl e 2 , 6, and 7.
STM6315
21/21
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