TS4962 Datasheet by STMicroelectronics

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This is information on a product in full production.
March 2020 DocID10968 Rev 9 1/44
TS4962
2.8 W filter-free mono class D audio power amplifier
Datasheet
-
production data
Features
Operating from V
CC
= 2.4 V to 5.5 V
Standby mode active low
Output power: 2.8 W into 4 and 1.7 W into
8with 10% THD+N maximum and 5 V power
supply
Output power: 2.2 W at 5 V or 0.7 W at 3.0 V
into 4 with 1% THD+N maximum
Output power: 1.4 W at 5 V or 0.5 W at 3.0 V
into 8 with 1% THD+N maximum
Adjustable gain via external resistors
Low current consumption 2 mA at 3 V
Efficiency: 88% typical
Signal to noise ratio: 85 dB typical
PSRR: 63 dB typical at 217 Hz with 6 dB gain
PWM base frequency: 280 kHz
Low pop and click noise
Available in DFN8 3 x 3 mm package
Applications
Cellular phones
PDAs
Notebook PCs
Description
The TS4962 is a differential class-D BTL power
amplifier. It can drive up to 2.2 W into a 4 load
and 1.4 W into an 8 load at 5 V. It achieves
outstanding efficiency (88% typ.) compared to
standard AB-class audio amps.
The gain of the device can be controlled via two
external gain setting resistors. Pop and click
reduction circuitry provides low on/off switch
noise while allowing the device to start within
5 ms. A standby function (active low) enables the
current consumption to be reduced to 10 nA
typical.
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Contents TS4962
2/44 DocID10968 Rev 9
Contents
1 Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 3
2 Application overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.1 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.1 Differential configuration principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.2 Gain in typical application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.3 Common-mode feedback loop limitations . . . . . . . . . . . . . . . . . . . . . . . . 31
4.4 Low frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
4.5 Decoupling of the circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
4.6 Wake-up time (t
WU
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
4.7 Shutdown time (t
STBY
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
4.8 Consumption in standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
4.9 Single-ended input configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
4.10 Output filter considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
4.11 Several examples with summed inputs . . . . . . . . . . . . . . . . . . . . . . . . . . 35
4.11.1 Example 1: dual differential inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
4.11.2 Example 2: one differential input plus one single-ended input . . . . . . . . 36
5 Demonstration board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
6 Recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
7 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
8 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
DocID10968 Rev 9 3/44
TS4962 Absolute maximum ratings and operating conditions
44
1 Absolute maximum ratings and operating conditions
Table 1. Absolute maximum ratings
Symbol Parameter Value Unit
V
CC
Supply voltage
(1) (2)
1. Caution: this device is not protected in the event of abnormal operating conditions such as short-circuiting
between any one output pin and ground or between any one output pin and V
CC
, and between individual
output pins.
2. All voltage values are measured with respect to the ground pin.
6 V
V
i
Input voltage
(3)
3. The magnitude of the input signal must never exceed V
CC
+ 0.3 V/GND - 0.3 V.
GND to V
CC
V
T
oper
Operating free air temperature range -40 to + 85 °C
T
stg
Storage temperature -65 to +150 °C
T
j
Maximum junction temperature 150 °C
R
thja
Thermal resistance junction to ambient
DFN8 package 120 °C/W
Pd Power dissipation Internally limited
(4)
4. Exceeding the power derating curves during a long period will provoke abnormal operation.
ESD
Human body model
(5)
5. Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a
1.5 kresistor between two pins of the device. This is done for all couples of connected pin combinations
while the other pins are floating.
2 kV
Machine model
(6)
6. Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between
two pins of the device with no external series resistor (internal resistor < 5 ). This is done for all couples of
connected pin combinations while the other pins are floating.
200 V
Charged device model
(7)
7. Charged device model: all pins and the package are charged together to the specified voltage and then
discharged directly to the ground through only one pin. This is done for all pins.
Latch-up Latch-up immunity 200 mA
V
STBY
Standby pin maximum voltage
(8)
8. The magnitude of the standby signal must never exceed V
CC
+ 0.3 V/GND - 0.3 V.
GND to V
CC
V
Lead temperature (soldering, 10sec) 260 °C
Table 2. Dissipation ratings
Package Derating factor Power rating at 25°C Power rating at 85°C
DFN8 20 mW/°C 2.5 W 1.3 W
Absolute maximum ratings and operating conditions TS4962
4/44 DocID10968 Rev 9
Table 3. Operating conditions
Symbol Parameter Value Unit
V
CC
Supply voltage
(1)
1. For V
CC
between 2.4 V and 2.5 V, the operating temperature range is reduced to 0°C
T
amb
70°C.
2.4 to 5.5 V
V
IC
Common mode input voltage range
(2)
2. For V
CC
between 2.4V and 2.5V, the common mode input range must be set at V
CC
/2.
0.5 to V
CC
-0.8 V
V
STBY
Standby voltage input:
(3)
Device ON
Device OFF
3. Without any signal on V
STBY
, the device will be in standby.
1.4
V
STBY
V
CC
GND
V
STBY
0.4
(4)
4. Minimum current consumption is obtained when V
STBY
= GND.
V
R
L
Load resistor 4
R
thja
Thermal resistance junction to ambient
DFN8 package
(5)
5. When mounted on a 4-layer PCB.
50 °Χ/Ω
DocID10968 Rev 9 5/44
TS4962 Application overview
44
2 Application overview
Table 4. External component information
Component Functional description
C
S
Bypass supply capacitor. Install as close as possible to the TS4962 to
minimize high-frequency ripple. A 100 nF ceramic capacitor should be added
to enhance the power supply filtering at high frequencies.
R
in
Input resistor used to program the TS4962’s differential gain
(gain = 300 k/R
in
with R
in
in k).
Input capacitor
Because of common-mode feedback, these input capacitors are optional.
However, they can be added to form with R
in
a 1st order high-pass filter with
-3 dB cut-off frequency = 1/(2*
π
*R
in
*C
in
).
Table 5. Pin description
Pin number Pin name Description
1 STBY Standby input pin (active low)
2 NC No internal connection pin
3 IN+ Positive input pin
4 IN- Negative input pin
5 OUT+ Positive output pin
6 VCC Power supply input pin
7 GND Ground input pin
8 OUT- Negative output pin
Exposed pad Exposed pad can be connected to ground (pin 7) or left
floating
Application overview TS4962
6/44 DocID10968 Rev 9
Figure 1. Typical application schematics
Rin
Rin
Cs
1u
GND
GND
GND
Vcc
Vcc
SPEAKER
capacitors
Input
are optional
+
-
Differential
Input
In+
GND
In-
GND
In-
Stdby
In+
Out-
Out+
Vcc
1
4
3
7
8
6
5
GND
Internal
Bias
PWM
Output
Bridge
H
Oscillator
150k
150k
+
-
300k
Rin
Rin
Cs
1u
GND
GND
GND
Vcc
Vcc
+
-
Differential
Input
capacitors
Input
are optional
In+
GND
In-
GND
2µF
15µH
15µH
Load
4 Ohms LC Output Filter
8 Ohms LC Output Filter
2µF
GND
1µF
30µH
30µH
1µF
GND
In-
Stdby
In+
Out-
Out+
Vcc
1
4
3
7
8
6
5
GND
Internal
Bias
PWM
Output
Bridge
H
Oscillator
150k
150k
+
-
300k
m m m
DocID10968 Rev 9 7/44
TS4962 Electrical characteristics
44
3 Electrical characteristics
Table 6. Electrical characteristics at V
CC
= +5 V,
with GND = 0 V, V
icm
= 2.5 V, and T
amb
= 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Unit
I
CC
Supply current
No input signal, no load 2.3 3.3 mA
I
STBY
Standby current
(1)
No input signal, V
STBY
= GND 10 1000 nA
V
oo
Output offset voltage
No input signal, R
L
= 8 3 25 mV
P
out
Output power, G = 6 dB
THD = 1% max, f = 1 kHz, R
L
= 4
THD = 10% max, f = 1 kHz, R
L
= 4
THD = 1% max, f = 1 kHz, R
L
= 8
THD = 10% max, f = 1 kHz, R
L
= 8
2.2
2.8
1.4
1.7
W
THD + N
Total harmonic distortion + noise
P
out
= 850 mW
RMS
, G = 6 dB, 20 Hz < f < 20 kHz
R
L
= 8 W + 15 µH, BW < 30 kHz
P
out
= 1 W
RMS
, G = 6 dB, f = 1 kHz
R
L
= 8 W + 15 µH, BW < 30 kHz
2
0.4
%
Efficiency
Efficiency
P
out
= 2 W
RMS
, R
L
= 4 W + ³ 15 µH
P
out
= 1.2 W
RMS
, R
L
= 8 W+ ³ 15 µH
78
88
%
PSRR Power supply rejection ratio with inputs grounded
(2)
f = 217 Hz, R
L
= 8 Ω, G = 6 dB, V
ripple
= 200 mV
pp
63 dB
CMRR Common mode rejection ratio
f = 217 Hz, R
L
= 8 Ω, G = 6 dB, Vic = 200 mV
pp
57 dB
Gain Gain value (R
in
in k) V/V
R
STBY
Internal resistance from standby to GND 273 300 327 k
F
PWM
Pulse width modulator base frequency 200 280 360 kHz
SNR Signal to noise ratio (A weighting),
P
out
= 1.2 W, R
L
= 8 85 dB
t
WU
Wake-up time 5 10 ms
t
STBY
Standby time 5 10 ms
273k
Rin
------------------
300k
Rin
------------------
327k
Rin
------------------
Electrical characteristics TS4962
8/44 DocID10968 Rev 9
V
N
Output voltage noise f = 20 Hz to 20 kHz, G = 6 dB
µV
RMS
Unweighted R
L
= 4
A-weighted R
L
= 4 85
60
Unweighted R
L
= 8
A-weighted R
L
= 8 86
62
Unweighted R
L
= 4 + 15 µH
A-weighted R
L
= 4 + 15 µH
83
60
Unweighted R
L
= 4 + 30 µH
A-weighted R
L
= 4 + 30 µH
88
64
Unweighted R
L
= 8 + 30 µH
A-weighted R
L
= 8 + 30 µH
78
57
Unweighted R
L
= 4 + filter
A-weighted R
L
= 4 + filter
Unweighted R
L
= 4 + filter
A-weighted R
L
= 4 + filter
87
65
82
59
1. Standby mode is active when V
STBY
is tied to GND.
2. Dynamic measurements - 20*log(rms(V
out
)/rms(V
ripple
)). V
ripple
is the superimposed sinusoidal signal to
V
CC
at f = 217 Hz.
Table 6. Electrical characteristics at V
CC
= +5 V,
with GND = 0 V, V
icm
= 2.5 V, and T
amb
= 25°C (unless otherwise specified)
(continued)
Symbol Parameter Min. Typ. Max. Unit
M); m
DocID10968 Rev 9 9/44
TS4962 Electrical characteristics
44
Table 7. Electrical characteristics at V
CC
= +4.2 V with GND = 0 V, V
icm
= 2.1 V and
T
amb
= 25°C (unless otherwise specified)
(1)
Symbol Parameter Min. Typ. Max. Unit
I
CC
Supply current
No input signal, no load 2.1 3 mA
I
STBY
Standby current
(2)
No input signal, V
STBY
= GND 10 1000 nA
V
oo
Output offset voltage
No input signal, R
L
= 8 3 25 mV
P
out
Output power, G = 6 dB
THD = 1% max, f = 1 kHz, R
L
= 4
THD = 10% max, f = 1 kHz, R
L
= 4
THD = 1% max, f = 1 kHz, R
L
= 8
THD = 10% max, f = 1 kHz, R
L
= 8
1.5
1.95
0.9
1.1
W
THD + N
Total harmonic distortion + noise
P
out
= 600 mW
RMS
, G = 6 dB, 20 Hz < f < 20 kHz
R
L
= 8 W + 15 µH, BW < 30 kHz
P
out
= 700 mW
RMS
, G = 6 dB, f = 1 kHz
R
L
= 8 W + 15 µH, BW < 30 kHz
2
0.35
%
Efficiency
Efficiency
P
out
= 1.45 W
RMS
, R
L
= 4 Ω + ≥ 15 µH
P
out
= 0.9 W
RMS
, R
L
= 8 W+ ³ 15 µH
78
88
%
PSRR Power supply rejection ratio with inputs grounded
(3)
f = 217 Hz, R
L
= 8 Ω, G = 6 dB, V
ripple
= 200 mV
pp
63 dB
CMRR Common mode rejection ratio
f = 217 Hz, R
L
= 8 Ω, G = 6 dB, Vic = 200 mV
pp
57 dB
Gain Gain value (R
in
in k) V/V
R
STBY
Internal resistance from standby to GND 273 300 327 k
F
PWM
Pulse width modulator base frequency 200 280 360 kHz
SNR Signal to noise ratio (A-weighting)
P
out
= 0.8 W, R
L
= 8 85 dB
t
WU
Wake-up time 5 10 ms
t
STBY
Standby time 5 10 ms
273k
Rin
------------------
300k
Rin
------------------
Electrical characteristics TS4962
10/44 DocID10968 Rev 9
V
N
Output voltage noise f = 20 Hz to 20 kHz, G = 6 dB
µV
RMS
Unweighted R
L
= 4
A-weighted R
L
= 4
85
60
Unweighted R
L
= 8
A-weighted R
L
= 8
86
62
Unweighted R
L
= 4 + 15 µH
A-weighted R
L
= 4 + 15 µH
83
60
Unweighted R
L
= 4 + 30 µH
A-weighted R
L
= 4 + 30 µH
88
64
Unweighted R
L
= 8 + 30 µH
A-weighted R
L
= 8 + 30 µH
78
57
Unweighted R
L
= 4 + filter
A-weighted R
L
= 4 + filter
Unweighted R
L
= 4 + filter
A-weighted R
L
= 4 + filter
87
65
82
59
1. All electrical values are guaranteed with correlation measurements at 2.5 V and 5 V.
2. Standby mode is active when V
STBY
is tied to GND.
3. Dynamic measurements - 20*log(rms(V
out
)/rms(V
ripple
)). V
ripple
is the superimposed sinusoidal signal to
V
CC
at f = 217 Hz.
Table 7. Electrical characteristics at V
CC
= +4.2 V with GND = 0 V, V
icm
= 2.1 V and
T
amb
= 25°C (unless otherwise specified)
(1)
(continued)
Symbol Parameter Min. Typ. Max. Unit
ms m
DocID10968 Rev 9 11/44
TS4962 Electrical characteristics
44
Table 8. Electrical characteristics at V
CC
= +3.6 V
with GND = 0 V, V
icm
= 1.8 V, T
amb
= 25°C (unless otherwise specified)
(1)
Symbol Parameter Min. Typ. Max. Unit
I
CC
Supply current
No input signal, no load 2 2.8 mA
I
STBY
Standby current
(2)
No input signal, V
STBY
= GND 10 1000 nA
V
oo
Output offset voltage
No input signal, R
L
= 8 3 25 mV
P
out
Output power, G = 6 dB
THD = 1% max, f = 1 kHz, R
L
= 4
THD = 10% max, f = 1 kHz, R
L
= 4
THD = 1% max, f = 1 kHz, R
L
= 8
THD = 10% max, f = 1 kHz, R
L
= 8
1.1
1.4
0.7
0.85
W
THD + N
Total harmonic distortion + noise
P
out
= 450 mW
RMS
, G = 6 dB, 20 Hz < f < 20 kHz
R
L
= 8 + 15 µH, BW < 30 kHz
P
out
= 500 mW
RMS
, G = 6 dB, f = 1 kHz
R
L
= 8 + 15 µH, BW < 30 kHz
2
0.1
%
Efficiency
Efficiency
P
out
= 1 W
RMS
, R
L
= 4 Ω + ≥ 15 µH
P
out
= 0.65 W
RMS
, R
L
= 8 + ³ 15 µH
78
88
%
PSRR Power supply rejection ratio with inputs grounded
(3)
f = 217 Hz, R
L
= 8 Ω, G = 6 dB, V
ripple
= 200 mV
pp
62 dB
CMRR Common mode rejection ratio
f = 217 Hz, R
L
= 8 Ω, G = 6 dB, Vic = 200 mV
pp
56 dB
Gain Gain value (R
in
in k) V/V
R
STBY
Internal resistance from standby to GND 273 300 327 k
F
PWM
Pulse width modulator base frequency 200 280 360 kHz
SNR Signal to noise ratio (A-weighting)
P
out
= 0.6 W, R
L
= 8 83 dB
t
WU
Wake-up time 5 10 ms
t
STBY
Standby time 5 10 ms
273k
Rin
------------------
300k
Rin
------------------
Electrical characteristics TS4962
12/44 DocID10968 Rev 9
V
N
Output voltage noise f = 20 Hz to 20 kHz, G = 6 dB
µV
RMS
Unweighted R
L
= 4
A-weighted R
L
= 4
83
57
Unweighted R
L
= 8
A-weighted R
L
= 8
83
61
Unweighted R
L
= 4 + 15 µH
A-weighted R
L
= 4 + 15 µH
81
58
Unweighted R
L
= 4 + 30 µH
A-weighted R
L
= 4 + 30 µH
87
62
Unweighted R
L
= 8 + 30 µH
A-weighted R
L
= 8 + 30 µH
77
56
Unweighted R
L
= 4 + filter
A-weighted R
L
= 4 + filter
Unweighted R
L
= 4 + filter
A-weighted R
L
= 4 + filter
85
63
80
57
1. All electrical values are guaranteed with correlation measurements at 2.5 V and 5 V.
2. Standby mode is activated when V
STBY
is tied to GND.
3. Dynamic measurements - 20*log(rms(V
out
)/rms(V
ripple
)). V
ripple
is the superimposed sinusoidal signal to
V
CC
at f = 217 Hz.
Table 8. Electrical characteristics at V
CC
= +3.6 V
with GND = 0 V, V
icm
= 1.8 V, T
amb
= 25°C (unless otherwise specified)
(1)
(continued)
Symbol Parameter Min. Typ. Max. Unit
m;
DocID10968 Rev 9 13/44
TS4962 Electrical characteristics
44
Table 9. Electrical characteristics at V
CC
= +3.0 V
with GND = 0 V, V
icm
= 1.5 V, T
amb
= 25°C (unless otherwise specified)
(1)
Symbol Parameter Min. Typ. Max. Unit
I
CC
Supply current
No input signal, no load 1.9 2.7 mA
I
STBY
Standby current
(2)
No input signal, V
STBY
= GND 10 1000 nA
V
oo
Output offset voltage
No input signal, R
L
= 8 3 25 mV
P
out
Output power, G = 6 dB
THD = 1% max, f = 1 kHz, R
L
= 4
THD = 10% max, f = 1 kHz, R
L
= 4
THD = 1% max, f = 1 kHz, R
L
= 8
THD = 10% max, f = 1 kHz, R
L
= 8
0.7
1
0.5
0.6
W
THD + N
Total harmonic distortion + noise
P
out
= 300 mW
RMS
, G = 6 dB, 20 Hz < f < 20 kHz
R
L
= 8 Ω + 15 µH, BW < 30 kHz
P
out
= 350 mW
RMS
, G = 6 dB, f = 1 kHz
R
L
= 8 W + 15 µH, BW < 30 kHz
2
0.1
%
Efficiency
Efficiency
P
out
= 0.7 W
RMS
, R
L
= 4 Ω + ≥ 15 µH
P
out
= 0.45 W
RMS
, R
L
= 8 + ³ 15 µH
78
88
%
PSRR Power supply rejection ratio with inputs grounded
(3)
f = 217 Hz, R
L
= 8 Ω, G = 6 dB, V
ripple
= 200 mV
pp
60 dB
CMRR Common mode rejection ratio
f = 217 Hz, R
L
= 8 Ω, G = 6 dB, V
ic
= 200 mV
pp
54 dB
Gain Gain value (R
in
in k) V/V
R
STBY
Internal resistance from standby to GND 273 300 327 k
F
PWM
Pulse width modulator base frequency 200 280 360 kHz
SNR Signal to noise ratio (A-weighting)
P
out
= 0.4 W, R
L
= 8 82 dB
t
WU
Wake-up time 5 10 ms
t
STBY
Standby time 5 10 ms
273k
Rin
------------------
300k
Rin
------------------
327k
Rin
------------------
Electrical characteristics TS4962
14/44 DocID10968 Rev 9
V
N
Output voltage noise f = 20 Hz to 20 kHz, G = 6 dB
µV
RMS
Unweighted R
L
= 4
A-weighted R
L
= 4
83
57
Unweighted R
L
= 8
A-weighted R
L
= 8
83
61
Unweighted R
L
= 4 + 15 µH
A-weighted R
L
= 4 + 15 µH
81
58
Unweighted R
L
= 4 + 30 µH
A-weighted R
L
= 4 + 30 µH
87
62
Unweighted R
L
= 8 + 30 µH
A-weighted R
L
= 8 + 30 µH
77
56
Unweighted R
L
= 4 + filter
A-weighted R
L
= 4 + filter
Unweighted R
L
= 4 + filter
A-weighted R
L
= 4 + filter
85
63
80
57
1. All electrical values are guaranteed with correlation measurements at 2.5 V and 5 V.
2. Standby mode is active when V
STBY
is tied to GND.
3. Dynamic measurements - 20*log(rms(V
out
)/rms(V
ripple
)). V
ripple
is the superimposed sinusoidal signal to
V
CC
at f = 217 Hz.
Table 9. Electrical characteristics at V
CC
= +3.0 V
with GND = 0 V, V
icm
= 1.5 V, T
amb
= 25°C (unless otherwise specified)
(1)
(continued)
Symbol Parameter Min. Typ. Max. Unit
ms m
DocID10968 Rev 9 15/44
TS4962 Electrical characteristics
44
Table 10. Electrical characteristics at V
CC
= +2.5 V
with GND = 0 V, V
icm
= 1.25V, T
amb
= 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Unit
I
CC
Supply current
No input signal, no load 1.7 2.4 mA
I
STBY
Standby current
(1)
No input signal, V
STBY
= GND 10 1000 nA
V
oo
Output offset voltage
No input signal, R
L
= 8 3 25 mV
P
out
Output power, G = 6 dB
THD = 1% max, f = 1 kHz, R
L
= 4
THD = 10% max, f = 1 kHz, R
L
= 4
THD = 1% max, f = 1 kHz, R
L
= 8
THD = 10% max, f = 1 kHz, R
L
= 8
0.5
0.65
0.33
0.41
W
THD + N
Total harmonic distortion + noise
P
out
= 180 mW
RMS
, G = 6 dB, 20 Hz < f < 20 kHz
R
L
= 8 Ω + 15 µH, BW < 30 kHz
P
out
= 200 mW
RMS
, G = 6 dB, f = 1 kHz
R
L
= 8 + 15 µH, BW < 30 kHz
1
0.05
%
Efficiency
Efficiency
P
out
= 0.47 W
RMS
, R
L
= 4 Ω + ³ 15 µH
P
out
= 0.3 W
RMS
, R
L
= 8 + ³ 15 µH
78
88
%
PSRR Power supply rejection ratio with inputs grounded
(2)
f = 217 Hz, R
L
= 8 Ω, G = 6 dB, V
ripple
= 200 mV
pp
60 dB
CMRR Common mode rejection ratio
f = 217 Hz, R
L
= 8 Ω, G = 6 dB, V
ic
= 200 mV
pp
54 dB
Gain Gain value (R
in
in k) V/V
R
STBY
Internal resistance from standby to GND 273 300 327 k
F
PWM
Pulse width modulator base frequency 200 280 360 kHz
SNR Signal to noise ratio (A-weighting)
P
out
= 0.3 W, R
L
= 8 80 dB
t
WU
Wake-up time 5 10 ms
t
STBY
Standby time 5 10 ms
273k
Rin
------------------
300k
Rin
------------------
Electrical characteristics TS4962
16/44 DocID10968 Rev 9
V
N
Output voltage noise f = 20 Hz to 20 kHz, G = 6 dB
µV
RMS
Unweighted R
L
= 4
A-weighted R
L
= 4
85
60
Unweighted R
L
= 8
A-weighted R
L
= 8
86
62
Unweighted R
L
= 4 + 15 µH
A-weighted R
L
= 4 + 15 µH
76
56
Unweighted R
L
= 4 + 30 µH
A-weighted R
L
= 4 + 30 µH
82
60
Unweighted R
L
= 8 + 30 µH
A-weighted R
L
= 8 + 30 µH
67
53
Unweighted R
L
= 4 + filter
A-weighted R
L
= 4 + filter
Unweighted R
L
= 4 + filter
A-weighted R
L
= 4 + filter
78
57
74
54
1. Standby mode is active when V
STBY
is tied to GND.
2. Dynamic measurements - 20*log(rms(V
out
)/rms(V
ripple
)). V
ripple
is the superimposed sinusoidal signal to
V
CC
at f = 217 Hz.
Table 10. Electrical characteristics at V
CC
= +2.5 V
with GND = 0 V, V
icm
= 1.25V, T
amb
= 25°C (unless otherwise specified)
(continued)
Symbol Parameter Min. Typ. Max. Unit
m; m
DocID10968 Rev 9 17/44
TS4962 Electrical characteristics
44
Table 11. Electrical characteristics at V
CC
+2.4 V
with GND = 0 V, V
icm
= 1.2 V, T
amb
= 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Unit
I
CC
Supply current
No input signal, no load 1.7 mA
I
STBY
Standby current
(1)
No input signal, V
STBY
= GND 10 nA
V
oo
Output offset voltage
No input signal, R
L
= 8 3 mV
P
out
Output power, G = 6 dB
THD = 1% max, f = 1 kHz, R
L
= 4
THD = 10% max, f = 1 kHz, R
L
= 4
THD = 1% max, f = 1 kHz, R
L
= 8
THD = 10% max, f = 1 kHz, R
L
= 8
0.42
0.61
0.3
0.38
W
THD + N
Total harmonic distortion + noise
P
out
= 150 mW
RMS
, G = 6 dB, 20 Hz < f < 20 kHz
R
L
= 8 Ω + 15 µH, BW < 30 kHz
1 %
Efficiency
Efficiency
P
out
= 0.38 W
RMS
, R
L
= 4 + ³ 15 µH
P
out
= 0.25 W
RMS
, R
L
= 8 + ³ 15 µH
77
86
%
CMRR Common mode rejection ratio
f = 217 Hz, R
L
= 8 Ω, G = 6 dB, V
ic
= 200 mV
pp
54 dB
Gain Gain value (R
in
in k) V/V
R
STBY
Internal resistance from standby to GND 273 300 327 k
F
PWM
Pulse width modulator base frequency 280 kHz
SNR Signal to noise ratio (A-weighting)
P
out
= 0.25 W, R
L
= 8 80 dB
t
WU
Wake-up time 5 ms
t
STBY
Standby time 5 ms
273k
Rin
------------------
300k
Rin
------------------
Electrical characteristics TS4962
18/44 DocID10968 Rev 9
V
N
Output voltage noise f = 20 Hz to 20 kHz, G = 6 dB
µV
RMS
Unweighted R
L
= 4
A-weighted R
L
= 4
85
60
Unweighted R
L
= 8
A-weighted R
L
= 8
86
62
Unweighted R
L
= 4 + 15 µH
A-weighted R
L
= 4 + 15 µH
76
56
Unweighted R
L
= 4 + 30 µH
A-weighted R
L
= 4 + 30 µH
82
60
Unweighted R
L
= 8 + 30 µH
A-weighted R
L
= 8 + 30 µH
67
53
Unweighted R
L
= 4 + filter
A-weighted R
L
= 4 + filter
Unweighted R
L
= 4 + filter
A-weighted R
L
= 4 + filter
78
57
74
54
1. Standby mode is active when V
STBY
is tied to GND.
Table 11. Electrical characteristics at V
CC
+2.4 V
with GND = 0 V, V
icm
= 1.2 V, T
amb
= 25°C (unless otherwise specified)
(continued)
Symbol Parameter Min. Typ. Max. Unit
DocID10968 Rev 9 19/44
TS4962 Electrical characteristics
44
3.1 Electrical characteristics curves
The graphs shown in this section use the following abbreviations.
R
L
+ 15
µ
H or 30
µ
H = pure resistor + very low series resistance inductor
Filter = LC output filter (1 µF + 30 µH for 4 and 0. 5µF + 60 µH for 8 )
All measurements are done with C
S1
= 1 µF and C
S2
= 100 nF (see Figure 2), except for the
PSRR where C
S1
is removed (see Figure 3).
Figure 2. Schematic used for test measurements
Figure 3. Schematic used for PSSR measurements
In+
In-
Rin
150k
Rin
150k
Cin
Cin
GND
Vcc
+
Cs1
1uF
GND
Cs2
100nF
GND
RL
4 or 8 Ohms
15uH or 30uH
or
LC Filter
5th order
50kHz low pass
filter
Audio Measurement
Bandwidth < 30kHz
Out+
Out-
TS4962
In+
In-
Rin
150k
Rin
150k
4.7uF
4.7uF
GND
Cs2
100nF
GND
RL
4 or 8 Ohms
15uH or 30uH
or
LC Filter
5th order
50kHz low pass
filter
RMS Selective Measurement
Bandwidth=1% of Fmeas
Out+
Out-
TS4962
GND
5th order
50kHz low pass
filter
Reference
20Hz to 20kHz Vcc
GND
Electrical characteristics TS4962
20/44 DocID10968 Rev 9
Figure 4. Current consumption vs. power
supply voltage
Figure 5. Current consumption vs. standby
voltage
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DocID10968 Rev 9 21/44
TS4962 Electrical characteristics
44
Figure 10. Efficiency vs. output power Figure 11. Efficiency vs. output power
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Figure 12. Output power vs. power supply
voltage
Figure 13. Output power vs. power supply
voltage
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Electrical characteristics TS4962
22/44 DocID10968 Rev 9
Figure 16. PSRR vs. frequency Figure 17. PSRR vs. frequency
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Figure 21. CMRR vs. frequency
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\me1200m \ we 1% NF 5. \me1200m \ we 1% NF 5.
DocID10968 Rev 9 23/44
TS4962 Electrical characteristics
44
Figure 22. CMRR vs. frequency Figure 23. CMRR vs. frequency
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Figure 24. CMRR vs. frequency Figure 25. CMRR vs. frequency
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Figure 26. CMRR vs. frequency Figure 27. CMRR vs. common mode input
voltage
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Electrical characteristics TS4962
24/44 DocID10968 Rev 9
Figure 28. THD+N vs. output power Figure 29. THD+N vs. output power
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Figure 30. THD+N vs. output power Figure 31. THD+N vs. output power
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Figure 32. THD+N vs. output power Figure 33. THD+N vs. output power
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DocID10968 Rev 9 25/44
TS4962 Electrical characteristics
44
Figure 34. THD+N vs. output power Figure 35. THD+N vs. output power
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Figure 36. THD+N vs. frequency Figure 37. THD+N vs. frequency
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Figure 38. THD+N vs. frequency Figure 39. THD+N vs. frequency
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Electrical characteristics TS4962
26/44 DocID10968 Rev 9
Figure 40. THD+N vs. frequency Figure 41. THD+N vs. frequency
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Figure 42. THD+N vs. frequency Figure 43. THD+N vs. frequency
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Figure 44. THD+N vs. frequency Figure 45. THD+N vs. frequency
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RLrB 15H GrfidB urinam 7w 25
DocID10968 Rev 9 27/44
TS4962 Electrical characteristics
44
Figure 46. THD+N vs. frequency Figure 47. THD+N vs. frequency
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Figure 48. Gain vs. frequency Figure 49. Gain vs. frequency
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Electrical characteristics TS4962
28/44 DocID10968 Rev 9
Figure 52. Gain vs. frequency Figure 53. Gain vs. frequency
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Figure 54. Gain vs. frequency Figure 55. Startup and shutdown times
V
CC
= 5V, G = 6dB, C
in
= F (5ms/div)
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Vo1
Vo2
Vo1-Vo2
Standby
Figure 56. Startup and shutdown times
V
CC
= 3V, G = 6dB, C
in
= F (5ms/div)
Figure 57. Startup and shutdown times
V
CC
= 5V, G = 6dB, C
in
= 100nF (5ms/div)
Vo1
Vo2
Vo1-Vo2
Standby
Vo1
Vo2
Vo1-Vo2
Standby
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DocID10968 Rev 9 29/44
TS4962 Electrical characteristics
44
Figure 58. Startup and shutdown times
V
CC
= 3V, G = 6dB, C
in
= 100nF (5ms/div)
Figure 59. Startup and shutdown times
V
CC
= 5V, G = 6dB, No C
in
(5ms/div)
Vo1
Vo2
Vo1-Vo2
Standby
Vo1
Vo2
Vo1-Vo2
Standby
Figure 60. Startup and shutdown times
V
CC
= 3V, G = 6dB, No C
in
(5ms/div)
Vo1
Vo2
Vo1-Vo2
Standby
Application information TS4962
30/44 DocID10968 Rev 9
4 Application information
4.1 Differential configuration principle
The TS4962 is a monolithic, fully differential input/output class D power amplifier. The
TS4962 also includes a common-mode feedback loop that controls the output bias value to
average it at V
CC
/2 for any DC common-mode input voltage. This allows the device to
always have a maximum output voltage swing, and by consequence, maximize the output
power. Moreover, as the load is connected differentially compared to a single-ended
topology, the output is four times higher for the same power supply voltage.
The advantages of a fully differential amplifier are:
high PSRR (power supply rejection ratio).
high common mode noise rejection.
virtually zero pop without additional circuitry, giving a faster start-up time compared to
conventional single-ended input amplifiers.
easier interfacing with differential output audio DAC.
no input coupling capacitors required because of common-mode feedback loop.
The main disadvantage is that, since the differential function is directly linked to the external
resistor mismatching, particular attention should be paid to this mismatching in order to
obtain the best performance from the amplifier.
4.2 Gain in typical application schematic
Typical differential applications are shown in Figure 1 on page 6.
In the flat region of the frequency-response curve (no input coupling capacitor effect), the
differential gain is expressed by the relation:
with R
in
expressed in kΩ.
Due to the tolerance of the internal 150 k feedback resistor, the differential gain is in the
range (no tolerance on R
in
):
A
V
di ff
Out
+
Out
-
In
+
In
-
------------------------------- 300
R
in
----------
= =
273
R
in
---------- A
V
diff
327
R
in
----------
≤ ≤
DocID10968 Rev 9 31/44
TS4962 Application information
44
4.3 Common-mode feedback loop limitations
As explained previously, the common-mode feedback loop allows the output DC bias
voltage to be averaged at V
CC
/2 for any DC common-mode bias input voltage.
However, due to a V
icm
limitation in the input stage (see Table 3: Operating conditions on
page 4), the common-mode feedback loop can play its role only within a defined range. This
range depends upon the values of V
CC
and R
in
(A
Vdiff
). To have a good estimation of the
V
icm
value, we can apply this formula (no tolerance on R
in
):
with
And the result of the calculation must be in the range:
Due to the +/-9% tolerance on the 150 k resistor, it is also important to check V
icm
in these
conditions.
If the result of the V
icm
calculation is not in the previous range, input coupling capacitors
must be used. With V
CC
between 2.4 and 2.5 V, input coupling capacitors are mandatory.
For example:
With V
CC
= 3 V, R
in
= 150 k and V
IC
= 2.5 V, we typically find V
icm
= 2 V, which is lower than
3 V-0.8 V = 2.2 V. With 136.5 k we find 1.97 V and with 163.5 k we have 2.02 V.
Therefore, no input coupling capacitors are required.
4.4 Low frequency response
If a low frequency bandwidth limitation is requested, it is possible to use input coupling
capacitors.
In the low frequency region, C
in
(input coupling capacitor) starts to have an effect. C
in
forms,
with R
in
, a first order high-pass filter with a -3 dB cut-off frequency.
So, for a desired cut-off frequency we can calculate C
in
,
with R
in
in and F
CL
in Hz.
V
icm
V
CC
R
in
×2 V
IC
×150k×+
2 R
in
150k+( )×
---------------------------------------------------------------------------- (V)=
V
IC
In
+
In
-
+
2
--------------------- (V)=
0.5V V
icm
V
CC
0.8V≤ ≤
V
CC
R
in
×2 V
IC
×136.5k×+
2 R
in
136.5k+( )×
--------------------------------------------------------------------------------- V
ic m
V
CC
R
in
×2 V
IC
×163.5k×+
2 R
in
163.5k+( )×
---------------------------------------------------------------------------------
≤ ≤
F
CL
1
2πR
in
×C
in
×
------------------------------------ (Hz)=
C
in
1
2πR
in
×F
CL
×
-------------------------------------- (F)=
Application information TS4962
32/44 DocID10968 Rev 9
4.5 Decoupling of the circuit
A power supply capacitor, referred to as C
S
, is needed to correctly bypass the TS4962.
The TS4962 has a typical switching frequency at 250 kHz and output fall and rise time about
5 ns. Due to these very fast transients, careful decoupling is mandatory.
A 1 µF ceramic capacitor is enough, but it must be located very close to the TS4962 in order
to avoid any extra parasitic inductance being created by an overly long track wire. In relation
with dI/dt, this parasitic inductance introduces an overvoltage that decreases the global
efficiency and, if it is too high, may cause a breakdown of the device.
In addition, even if a ceramic capacitor has an adequate high frequency ESR value, its
current capability is also important. A 0603 size is a good compromise, particularly when a
4 load is used.
Another important parameter is the rated voltage of the capacitor. A 1 µF/6.3 V capacitor
used at 5 V loses about 50% of its value. In fact, with a 5 V power supply voltage, the
decoupling value is about 0.5 µF instead of 1 µF. As C
S
has particular influence on the
THD+N in the medium-high frequency region, this capacitor variation becomes decisive. In
addition, less decoupling means higher overshoots, which can be problematic if they reach
the power supply AMR value (6 V).
4.6 Wake-up time (t
WU
)
When the standby is released to set the device ON, there is a wait of about 5 ms. The
TS4962 has an internal digital delay that mutes the outputs and releases them after this time
in order to avoid any pop noise.
4.7 Shutdown time (t
STBY
)
When the standby command is set, the time required to put the two output stages into high
impedance and to put the internal circuitry in standby mode is about 5 ms. This time is used
to decrease the gain and avoid any pop noise during the shutdown phase.
4.8 Consumption in standby mode
Between the standby pin and GND there is an internal 300 k resistor. This resistor forces
the TS4962 to be in standby mode when the standby input pin is left floating.
However, this resistor also introduces additional power consumption if the standby pin
voltage is not 0 V.
For example, with a 0.4 V standby voltage pin, Table 3 on page 4 shows that you must add
0.4 V/300 k= 1.3 µA typical (0.4 V/273 k= 1.46 µA maximum) to the standby current
specified in Table 5 on page 5.
(ab? :93
DocID10968 Rev 9 33/44
TS4962 Application information
44
4.9 Single-ended input configuration
It is possible to use the TS4962 in a single-ended input configuration. However, input
coupling capacitors are needed in this configuration. Figure 61 shows a typical single-ended
input application.
Figure 61. Single-ended input typical application
All formulas are identical except for the gain with R
in
in k.
Due to the internal resistor tolerance we have:
In the event that multiple single-ended inputs are summed, it is important that the
impedance on both TS4962 inputs (In
-
and In
+
) be equal.
Figure 62. Typical application schematic with multiple single-ended inputs
Rin
Rin
Cs
1u
GND
GND
Vcc
SPEAKER
Cin
Cin
Ve
GND
GND
Standby
In-
Stdby
In+
Out-
Out+
Vcc
1
4
3
7
8
6
5
GND
Internal
Bias
PWM
Output
Bridge
H
Oscillator
150k
150k
+
-
300k
A
V
gl esin
V
e
Out
+
Out
-
------------------------------- 300
R
in
----------
= =
273
R
in
---------- A
V
glesin
327
R
in
----------
≤ ≤
Rin1
Req
Cs
1u
GND
GND
Vcc
SPEAKER
Cin1
Ceq
Ve1
GND
GND
Standby
Rink
Cink
Vek
GND
In-
Stdby
In+
Out-
Out+
Vcc
1
4
3
7
8
6
5
GND
Internal
Bias
PWM
Output
Bridge
H
Oscillator
150k
150k
+
-
300k
Application information TS4962
34/44 DocID10968 Rev 9
We have the following equations.
In general, for mixed situations (single-ended and differential inputs) it is best to use the
same rule, that is, equalize impedance on both TS4962 inputs.
4.10 Output filter considerations
The TS4962 is designed to operate without an output filter. However, due to very sharp
transients on the TS4962 output, EMI-radiated emissions may cause some standard
compliance issues.
These EMI standard compliance issues can appear if the distance between the TS4962
outputs and the loudspeaker terminal is long (typically more than 50 mm, or 100 mm in both
directions, to the speaker terminals). As the PCB layout and internal equipment device are
different for each configuration, it is difficult to provide a one-size-fits-all solution.
However, to decrease the probability of EMI issues, there are several simple rules to follow.
Reduce, as much as possible, the distance between the TS4962 output pins and the
speaker terminals.
Use ground planes for "shielding" sensitive wires.
Place, as close as possible to the TS4962 and in series with each output, a ferrite bead
with a rated current of at least 2.5 A and an impedance greater than 50 at
frequencies above 30 MHz. If, after testing, these ferrite beads are not necessary,
replace them by a short-circuit.
Allow enough footprint to place, if necessary, a capacitor to short perturbations to
ground (see Figure 63).
Figure 63. Method for shorting perturbations to ground
Out+Out-
Ve1
300
Rin1
-------------
× Vek
300
Rink
-------------
× (V)+ +=
Ceq
k
Σ
j 1=
Cin
i
=
Cin
i
1
2
π
R
ini
F××× CL
i
----------------------------------------------------- (F)=
R
eq
1
1
R
ini
----------
j 1=
k
-------------------
=
Ferrite chip bead
about 100pF
Gnd
From TS4962 output
To speaker
3% fie FEE E:
DocID10968 Rev 9 35/44
TS4962 Application information
44
In the case where the distance between the TS4962 output and the speaker terminals is
high, it is possible to observe low frequency EMI issues due to the fact that the typical
operating frequency is 250 kHz. In this configuration, we recommend using an output filter
(as represented in Figure 1 on page 6). It should be placed as close as possible to the
device.
4.11 Several examples with summed inputs
4.11.1 Example 1: dual differential inputs
Figure 64. Typical application schematic with dual differential inputs
With (R
i
in k):
R1
R1
Cs
1u
GND
GND
Vcc
SPEAKER
Standby
R2
R2
E1+
E1-
E2-
E2+
In-
Stdby
In+
Out-
Out+
Vcc
1
4
3
7
8
6
5
GND
Internal
Bias
PWM
Output
Bridge
H
Oscillator
150k
150k
+
-
300k
A
V
1
Out
+
Out
-
E
1
+
E
1
-
------------------------------- 300
R
1
----------
= =
A
V
2
Out
+
Out
-
E
2
+
E
2
-
------------------------------- 300
R
2
----------
= =
0.5V V
CC
R
1
×R
2
300 V
IC 1
R
2
V
IC 2
+×R
1
×( )×+×
300 R
1
R
2
+( ) 2 R
1
×R
2
×+×
--------------------------------------------------------------------------------------------------------------------------- V
CC
0.8V≤ ≤
V
IC
1
E
1
+
E
1
-
+
2
------------------------
= and V
IC
2
E
2
+
E
2
-
+
2
------------------------
=
Wimp fie FEE \ SE
Application information TS4962
36/44 DocID10968 Rev 9
4.11.2 Example 2: one differential input plus one single-ended input
Figure 65. Typical application schematic with one differential input and one
single-ended input
With (R
i
in kΩ):
R1
R2
Cs
1u
GND
GND
Vcc
SPEAKER
Standby
R2
R1
E1+
E2-
E2+
C1
C1
GND
In-
Stdby
In+
Out-
Out+
Vcc
1
4
3
7
8
6
5
GND
Internal
Bias
PWM
Output
Bridge
H
Oscillator
150k
150k
+
-
300k
A
V
1
Out
+
Out
-
E
1
+
------------------------------- 300
R
1
----------
= =
A
V
2
Out
+
Out
-
E
2
+
E
2
-
------------------------------- 300
R
2
----------
= =
C
1
1
2πR
1
×F
CL
×
------------------------------------ (F)=
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DocID10968 Rev 9 37/44
TS4962 Demonstration board
44
5 Demonstration board
A demonstration board for the TS4962 is available. For more information about this
demonstration board, refer to the application note AN2406 "TS4962IQ class D audio
amplifier evaluation board user guidelines" available on www.st.com.
Figure 66. Schematic diagram of mono class D demonstration board for the TS4962
DFN package
Figure 67. Top view
C1
100nF
C2
100nF
GND
Vcc
Vcc
GND
GND
C3
1uF
GND
R1
150k
R2
150k
In-
Stdby
In+
Out-
Out+
Vcc
1
4
3
7
8
6
5
GND
Internal
Bias
PWM
Output
Bridge
H
Oscillator
150k
150k
+
-
300k
U1
TS4962DFN
1
2
3
Cn1
Input
Cn2
Cn3
1
2
3
Cn4
Cn5
Speaker
Cn6
Gnd
Positive Input
Negative input Positive Output
Negative Output
Demonstration board TS4962
38/44 DocID10968 Rev 9
Figure 68. Bottom layer
Figure 69. Top layer
DocID10968 Rev 9 39/44
TS4962 Recommended footprint
44
6 Recommended footprint
Figure 70. Recommended footprint for TS4962 DFN package
1.4mm
1.8mm
0.8mm
0.35mm
0.65mm
2.2mm
Package information TS4962
40/44 DocID10968 Rev 9
7 Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK is an ST trademark.
‘7J NWT
DocID10968 Rev 9 41/44
TS4962 Package information
44
Figure 71. DFN8 3 x 3 exposed pad package mechanical drawing (pitch 0.65 mm)
Table 12. DFN8 3 x 3 exposed pad package mechanical data (pitch 0.65 mm)
Note: 1 The pin 1 identifier must be visible on the top surface of the package by using an indentation
mark or other feature of the package body. Exact shape and size of this feature are optional.
2 The dimension L does not conform with JEDEC MO-248, which recommends
0.40+/-0.10 mm.
For enhanced thermal performance, the exposed pad must be soldered to a copper area on
the PCB, acting as a heatsink. This copper area can be electrically connected to pin 7 or left
floating.
Ref.
Dimensions
Millimeters Inches
Min. Typ. Max. Min. Typ. Max.
A 0.50 0.60 0.65 0.020 0.024 0.026
A1 0.02 0.05 0.0008 0.002
A3 0.22 0.009
b 0.25 0.30 0.35 0.010 0.012 0.014
D 2.85 3.00 3.15 0.112 0.118 0.124
D2 1.60 1.70 1.80 0.063 0.067 0.071
E 2.85 3.00 3.15 0.112 0.118 0.124
E2 1.10 1.20 1.30 0.043 0.047 0.051
e 0.65 0.026
L 0.50 0.55 0.60 0.020 0.022 0.024
ddd 0.08 0.003
Ordering information TS4962
42/44 DocID10968 Rev 9
8 Ordering information
Table 13. Order codes
Part number Temperature range Package Packaging Marking
TS4962IQT -40°C, +85°C DFN8 Tape & reel K962
DocID10968 Rev 9 43/44
TS4962 Revision history
44
9 Revision history
Table 14. Document revision history
Date Revision Changes
31-May-2006 5 Modified package information. Now includes only standard DFN8
package.
16-Oct-2006 6
Added curves in Section 3: Electrical characteristics. Added
evaluation board information in Section 5: Demonstration
boardAdded recommended footprint.
10-Jan-2007 7 Added paragraph about rated voltage of capacitor in Section 4.5:
Decoupling of the circuit.
18-Jan-2010 8 Added Table 5: Pin description.
17-Mar-2020 9 Removed feature on the cover page.
TS4962
44/44 DocID10968 Rev 9
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